projects / mirror_edk2.git / blame
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| e1f414b6 | 1 | /** @file\r |
| 2 | High-level Io/Mmio functions.\r | |
| 3 | \r | |
| 4 | All assertions for bit field operations are handled bit field functions in the\r | |
| 5 | Base Library.\r | |
| 6 | \r | |
| 9095d37b | 7 | Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r |
| 4dd6f840 | 8 | This program and the accompanying materials\r |
| e1f414b6 | 9 | are licensed and made available under the terms and conditions of the BSD License\r |
| 10 | which accompanies this distribution. The full text of the license may be found at\r | |
| 35a17154 | 11 | http://opensource.org/licenses/bsd-license.php.\r |
| e1f414b6 | 12 | \r |
| 13 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 14 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 15 | \r | |
| 2bfb6009 | 16 | The following IoLib instances contain the same copy of this file:\r |
| e1f414b6 | 17 | \r |
| 18 | BaseIoLibIntrinsic\r | |
| 19 | DxeIoLibCpuIo\r | |
| 20 | PeiIoLibCpuIo\r | |
| 21 | \r | |
| 22 | **/\r | |
| 23 | \r | |
| f734a10a | 24 | #include "BaseIoLibIntrinsicInternal.h"\r |
| e1f414b6 | 25 | \r |
| 26 | /**\r | |
| 62991af2 | 27 | Reads an 8-bit I/O port, performs a bitwise OR, and writes the\r |
| e1f414b6 | 28 | result back to the 8-bit I/O port.\r |
| 29 | \r | |
| 62991af2 | 30 | Reads the 8-bit I/O port specified by Port, performs a bitwise OR\r |
| e1f414b6 | 31 | between the read result and the value specified by OrData, and writes the\r |
| 32 | result to the 8-bit I/O port specified by Port. The value written to the I/O\r | |
| 33 | port is returned. This function must guarantee that all I/O read and write\r | |
| 34 | operations are serialized.\r | |
| 35 | \r | |
| 36 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
| 37 | \r | |
| 38 | @param Port The I/O port to write.\r | |
| 39 | @param OrData The value to OR with the read value from the I/O port.\r | |
| 40 | \r | |
| 41 | @return The value written back to the I/O port.\r | |
| 42 | \r | |
| 43 | **/\r | |
| 44 | UINT8\r | |
| 45 | EFIAPI\r | |
| 46 | IoOr8 (\r | |
| 47 | IN UINTN Port,\r | |
| 48 | IN UINT8 OrData\r | |
| 49 | )\r | |
| 50 | {\r | |
| 51 | return IoWrite8 (Port, (UINT8) (IoRead8 (Port) | OrData));\r | |
| 52 | }\r | |
| 53 | \r | |
| 54 | /**\r | |
| 55 | Reads an 8-bit I/O port, performs a bitwise AND, and writes the result back\r | |
| 56 | to the 8-bit I/O port.\r | |
| 57 | \r | |
| 58 | Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r | |
| 59 | the read result and the value specified by AndData, and writes the result to\r | |
| 60 | the 8-bit I/O port specified by Port. The value written to the I/O port is\r | |
| 61 | returned. This function must guarantee that all I/O read and write operations\r | |
| 62 | are serialized.\r | |
| 63 | \r | |
| 64 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
| 65 | \r | |
| 66 | @param Port The I/O port to write.\r | |
| 67 | @param AndData The value to AND with the read value from the I/O port.\r | |
| 68 | \r | |
| 69 | @return The value written back to the I/O port.\r | |
| 70 | \r | |
| 71 | **/\r | |
| 72 | UINT8\r | |
| 73 | EFIAPI\r | |
| 74 | IoAnd8 (\r | |
| 75 | IN UINTN Port,\r | |
| 76 | IN UINT8 AndData\r | |
| 77 | )\r | |
| 78 | {\r | |
| 79 | return IoWrite8 (Port, (UINT8) (IoRead8 (Port) & AndData));\r | |
| 80 | }\r | |
| 81 | \r | |
| 82 | /**\r | |
| 9095d37b | 83 | Reads an 8-bit I/O port, performs a bitwise AND followed by a bitwise\r |
| 62991af2 | 84 | OR, and writes the result back to the 8-bit I/O port.\r |
| e1f414b6 | 85 | \r |
| 86 | Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r | |
| 87 | the read result and the value specified by AndData, performs a bitwise OR\r | |
| 88 | between the result of the AND operation and the value specified by OrData,\r | |
| 89 | and writes the result to the 8-bit I/O port specified by Port. The value\r | |
| 90 | written to the I/O port is returned. This function must guarantee that all\r | |
| 91 | I/O read and write operations are serialized.\r | |
| 92 | \r | |
| 93 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
| 94 | \r | |
| 95 | @param Port The I/O port to write.\r | |
| 96 | @param AndData The value to AND with the read value from the I/O port.\r | |
| 97 | @param OrData The value to OR with the result of the AND operation.\r | |
| 98 | \r | |
| 99 | @return The value written back to the I/O port.\r | |
| 100 | \r | |
| 101 | **/\r | |
| 102 | UINT8\r | |
| 103 | EFIAPI\r | |
| 104 | IoAndThenOr8 (\r | |
| 105 | IN UINTN Port,\r | |
| 106 | IN UINT8 AndData,\r | |
| 107 | IN UINT8 OrData\r | |
| 108 | )\r | |
| 109 | {\r | |
| 110 | return IoWrite8 (Port, (UINT8) ((IoRead8 (Port) & AndData) | OrData));\r | |
| 111 | }\r | |
| 112 | \r | |
| 113 | /**\r | |
| 114 | Reads a bit field of an I/O register.\r | |
| 115 | \r | |
| 116 | Reads the bit field in an 8-bit I/O register. The bit field is specified by\r | |
| 117 | the StartBit and the EndBit. The value of the bit field is returned.\r | |
| 118 | \r | |
| 119 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
| 120 | If StartBit is greater than 7, then ASSERT().\r | |
| 121 | If EndBit is greater than 7, then ASSERT().\r | |
| 122 | If EndBit is less than StartBit, then ASSERT().\r | |
| 123 | \r | |
| 124 | @param Port The I/O port to read.\r | |
| 125 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 126 | Range 0..7.\r | |
| 127 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 128 | Range 0..7.\r | |
| 129 | \r | |
| 2281e7a9 | 130 | @return The value read.\r |
| e1f414b6 | 131 | \r |
| 132 | **/\r | |
| 133 | UINT8\r | |
| 134 | EFIAPI\r | |
| 135 | IoBitFieldRead8 (\r | |
| 136 | IN UINTN Port,\r | |
| 137 | IN UINTN StartBit,\r | |
| 138 | IN UINTN EndBit\r | |
| 139 | )\r | |
| 140 | {\r | |
| 141 | return BitFieldRead8 (IoRead8 (Port), StartBit, EndBit);\r | |
| 142 | }\r | |
| 143 | \r | |
| 144 | /**\r | |
| 145 | Writes a bit field to an I/O register.\r | |
| 146 | \r | |
| 147 | Writes Value to the bit field of the I/O register. The bit field is specified\r | |
| 148 | by the StartBit and the EndBit. All other bits in the destination I/O\r | |
| 9095d37b | 149 | register are preserved. The value written to the I/O port is returned.\r |
| e1f414b6 | 150 | \r |
| 151 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
| 152 | If StartBit is greater than 7, then ASSERT().\r | |
| 153 | If EndBit is greater than 7, then ASSERT().\r | |
| 154 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 155 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| e1f414b6 | 156 | \r |
| 157 | @param Port The I/O port to write.\r | |
| 158 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 159 | Range 0..7.\r | |
| 160 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 161 | Range 0..7.\r | |
| 2fc59a00 | 162 | @param Value The new value of the bit field.\r |
| e1f414b6 | 163 | \r |
| 164 | @return The value written back to the I/O port.\r | |
| 165 | \r | |
| 166 | **/\r | |
| 167 | UINT8\r | |
| 168 | EFIAPI\r | |
| 169 | IoBitFieldWrite8 (\r | |
| 170 | IN UINTN Port,\r | |
| 171 | IN UINTN StartBit,\r | |
| 172 | IN UINTN EndBit,\r | |
| 173 | IN UINT8 Value\r | |
| 174 | )\r | |
| 175 | {\r | |
| 176 | return IoWrite8 (\r | |
| 177 | Port,\r | |
| 178 | BitFieldWrite8 (IoRead8 (Port), StartBit, EndBit, Value)\r | |
| 179 | );\r | |
| 180 | }\r | |
| 181 | \r | |
| 182 | /**\r | |
| 183 | Reads a bit field in an 8-bit port, performs a bitwise OR, and writes the\r | |
| 184 | result back to the bit field in the 8-bit port.\r | |
| 185 | \r | |
| 62991af2 | 186 | Reads the 8-bit I/O port specified by Port, performs a bitwise OR\r |
| e1f414b6 | 187 | between the read result and the value specified by OrData, and writes the\r |
| 188 | result to the 8-bit I/O port specified by Port. The value written to the I/O\r | |
| 189 | port is returned. This function must guarantee that all I/O read and write\r | |
| 35a17154 | 190 | operations are serialized. Extra bits left in OrData are stripped.\r |
| e1f414b6 | 191 | \r |
| 192 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
| 193 | If StartBit is greater than 7, then ASSERT().\r | |
| 194 | If EndBit is greater than 7, then ASSERT().\r | |
| 195 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 196 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| e1f414b6 | 197 | \r |
| 198 | @param Port The I/O port to write.\r | |
| 199 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 200 | Range 0..7.\r | |
| 201 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 202 | Range 0..7.\r | |
| 203 | @param OrData The value to OR with the read value from the I/O port.\r | |
| 204 | \r | |
| 205 | @return The value written back to the I/O port.\r | |
| 206 | \r | |
| 207 | **/\r | |
| 208 | UINT8\r | |
| 209 | EFIAPI\r | |
| 210 | IoBitFieldOr8 (\r | |
| 211 | IN UINTN Port,\r | |
| 212 | IN UINTN StartBit,\r | |
| 213 | IN UINTN EndBit,\r | |
| 214 | IN UINT8 OrData\r | |
| 215 | )\r | |
| 216 | {\r | |
| 217 | return IoWrite8 (\r | |
| 218 | Port,\r | |
| 219 | BitFieldOr8 (IoRead8 (Port), StartBit, EndBit, OrData)\r | |
| 220 | );\r | |
| 221 | }\r | |
| 222 | \r | |
| 223 | /**\r | |
| 224 | Reads a bit field in an 8-bit port, performs a bitwise AND, and writes the\r | |
| 225 | result back to the bit field in the 8-bit port.\r | |
| 226 | \r | |
| 227 | Reads the 8-bit I/O port specified by Port, performs a bitwise AND between\r | |
| 228 | the read result and the value specified by AndData, and writes the result to\r | |
| 229 | the 8-bit I/O port specified by Port. The value written to the I/O port is\r | |
| 230 | returned. This function must guarantee that all I/O read and write operations\r | |
| 35a17154 | 231 | are serialized. Extra bits left in AndData are stripped.\r |
| e1f414b6 | 232 | \r |
| 233 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
| 234 | If StartBit is greater than 7, then ASSERT().\r | |
| 235 | If EndBit is greater than 7, then ASSERT().\r | |
| 236 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 237 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| e1f414b6 | 238 | \r |
| 239 | @param Port The I/O port to write.\r | |
| 240 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 241 | Range 0..7.\r | |
| 242 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 243 | Range 0..7.\r | |
| 244 | @param AndData The value to AND with the read value from the I/O port.\r | |
| 245 | \r | |
| 246 | @return The value written back to the I/O port.\r | |
| 247 | \r | |
| 248 | **/\r | |
| 249 | UINT8\r | |
| 250 | EFIAPI\r | |
| 251 | IoBitFieldAnd8 (\r | |
| 252 | IN UINTN Port,\r | |
| 253 | IN UINTN StartBit,\r | |
| 254 | IN UINTN EndBit,\r | |
| 255 | IN UINT8 AndData\r | |
| 256 | )\r | |
| 257 | {\r | |
| 258 | return IoWrite8 (\r | |
| 259 | Port,\r | |
| 260 | BitFieldAnd8 (IoRead8 (Port), StartBit, EndBit, AndData)\r | |
| 261 | );\r | |
| 262 | }\r | |
| 263 | \r | |
| 264 | /**\r | |
| 265 | Reads a bit field in an 8-bit port, performs a bitwise AND followed by a\r | |
| 62991af2 | 266 | bitwise OR, and writes the result back to the bit field in the\r |
| e1f414b6 | 267 | 8-bit port.\r |
| 268 | \r | |
| 269 | Reads the 8-bit I/O port specified by Port, performs a bitwise AND followed\r | |
| 62991af2 | 270 | by a bitwise OR between the read result and the value specified by\r |
| e1f414b6 | 271 | AndData, and writes the result to the 8-bit I/O port specified by Port. The\r |
| 272 | value written to the I/O port is returned. This function must guarantee that\r | |
| 35a17154 | 273 | all I/O read and write operations are serialized. Extra bits left in both\r |
| e1f414b6 | 274 | AndData and OrData are stripped.\r |
| 275 | \r | |
| 276 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
| 277 | If StartBit is greater than 7, then ASSERT().\r | |
| 278 | If EndBit is greater than 7, then ASSERT().\r | |
| 279 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 LG |
280 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| 281 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
| e1f414b6 | 282 | \r |
| 283 | @param Port The I/O port to write.\r | |
| 284 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 285 | Range 0..7.\r | |
| 286 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 287 | Range 0..7.\r | |
| 288 | @param AndData The value to AND with the read value from the I/O port.\r | |
| 289 | @param OrData The value to OR with the result of the AND operation.\r | |
| 290 | \r | |
| 291 | @return The value written back to the I/O port.\r | |
| 292 | \r | |
| 293 | **/\r | |
| 294 | UINT8\r | |
| 295 | EFIAPI\r | |
| 296 | IoBitFieldAndThenOr8 (\r | |
| 297 | IN UINTN Port,\r | |
| 298 | IN UINTN StartBit,\r | |
| 299 | IN UINTN EndBit,\r | |
| 300 | IN UINT8 AndData,\r | |
| 301 | IN UINT8 OrData\r | |
| 302 | )\r | |
| 303 | {\r | |
| 304 | return IoWrite8 (\r | |
| 305 | Port,\r | |
| 306 | BitFieldAndThenOr8 (IoRead8 (Port), StartBit, EndBit, AndData, OrData)\r | |
| 307 | );\r | |
| 308 | }\r | |
| 309 | \r | |
| 310 | /**\r | |
| 62991af2 | 311 | Reads a 16-bit I/O port, performs a bitwise OR, and writes the\r |
| e1f414b6 | 312 | result back to the 16-bit I/O port.\r |
| 313 | \r | |
| 62991af2 | 314 | Reads the 16-bit I/O port specified by Port, performs a bitwise OR\r |
| e1f414b6 | 315 | between the read result and the value specified by OrData, and writes the\r |
| 316 | result to the 16-bit I/O port specified by Port. The value written to the I/O\r | |
| 317 | port is returned. This function must guarantee that all I/O read and write\r | |
| 318 | operations are serialized.\r | |
| 319 | \r | |
| 320 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 321 | If Port is not aligned on a 16-bit boundary, then ASSERT().\r |
| e1f414b6 | 322 | \r |
| 323 | @param Port The I/O port to write.\r | |
| 324 | @param OrData The value to OR with the read value from the I/O port.\r | |
| 325 | \r | |
| 326 | @return The value written back to the I/O port.\r | |
| 327 | \r | |
| 328 | **/\r | |
| 329 | UINT16\r | |
| 330 | EFIAPI\r | |
| 331 | IoOr16 (\r | |
| 332 | IN UINTN Port,\r | |
| 333 | IN UINT16 OrData\r | |
| 334 | )\r | |
| 335 | {\r | |
| 336 | return IoWrite16 (Port, (UINT16) (IoRead16 (Port) | OrData));\r | |
| 337 | }\r | |
| 338 | \r | |
| 339 | /**\r | |
| 340 | Reads a 16-bit I/O port, performs a bitwise AND, and writes the result back\r | |
| 341 | to the 16-bit I/O port.\r | |
| 342 | \r | |
| 343 | Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r | |
| 344 | the read result and the value specified by AndData, and writes the result to\r | |
| 345 | the 16-bit I/O port specified by Port. The value written to the I/O port is\r | |
| 346 | returned. This function must guarantee that all I/O read and write operations\r | |
| 347 | are serialized.\r | |
| 348 | \r | |
| 349 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 350 | If Port is not aligned on a 16-bit boundary, then ASSERT().\r |
| 9095d37b | 351 | \r |
| e1f414b6 | 352 | @param Port The I/O port to write.\r |
| 353 | @param AndData The value to AND with the read value from the I/O port.\r | |
| 354 | \r | |
| 355 | @return The value written back to the I/O port.\r | |
| 356 | \r | |
| 357 | **/\r | |
| 358 | UINT16\r | |
| 359 | EFIAPI\r | |
| 360 | IoAnd16 (\r | |
| 361 | IN UINTN Port,\r | |
| 362 | IN UINT16 AndData\r | |
| 363 | )\r | |
| 364 | {\r | |
| 365 | return IoWrite16 (Port, (UINT16) (IoRead16 (Port) & AndData));\r | |
| 366 | }\r | |
| 367 | \r | |
| 368 | /**\r | |
| 9095d37b | 369 | Reads a 16-bit I/O port, performs a bitwise AND followed by a bitwise\r |
| 62991af2 | 370 | OR, and writes the result back to the 16-bit I/O port.\r |
| e1f414b6 | 371 | \r |
| 372 | Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r | |
| 373 | the read result and the value specified by AndData, performs a bitwise OR\r | |
| 374 | between the result of the AND operation and the value specified by OrData,\r | |
| 375 | and writes the result to the 16-bit I/O port specified by Port. The value\r | |
| 376 | written to the I/O port is returned. This function must guarantee that all\r | |
| 377 | I/O read and write operations are serialized.\r | |
| 378 | \r | |
| 379 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 380 | If Port is not aligned on a 16-bit boundary, then ASSERT().\r |
| 9095d37b | 381 | \r |
| e1f414b6 | 382 | @param Port The I/O port to write.\r |
| 383 | @param AndData The value to AND with the read value from the I/O port.\r | |
| 384 | @param OrData The value to OR with the result of the AND operation.\r | |
| 385 | \r | |
| 386 | @return The value written back to the I/O port.\r | |
| 387 | \r | |
| 388 | **/\r | |
| 389 | UINT16\r | |
| 390 | EFIAPI\r | |
| 391 | IoAndThenOr16 (\r | |
| 392 | IN UINTN Port,\r | |
| 393 | IN UINT16 AndData,\r | |
| 394 | IN UINT16 OrData\r | |
| 395 | )\r | |
| 396 | {\r | |
| 397 | return IoWrite16 (Port, (UINT16) ((IoRead16 (Port) & AndData) | OrData));\r | |
| 398 | }\r | |
| 399 | \r | |
| 400 | /**\r | |
| 401 | Reads a bit field of an I/O register.\r | |
| 402 | \r | |
| 403 | Reads the bit field in a 16-bit I/O register. The bit field is specified by\r | |
| 404 | the StartBit and the EndBit. The value of the bit field is returned.\r | |
| 405 | \r | |
| 406 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 407 | If Port is not aligned on a 16-bit boundary, then ASSERT().\r |
| e1f414b6 | 408 | If StartBit is greater than 15, then ASSERT().\r |
| 409 | If EndBit is greater than 15, then ASSERT().\r | |
| 410 | If EndBit is less than StartBit, then ASSERT().\r | |
| 411 | \r | |
| 412 | @param Port The I/O port to read.\r | |
| 413 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 414 | Range 0..15.\r | |
| 415 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 416 | Range 0..15.\r | |
| 417 | \r | |
| 2281e7a9 | 418 | @return The value read.\r |
| e1f414b6 | 419 | \r |
| 420 | **/\r | |
| 421 | UINT16\r | |
| 422 | EFIAPI\r | |
| 423 | IoBitFieldRead16 (\r | |
| 424 | IN UINTN Port,\r | |
| 425 | IN UINTN StartBit,\r | |
| 426 | IN UINTN EndBit\r | |
| 427 | )\r | |
| 428 | {\r | |
| 429 | return BitFieldRead16 (IoRead16 (Port), StartBit, EndBit);\r | |
| 430 | }\r | |
| 431 | \r | |
| 432 | /**\r | |
| 433 | Writes a bit field to an I/O register.\r | |
| 434 | \r | |
| 435 | Writes Value to the bit field of the I/O register. The bit field is specified\r | |
| 436 | by the StartBit and the EndBit. All other bits in the destination I/O\r | |
| 437 | register are preserved. The value written to the I/O port is returned. Extra\r | |
| 35a17154 | 438 | bits left in Value are stripped.\r |
| e1f414b6 | 439 | \r |
| 440 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 441 | If Port is not aligned on a 16-bit boundary, then ASSERT().\r |
| e1f414b6 | 442 | If StartBit is greater than 15, then ASSERT().\r |
| 443 | If EndBit is greater than 15, then ASSERT().\r | |
| 444 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 445 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| e1f414b6 | 446 | \r |
| 447 | @param Port The I/O port to write.\r | |
| 448 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 449 | Range 0..15.\r | |
| 450 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 451 | Range 0..15.\r | |
| 2fc59a00 | 452 | @param Value The new value of the bit field.\r |
| e1f414b6 | 453 | \r |
| 454 | @return The value written back to the I/O port.\r | |
| 455 | \r | |
| 456 | **/\r | |
| 457 | UINT16\r | |
| 458 | EFIAPI\r | |
| 459 | IoBitFieldWrite16 (\r | |
| 460 | IN UINTN Port,\r | |
| 461 | IN UINTN StartBit,\r | |
| 462 | IN UINTN EndBit,\r | |
| 463 | IN UINT16 Value\r | |
| 464 | )\r | |
| 465 | {\r | |
| 466 | return IoWrite16 (\r | |
| 467 | Port,\r | |
| 468 | BitFieldWrite16 (IoRead16 (Port), StartBit, EndBit, Value)\r | |
| 469 | );\r | |
| 470 | }\r | |
| 471 | \r | |
| 472 | /**\r | |
| 473 | Reads a bit field in a 16-bit port, performs a bitwise OR, and writes the\r | |
| 474 | result back to the bit field in the 16-bit port.\r | |
| 475 | \r | |
| 62991af2 | 476 | Reads the 16-bit I/O port specified by Port, performs a bitwise OR\r |
| e1f414b6 | 477 | between the read result and the value specified by OrData, and writes the\r |
| 478 | result to the 16-bit I/O port specified by Port. The value written to the I/O\r | |
| 479 | port is returned. This function must guarantee that all I/O read and write\r | |
| 35a17154 | 480 | operations are serialized. Extra bits left in OrData are stripped.\r |
| e1f414b6 | 481 | \r |
| 482 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 483 | If Port is not aligned on a 16-bit boundary, then ASSERT().\r |
| e1f414b6 | 484 | If StartBit is greater than 15, then ASSERT().\r |
| 485 | If EndBit is greater than 15, then ASSERT().\r | |
| 486 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 487 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| e1f414b6 | 488 | \r |
| 489 | @param Port The I/O port to write.\r | |
| 490 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 491 | Range 0..15.\r | |
| 492 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 493 | Range 0..15.\r | |
| 494 | @param OrData The value to OR with the read value from the I/O port.\r | |
| 495 | \r | |
| 496 | @return The value written back to the I/O port.\r | |
| 497 | \r | |
| 498 | **/\r | |
| 499 | UINT16\r | |
| 500 | EFIAPI\r | |
| 501 | IoBitFieldOr16 (\r | |
| 502 | IN UINTN Port,\r | |
| 503 | IN UINTN StartBit,\r | |
| 504 | IN UINTN EndBit,\r | |
| 505 | IN UINT16 OrData\r | |
| 506 | )\r | |
| 507 | {\r | |
| 508 | return IoWrite16 (\r | |
| 509 | Port,\r | |
| 510 | BitFieldOr16 (IoRead16 (Port), StartBit, EndBit, OrData)\r | |
| 511 | );\r | |
| 512 | }\r | |
| 513 | \r | |
| 514 | /**\r | |
| 515 | Reads a bit field in a 16-bit port, performs a bitwise AND, and writes the\r | |
| 516 | result back to the bit field in the 16-bit port.\r | |
| 517 | \r | |
| 518 | Reads the 16-bit I/O port specified by Port, performs a bitwise AND between\r | |
| 519 | the read result and the value specified by AndData, and writes the result to\r | |
| 520 | the 16-bit I/O port specified by Port. The value written to the I/O port is\r | |
| 521 | returned. This function must guarantee that all I/O read and write operations\r | |
| 35a17154 | 522 | are serialized. Extra bits left in AndData are stripped.\r |
| e1f414b6 | 523 | \r |
| 524 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 525 | If Port is not aligned on a 16-bit boundary, then ASSERT().\r |
| e1f414b6 | 526 | If StartBit is greater than 15, then ASSERT().\r |
| 527 | If EndBit is greater than 15, then ASSERT().\r | |
| 528 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 529 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| e1f414b6 | 530 | \r |
| 531 | @param Port The I/O port to write.\r | |
| 532 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 533 | Range 0..15.\r | |
| 534 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 535 | Range 0..15.\r | |
| 536 | @param AndData The value to AND with the read value from the I/O port.\r | |
| 537 | \r | |
| 538 | @return The value written back to the I/O port.\r | |
| 539 | \r | |
| 540 | **/\r | |
| 541 | UINT16\r | |
| 542 | EFIAPI\r | |
| 543 | IoBitFieldAnd16 (\r | |
| 544 | IN UINTN Port,\r | |
| 545 | IN UINTN StartBit,\r | |
| 546 | IN UINTN EndBit,\r | |
| 547 | IN UINT16 AndData\r | |
| 548 | )\r | |
| 549 | {\r | |
| 550 | return IoWrite16 (\r | |
| 551 | Port,\r | |
| 552 | BitFieldAnd16 (IoRead16 (Port), StartBit, EndBit, AndData)\r | |
| 553 | );\r | |
| 554 | }\r | |
| 555 | \r | |
| 556 | /**\r | |
| 557 | Reads a bit field in a 16-bit port, performs a bitwise AND followed by a\r | |
| 62991af2 | 558 | bitwise OR, and writes the result back to the bit field in the\r |
| e1f414b6 | 559 | 16-bit port.\r |
| 560 | \r | |
| 561 | Reads the 16-bit I/O port specified by Port, performs a bitwise AND followed\r | |
| 62991af2 | 562 | by a bitwise OR between the read result and the value specified by\r |
| e1f414b6 | 563 | AndData, and writes the result to the 16-bit I/O port specified by Port. The\r |
| 564 | value written to the I/O port is returned. This function must guarantee that\r | |
| 35a17154 | 565 | all I/O read and write operations are serialized. Extra bits left in both\r |
| e1f414b6 | 566 | AndData and OrData are stripped.\r |
| 567 | \r | |
| 568 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 569 | If Port is not aligned on a 16-bit boundary, then ASSERT().\r |
| e1f414b6 | 570 | If StartBit is greater than 15, then ASSERT().\r |
| 571 | If EndBit is greater than 15, then ASSERT().\r | |
| 572 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 LG |
573 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| 574 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
| e1f414b6 | 575 | \r |
| 576 | @param Port The I/O port to write.\r | |
| 577 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 578 | Range 0..15.\r | |
| 579 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 580 | Range 0..15.\r | |
| 581 | @param AndData The value to AND with the read value from the I/O port.\r | |
| 582 | @param OrData The value to OR with the result of the AND operation.\r | |
| 583 | \r | |
| 584 | @return The value written back to the I/O port.\r | |
| 585 | \r | |
| 586 | **/\r | |
| 587 | UINT16\r | |
| 588 | EFIAPI\r | |
| 589 | IoBitFieldAndThenOr16 (\r | |
| 590 | IN UINTN Port,\r | |
| 591 | IN UINTN StartBit,\r | |
| 592 | IN UINTN EndBit,\r | |
| 593 | IN UINT16 AndData,\r | |
| 594 | IN UINT16 OrData\r | |
| 595 | )\r | |
| 596 | {\r | |
| 597 | return IoWrite16 (\r | |
| 598 | Port,\r | |
| 599 | BitFieldAndThenOr16 (IoRead16 (Port), StartBit, EndBit, AndData, OrData)\r | |
| 600 | );\r | |
| 601 | }\r | |
| 602 | \r | |
| 603 | /**\r | |
| 62991af2 | 604 | Reads a 32-bit I/O port, performs a bitwise OR, and writes the\r |
| e1f414b6 | 605 | result back to the 32-bit I/O port.\r |
| 606 | \r | |
| 62991af2 | 607 | Reads the 32-bit I/O port specified by Port, performs a bitwise OR\r |
| e1f414b6 | 608 | between the read result and the value specified by OrData, and writes the\r |
| 609 | result to the 32-bit I/O port specified by Port. The value written to the I/O\r | |
| 610 | port is returned. This function must guarantee that all I/O read and write\r | |
| 611 | operations are serialized.\r | |
| 612 | \r | |
| 613 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 614 | If Port is not aligned on a 32-bit boundary, then ASSERT().\r |
| e1f414b6 | 615 | \r |
| 616 | @param Port The I/O port to write.\r | |
| 617 | @param OrData The value to OR with the read value from the I/O port.\r | |
| 618 | \r | |
| 619 | @return The value written back to the I/O port.\r | |
| 620 | \r | |
| 621 | **/\r | |
| 622 | UINT32\r | |
| 623 | EFIAPI\r | |
| 624 | IoOr32 (\r | |
| 625 | IN UINTN Port,\r | |
| 626 | IN UINT32 OrData\r | |
| 627 | )\r | |
| 628 | {\r | |
| 629 | return IoWrite32 (Port, IoRead32 (Port) | OrData);\r | |
| 630 | }\r | |
| 631 | \r | |
| 632 | /**\r | |
| 633 | Reads a 32-bit I/O port, performs a bitwise AND, and writes the result back\r | |
| 634 | to the 32-bit I/O port.\r | |
| 635 | \r | |
| 636 | Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r | |
| 637 | the read result and the value specified by AndData, and writes the result to\r | |
| 638 | the 32-bit I/O port specified by Port. The value written to the I/O port is\r | |
| 639 | returned. This function must guarantee that all I/O read and write operations\r | |
| 640 | are serialized.\r | |
| 641 | \r | |
| 642 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 643 | If Port is not aligned on a 32-bit boundary, then ASSERT().\r |
| e1f414b6 | 644 | \r |
| 645 | @param Port The I/O port to write.\r | |
| 646 | @param AndData The value to AND with the read value from the I/O port.\r | |
| 647 | \r | |
| 648 | @return The value written back to the I/O port.\r | |
| 649 | \r | |
| 650 | **/\r | |
| 651 | UINT32\r | |
| 652 | EFIAPI\r | |
| 653 | IoAnd32 (\r | |
| 654 | IN UINTN Port,\r | |
| 655 | IN UINT32 AndData\r | |
| 656 | )\r | |
| 657 | {\r | |
| 658 | return IoWrite32 (Port, IoRead32 (Port) & AndData);\r | |
| 659 | }\r | |
| 660 | \r | |
| 661 | /**\r | |
| 9095d37b | 662 | Reads a 32-bit I/O port, performs a bitwise AND followed by a bitwise\r |
| 62991af2 | 663 | OR, and writes the result back to the 32-bit I/O port.\r |
| e1f414b6 | 664 | \r |
| 665 | Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r | |
| 666 | the read result and the value specified by AndData, performs a bitwise OR\r | |
| 667 | between the result of the AND operation and the value specified by OrData,\r | |
| 668 | and writes the result to the 32-bit I/O port specified by Port. The value\r | |
| 669 | written to the I/O port is returned. This function must guarantee that all\r | |
| 670 | I/O read and write operations are serialized.\r | |
| 671 | \r | |
| 672 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 673 | If Port is not aligned on a 32-bit boundary, then ASSERT().\r |
| e1f414b6 | 674 | \r |
| 675 | @param Port The I/O port to write.\r | |
| 676 | @param AndData The value to AND with the read value from the I/O port.\r | |
| 677 | @param OrData The value to OR with the result of the AND operation.\r | |
| 678 | \r | |
| 679 | @return The value written back to the I/O port.\r | |
| 680 | \r | |
| 681 | **/\r | |
| 682 | UINT32\r | |
| 683 | EFIAPI\r | |
| 684 | IoAndThenOr32 (\r | |
| 685 | IN UINTN Port,\r | |
| 686 | IN UINT32 AndData,\r | |
| 687 | IN UINT32 OrData\r | |
| 688 | )\r | |
| 689 | {\r | |
| 690 | return IoWrite32 (Port, (IoRead32 (Port) & AndData) | OrData);\r | |
| 691 | }\r | |
| 692 | \r | |
| 693 | /**\r | |
| 694 | Reads a bit field of an I/O register.\r | |
| 695 | \r | |
| 696 | Reads the bit field in a 32-bit I/O register. The bit field is specified by\r | |
| 697 | the StartBit and the EndBit. The value of the bit field is returned.\r | |
| 698 | \r | |
| 699 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 700 | If Port is not aligned on a 32-bit boundary, then ASSERT().\r |
| e1f414b6 | 701 | If StartBit is greater than 31, then ASSERT().\r |
| 702 | If EndBit is greater than 31, then ASSERT().\r | |
| 703 | If EndBit is less than StartBit, then ASSERT().\r | |
| 704 | \r | |
| 705 | @param Port The I/O port to read.\r | |
| 706 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 707 | Range 0..31.\r | |
| 708 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 709 | Range 0..31.\r | |
| 710 | \r | |
| 2281e7a9 | 711 | @return The value read.\r |
| e1f414b6 | 712 | \r |
| 713 | **/\r | |
| 714 | UINT32\r | |
| 715 | EFIAPI\r | |
| 716 | IoBitFieldRead32 (\r | |
| 717 | IN UINTN Port,\r | |
| 718 | IN UINTN StartBit,\r | |
| 719 | IN UINTN EndBit\r | |
| 720 | )\r | |
| 721 | {\r | |
| 722 | return BitFieldRead32 (IoRead32 (Port), StartBit, EndBit);\r | |
| 723 | }\r | |
| 724 | \r | |
| 725 | /**\r | |
| 726 | Writes a bit field to an I/O register.\r | |
| 727 | \r | |
| 728 | Writes Value to the bit field of the I/O register. The bit field is specified\r | |
| 729 | by the StartBit and the EndBit. All other bits in the destination I/O\r | |
| 730 | register are preserved. The value written to the I/O port is returned. Extra\r | |
| 35a17154 | 731 | bits left in Value are stripped.\r |
| e1f414b6 | 732 | \r |
| 733 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 734 | If Port is not aligned on a 32-bit boundary, then ASSERT().\r |
| e1f414b6 | 735 | If StartBit is greater than 31, then ASSERT().\r |
| 736 | If EndBit is greater than 31, then ASSERT().\r | |
| 737 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 738 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| e1f414b6 | 739 | \r |
| 740 | @param Port The I/O port to write.\r | |
| 741 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 742 | Range 0..31.\r | |
| 743 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 744 | Range 0..31.\r | |
| 2fc59a00 | 745 | @param Value The new value of the bit field.\r |
| e1f414b6 | 746 | \r |
| 747 | @return The value written back to the I/O port.\r | |
| 748 | \r | |
| 749 | **/\r | |
| 750 | UINT32\r | |
| 751 | EFIAPI\r | |
| 752 | IoBitFieldWrite32 (\r | |
| 753 | IN UINTN Port,\r | |
| 754 | IN UINTN StartBit,\r | |
| 755 | IN UINTN EndBit,\r | |
| 756 | IN UINT32 Value\r | |
| 757 | )\r | |
| 758 | {\r | |
| 759 | return IoWrite32 (\r | |
| 760 | Port,\r | |
| 761 | BitFieldWrite32 (IoRead32 (Port), StartBit, EndBit, Value)\r | |
| 762 | );\r | |
| 763 | }\r | |
| 764 | \r | |
| 765 | /**\r | |
| 766 | Reads a bit field in a 32-bit port, performs a bitwise OR, and writes the\r | |
| 767 | result back to the bit field in the 32-bit port.\r | |
| 768 | \r | |
| 62991af2 | 769 | Reads the 32-bit I/O port specified by Port, performs a bitwise OR\r |
| e1f414b6 | 770 | between the read result and the value specified by OrData, and writes the\r |
| 771 | result to the 32-bit I/O port specified by Port. The value written to the I/O\r | |
| 772 | port is returned. This function must guarantee that all I/O read and write\r | |
| 35a17154 | 773 | operations are serialized. Extra bits left in OrData are stripped.\r |
| e1f414b6 | 774 | \r |
| 775 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 776 | If Port is not aligned on a 32-bit boundary, then ASSERT().\r |
| e1f414b6 | 777 | If StartBit is greater than 31, then ASSERT().\r |
| 778 | If EndBit is greater than 31, then ASSERT().\r | |
| 779 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 780 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| e1f414b6 | 781 | \r |
| 782 | @param Port The I/O port to write.\r | |
| 783 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 784 | Range 0..31.\r | |
| 785 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 786 | Range 0..31.\r | |
| 787 | @param OrData The value to OR with the read value from the I/O port.\r | |
| 788 | \r | |
| 789 | @return The value written back to the I/O port.\r | |
| 790 | \r | |
| 791 | **/\r | |
| 792 | UINT32\r | |
| 793 | EFIAPI\r | |
| 794 | IoBitFieldOr32 (\r | |
| 795 | IN UINTN Port,\r | |
| 796 | IN UINTN StartBit,\r | |
| 797 | IN UINTN EndBit,\r | |
| 798 | IN UINT32 OrData\r | |
| 799 | )\r | |
| 800 | {\r | |
| 801 | return IoWrite32 (\r | |
| 802 | Port,\r | |
| 803 | BitFieldOr32 (IoRead32 (Port), StartBit, EndBit, OrData)\r | |
| 804 | );\r | |
| 805 | }\r | |
| 806 | \r | |
| 807 | /**\r | |
| 808 | Reads a bit field in a 32-bit port, performs a bitwise AND, and writes the\r | |
| 809 | result back to the bit field in the 32-bit port.\r | |
| 810 | \r | |
| 811 | Reads the 32-bit I/O port specified by Port, performs a bitwise AND between\r | |
| 812 | the read result and the value specified by AndData, and writes the result to\r | |
| 813 | the 32-bit I/O port specified by Port. The value written to the I/O port is\r | |
| 814 | returned. This function must guarantee that all I/O read and write operations\r | |
| 35a17154 | 815 | are serialized. Extra bits left in AndData are stripped.\r |
| e1f414b6 | 816 | \r |
| 817 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 818 | If Port is not aligned on a 32-bit boundary, then ASSERT().\r |
| e1f414b6 | 819 | If StartBit is greater than 31, then ASSERT().\r |
| 820 | If EndBit is greater than 31, then ASSERT().\r | |
| 821 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 822 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| e1f414b6 | 823 | \r |
| 824 | @param Port The I/O port to write.\r | |
| 825 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 826 | Range 0..31.\r | |
| 827 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 828 | Range 0..31.\r | |
| 829 | @param AndData The value to AND with the read value from the I/O port.\r | |
| 830 | \r | |
| 831 | @return The value written back to the I/O port.\r | |
| 832 | \r | |
| 833 | **/\r | |
| 834 | UINT32\r | |
| 835 | EFIAPI\r | |
| 836 | IoBitFieldAnd32 (\r | |
| 837 | IN UINTN Port,\r | |
| 838 | IN UINTN StartBit,\r | |
| 839 | IN UINTN EndBit,\r | |
| 840 | IN UINT32 AndData\r | |
| 841 | )\r | |
| 842 | {\r | |
| 843 | return IoWrite32 (\r | |
| 844 | Port,\r | |
| 845 | BitFieldAnd32 (IoRead32 (Port), StartBit, EndBit, AndData)\r | |
| 846 | );\r | |
| 847 | }\r | |
| 848 | \r | |
| 849 | /**\r | |
| 850 | Reads a bit field in a 32-bit port, performs a bitwise AND followed by a\r | |
| 62991af2 | 851 | bitwise OR, and writes the result back to the bit field in the\r |
| e1f414b6 | 852 | 32-bit port.\r |
| 853 | \r | |
| 854 | Reads the 32-bit I/O port specified by Port, performs a bitwise AND followed\r | |
| 62991af2 | 855 | by a bitwise OR between the read result and the value specified by\r |
| e1f414b6 | 856 | AndData, and writes the result to the 32-bit I/O port specified by Port. The\r |
| 857 | value written to the I/O port is returned. This function must guarantee that\r | |
| 35a17154 | 858 | all I/O read and write operations are serialized. Extra bits left in both\r |
| e1f414b6 | 859 | AndData and OrData are stripped.\r |
| 860 | \r | |
| 861 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 862 | If Port is not aligned on a 32-bit boundary, then ASSERT().\r |
| e1f414b6 | 863 | If StartBit is greater than 31, then ASSERT().\r |
| 864 | If EndBit is greater than 31, then ASSERT().\r | |
| 865 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 LG |
866 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| 867 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
| e1f414b6 | 868 | \r |
| 869 | @param Port The I/O port to write.\r | |
| 870 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 871 | Range 0..31.\r | |
| 872 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 873 | Range 0..31.\r | |
| 874 | @param AndData The value to AND with the read value from the I/O port.\r | |
| 875 | @param OrData The value to OR with the result of the AND operation.\r | |
| 876 | \r | |
| 877 | @return The value written back to the I/O port.\r | |
| 878 | \r | |
| 879 | **/\r | |
| 880 | UINT32\r | |
| 881 | EFIAPI\r | |
| 882 | IoBitFieldAndThenOr32 (\r | |
| 883 | IN UINTN Port,\r | |
| 884 | IN UINTN StartBit,\r | |
| 885 | IN UINTN EndBit,\r | |
| 886 | IN UINT32 AndData,\r | |
| 887 | IN UINT32 OrData\r | |
| 888 | )\r | |
| 889 | {\r | |
| 890 | return IoWrite32 (\r | |
| 891 | Port,\r | |
| 892 | BitFieldAndThenOr32 (IoRead32 (Port), StartBit, EndBit, AndData, OrData)\r | |
| 893 | );\r | |
| 894 | }\r | |
| 895 | \r | |
| 896 | /**\r | |
| 62991af2 | 897 | Reads a 64-bit I/O port, performs a bitwise OR, and writes the\r |
| e1f414b6 | 898 | result back to the 64-bit I/O port.\r |
| 899 | \r | |
| 62991af2 | 900 | Reads the 64-bit I/O port specified by Port, performs a bitwise OR\r |
| e1f414b6 | 901 | between the read result and the value specified by OrData, and writes the\r |
| 902 | result to the 64-bit I/O port specified by Port. The value written to the I/O\r | |
| 903 | port is returned. This function must guarantee that all I/O read and write\r | |
| 904 | operations are serialized.\r | |
| 905 | \r | |
| 906 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 907 | If Port is not aligned on a 64-bit boundary, then ASSERT().\r |
| e1f414b6 | 908 | \r |
| 909 | @param Port The I/O port to write.\r | |
| 910 | @param OrData The value to OR with the read value from the I/O port.\r | |
| 911 | \r | |
| 912 | @return The value written back to the I/O port.\r | |
| 913 | \r | |
| 914 | **/\r | |
| 915 | UINT64\r | |
| 916 | EFIAPI\r | |
| 917 | IoOr64 (\r | |
| 918 | IN UINTN Port,\r | |
| 919 | IN UINT64 OrData\r | |
| 920 | )\r | |
| 921 | {\r | |
| 922 | return IoWrite64 (Port, IoRead64 (Port) | OrData);\r | |
| 923 | }\r | |
| 924 | \r | |
| 925 | /**\r | |
| 926 | Reads a 64-bit I/O port, performs a bitwise AND, and writes the result back\r | |
| 927 | to the 64-bit I/O port.\r | |
| 928 | \r | |
| 929 | Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r | |
| 930 | the read result and the value specified by AndData, and writes the result to\r | |
| 931 | the 64-bit I/O port specified by Port. The value written to the I/O port is\r | |
| 932 | returned. This function must guarantee that all I/O read and write operations\r | |
| 933 | are serialized.\r | |
| 934 | \r | |
| 935 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 936 | If Port is not aligned on a 64-bit boundary, then ASSERT().\r |
| e1f414b6 | 937 | \r |
| 938 | @param Port The I/O port to write.\r | |
| 939 | @param AndData The value to AND with the read value from the I/O port.\r | |
| 940 | \r | |
| 941 | @return The value written back to the I/O port.\r | |
| 942 | \r | |
| 943 | **/\r | |
| 944 | UINT64\r | |
| 945 | EFIAPI\r | |
| 946 | IoAnd64 (\r | |
| 947 | IN UINTN Port,\r | |
| 948 | IN UINT64 AndData\r | |
| 949 | )\r | |
| 950 | {\r | |
| 951 | return IoWrite64 (Port, IoRead64 (Port) & AndData);\r | |
| 952 | }\r | |
| 953 | \r | |
| 954 | /**\r | |
| 9095d37b | 955 | Reads a 64-bit I/O port, performs a bitwise AND followed by a bitwise\r |
| 62991af2 | 956 | OR, and writes the result back to the 64-bit I/O port.\r |
| e1f414b6 | 957 | \r |
| 958 | Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r | |
| 959 | the read result and the value specified by AndData, performs a bitwise OR\r | |
| 960 | between the result of the AND operation and the value specified by OrData,\r | |
| 961 | and writes the result to the 64-bit I/O port specified by Port. The value\r | |
| 962 | written to the I/O port is returned. This function must guarantee that all\r | |
| 963 | I/O read and write operations are serialized.\r | |
| 964 | \r | |
| 965 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 966 | If Port is not aligned on a 64-bit boundary, then ASSERT().\r |
| e1f414b6 | 967 | \r |
| 968 | @param Port The I/O port to write.\r | |
| 969 | @param AndData The value to AND with the read value from the I/O port.\r | |
| 970 | @param OrData The value to OR with the result of the AND operation.\r | |
| 971 | \r | |
| 972 | @return The value written back to the I/O port.\r | |
| 973 | \r | |
| 974 | **/\r | |
| 975 | UINT64\r | |
| 976 | EFIAPI\r | |
| 977 | IoAndThenOr64 (\r | |
| 978 | IN UINTN Port,\r | |
| 979 | IN UINT64 AndData,\r | |
| 980 | IN UINT64 OrData\r | |
| 981 | )\r | |
| 982 | {\r | |
| 983 | return IoWrite64 (Port, (IoRead64 (Port) & AndData) | OrData);\r | |
| 984 | }\r | |
| 985 | \r | |
| 986 | /**\r | |
| 987 | Reads a bit field of an I/O register.\r | |
| 988 | \r | |
| 989 | Reads the bit field in a 64-bit I/O register. The bit field is specified by\r | |
| 990 | the StartBit and the EndBit. The value of the bit field is returned.\r | |
| 991 | \r | |
| 992 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 993 | If Port is not aligned on a 64-bit boundary, then ASSERT().\r |
| e1f414b6 | 994 | If StartBit is greater than 63, then ASSERT().\r |
| 995 | If EndBit is greater than 63, then ASSERT().\r | |
| 996 | If EndBit is less than StartBit, then ASSERT().\r | |
| 997 | \r | |
| 998 | @param Port The I/O port to read.\r | |
| 999 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 1000 | Range 0..63.\r | |
| 1001 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 1002 | Range 0..63.\r | |
| 1003 | \r | |
| 2281e7a9 | 1004 | @return The value read.\r |
| e1f414b6 | 1005 | \r |
| 1006 | **/\r | |
| 1007 | UINT64\r | |
| 1008 | EFIAPI\r | |
| 1009 | IoBitFieldRead64 (\r | |
| 1010 | IN UINTN Port,\r | |
| 1011 | IN UINTN StartBit,\r | |
| 1012 | IN UINTN EndBit\r | |
| 1013 | )\r | |
| 1014 | {\r | |
| 1015 | return BitFieldRead64 (IoRead64 (Port), StartBit, EndBit);\r | |
| 1016 | }\r | |
| 1017 | \r | |
| 1018 | /**\r | |
| 1019 | Writes a bit field to an I/O register.\r | |
| 1020 | \r | |
| 1021 | Writes Value to the bit field of the I/O register. The bit field is specified\r | |
| 1022 | by the StartBit and the EndBit. All other bits in the destination I/O\r | |
| 1023 | register are preserved. The value written to the I/O port is returned. Extra\r | |
| 35a17154 | 1024 | bits left in Value are stripped.\r |
| e1f414b6 | 1025 | \r |
| 1026 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 1027 | If Port is not aligned on a 64-bit boundary, then ASSERT().\r |
| e1f414b6 | 1028 | If StartBit is greater than 63, then ASSERT().\r |
| 1029 | If EndBit is greater than 63, then ASSERT().\r | |
| 1030 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 1031 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| e1f414b6 | 1032 | \r |
| 1033 | @param Port The I/O port to write.\r | |
| 1034 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 1035 | Range 0..63.\r | |
| 1036 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 1037 | Range 0..63.\r | |
| 2fc59a00 | 1038 | @param Value The new value of the bit field.\r |
| e1f414b6 | 1039 | \r |
| 1040 | @return The value written back to the I/O port.\r | |
| 1041 | \r | |
| 1042 | **/\r | |
| 1043 | UINT64\r | |
| 1044 | EFIAPI\r | |
| 1045 | IoBitFieldWrite64 (\r | |
| 1046 | IN UINTN Port,\r | |
| 1047 | IN UINTN StartBit,\r | |
| 1048 | IN UINTN EndBit,\r | |
| 1049 | IN UINT64 Value\r | |
| 1050 | )\r | |
| 1051 | {\r | |
| 1052 | return IoWrite64 (\r | |
| 1053 | Port,\r | |
| 1054 | BitFieldWrite64 (IoRead64 (Port), StartBit, EndBit, Value)\r | |
| 1055 | );\r | |
| 1056 | }\r | |
| 1057 | \r | |
| 1058 | /**\r | |
| 1059 | Reads a bit field in a 64-bit port, performs a bitwise OR, and writes the\r | |
| 1060 | result back to the bit field in the 64-bit port.\r | |
| 1061 | \r | |
| 62991af2 | 1062 | Reads the 64-bit I/O port specified by Port, performs a bitwise OR\r |
| e1f414b6 | 1063 | between the read result and the value specified by OrData, and writes the\r |
| 1064 | result to the 64-bit I/O port specified by Port. The value written to the I/O\r | |
| 1065 | port is returned. This function must guarantee that all I/O read and write\r | |
| 35a17154 | 1066 | operations are serialized. Extra bits left in OrData are stripped.\r |
| e1f414b6 | 1067 | \r |
| 1068 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 1069 | If Port is not aligned on a 64-bit boundary, then ASSERT().\r |
| e1f414b6 | 1070 | If StartBit is greater than 63, then ASSERT().\r |
| 1071 | If EndBit is greater than 63, then ASSERT().\r | |
| 1072 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 1073 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| e1f414b6 | 1074 | \r |
| 1075 | @param Port The I/O port to write.\r | |
| 1076 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 1077 | Range 0..63.\r | |
| 1078 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 1079 | Range 0..63.\r | |
| 1080 | @param OrData The value to OR with the read value from the I/O port.\r | |
| 1081 | \r | |
| 1082 | @return The value written back to the I/O port.\r | |
| 1083 | \r | |
| 1084 | **/\r | |
| 1085 | UINT64\r | |
| 1086 | EFIAPI\r | |
| 1087 | IoBitFieldOr64 (\r | |
| 1088 | IN UINTN Port,\r | |
| 1089 | IN UINTN StartBit,\r | |
| 1090 | IN UINTN EndBit,\r | |
| 1091 | IN UINT64 OrData\r | |
| 1092 | )\r | |
| 1093 | {\r | |
| 1094 | return IoWrite64 (\r | |
| 1095 | Port,\r | |
| 1096 | BitFieldOr64 (IoRead64 (Port), StartBit, EndBit, OrData)\r | |
| 1097 | );\r | |
| 1098 | }\r | |
| 1099 | \r | |
| 1100 | /**\r | |
| 1101 | Reads a bit field in a 64-bit port, performs a bitwise AND, and writes the\r | |
| 1102 | result back to the bit field in the 64-bit port.\r | |
| 1103 | \r | |
| 1104 | Reads the 64-bit I/O port specified by Port, performs a bitwise AND between\r | |
| 1105 | the read result and the value specified by AndData, and writes the result to\r | |
| 1106 | the 64-bit I/O port specified by Port. The value written to the I/O port is\r | |
| 1107 | returned. This function must guarantee that all I/O read and write operations\r | |
| 35a17154 | 1108 | are serialized. Extra bits left in AndData are stripped.\r |
| e1f414b6 | 1109 | \r |
| 1110 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 1111 | If Port is not aligned on a 64-bit boundary, then ASSERT().\r |
| e1f414b6 | 1112 | If StartBit is greater than 63, then ASSERT().\r |
| 1113 | If EndBit is greater than 63, then ASSERT().\r | |
| 1114 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 1115 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| e1f414b6 | 1116 | \r |
| 1117 | @param Port The I/O port to write.\r | |
| 1118 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 1119 | Range 0..63.\r | |
| 1120 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 1121 | Range 0..63.\r | |
| 1122 | @param AndData The value to AND with the read value from the I/O port.\r | |
| 1123 | \r | |
| 1124 | @return The value written back to the I/O port.\r | |
| 1125 | \r | |
| 1126 | **/\r | |
| 1127 | UINT64\r | |
| 1128 | EFIAPI\r | |
| 1129 | IoBitFieldAnd64 (\r | |
| 1130 | IN UINTN Port,\r | |
| 1131 | IN UINTN StartBit,\r | |
| 1132 | IN UINTN EndBit,\r | |
| 1133 | IN UINT64 AndData\r | |
| 1134 | )\r | |
| 1135 | {\r | |
| 1136 | return IoWrite64 (\r | |
| 1137 | Port,\r | |
| 1138 | BitFieldAnd64 (IoRead64 (Port), StartBit, EndBit, AndData)\r | |
| 1139 | );\r | |
| 1140 | }\r | |
| 1141 | \r | |
| 1142 | /**\r | |
| 1143 | Reads a bit field in a 64-bit port, performs a bitwise AND followed by a\r | |
| 62991af2 | 1144 | bitwise OR, and writes the result back to the bit field in the\r |
| e1f414b6 | 1145 | 64-bit port.\r |
| 1146 | \r | |
| 1147 | Reads the 64-bit I/O port specified by Port, performs a bitwise AND followed\r | |
| 62991af2 | 1148 | by a bitwise OR between the read result and the value specified by\r |
| e1f414b6 | 1149 | AndData, and writes the result to the 64-bit I/O port specified by Port. The\r |
| 1150 | value written to the I/O port is returned. This function must guarantee that\r | |
| 35a17154 | 1151 | all I/O read and write operations are serialized. Extra bits left in both\r |
| e1f414b6 | 1152 | AndData and OrData are stripped.\r |
| 1153 | \r | |
| 1154 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 1155 | If Port is not aligned on a 64-bit boundary, then ASSERT().\r |
| e1f414b6 | 1156 | If StartBit is greater than 63, then ASSERT().\r |
| 1157 | If EndBit is greater than 63, then ASSERT().\r | |
| 1158 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 LG |
1159 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| 1160 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
| e1f414b6 | 1161 | \r |
| 1162 | @param Port The I/O port to write.\r | |
| 1163 | @param StartBit The ordinal of the least significant bit in the bit field.\r | |
| 1164 | Range 0..63.\r | |
| 1165 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 1166 | Range 0..63.\r | |
| 1167 | @param AndData The value to AND with the read value from the I/O port.\r | |
| 1168 | @param OrData The value to OR with the result of the AND operation.\r | |
| 1169 | \r | |
| 1170 | @return The value written back to the I/O port.\r | |
| 1171 | \r | |
| 1172 | **/\r | |
| 1173 | UINT64\r | |
| 1174 | EFIAPI\r | |
| 1175 | IoBitFieldAndThenOr64 (\r | |
| 1176 | IN UINTN Port,\r | |
| 1177 | IN UINTN StartBit,\r | |
| 1178 | IN UINTN EndBit,\r | |
| 1179 | IN UINT64 AndData,\r | |
| 1180 | IN UINT64 OrData\r | |
| 1181 | )\r | |
| 1182 | {\r | |
| 1183 | return IoWrite64 (\r | |
| 1184 | Port,\r | |
| 1185 | BitFieldAndThenOr64 (IoRead64 (Port), StartBit, EndBit, AndData, OrData)\r | |
| 1186 | );\r | |
| 1187 | }\r | |
| 1188 | \r | |
| 1189 | /**\r | |
| 62991af2 | 1190 | Reads an 8-bit MMIO register, performs a bitwise OR, and writes the\r |
| e1f414b6 | 1191 | result back to the 8-bit MMIO register.\r |
| 1192 | \r | |
| 9095d37b | 1193 | Reads the 8-bit MMIO register specified by Address, performs a bitwise\r |
| 62991af2 | 1194 | OR between the read result and the value specified by OrData, and\r |
| e1f414b6 | 1195 | writes the result to the 8-bit MMIO register specified by Address. The value\r |
| 1196 | written to the MMIO register is returned. This function must guarantee that\r | |
| 1197 | all MMIO read and write operations are serialized.\r | |
| 1198 | \r | |
| 1199 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
| 1200 | \r | |
| 1201 | @param Address The MMIO register to write.\r | |
| 1202 | @param OrData The value to OR with the read value from the MMIO register.\r | |
| 1203 | \r | |
| 1204 | @return The value written back to the MMIO register.\r | |
| 1205 | \r | |
| 1206 | **/\r | |
| 1207 | UINT8\r | |
| 1208 | EFIAPI\r | |
| 1209 | MmioOr8 (\r | |
| 1210 | IN UINTN Address,\r | |
| 1211 | IN UINT8 OrData\r | |
| 1212 | )\r | |
| 1213 | {\r | |
| 1214 | return MmioWrite8 (Address, (UINT8) (MmioRead8 (Address) | OrData));\r | |
| 1215 | }\r | |
| 1216 | \r | |
| 1217 | /**\r | |
| 1218 | Reads an 8-bit MMIO register, performs a bitwise AND, and writes the result\r | |
| 1219 | back to the 8-bit MMIO register.\r | |
| 1220 | \r | |
| 1221 | Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r | |
| 1222 | between the read result and the value specified by AndData, and writes the\r | |
| 1223 | result to the 8-bit MMIO register specified by Address. The value written to\r | |
| 1224 | the MMIO register is returned. This function must guarantee that all MMIO\r | |
| 1225 | read and write operations are serialized.\r | |
| 1226 | \r | |
| 1227 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
| 1228 | \r | |
| 1229 | @param Address The MMIO register to write.\r | |
| 1230 | @param AndData The value to AND with the read value from the MMIO register.\r | |
| 1231 | \r | |
| 1232 | @return The value written back to the MMIO register.\r | |
| 1233 | \r | |
| 1234 | **/\r | |
| 1235 | UINT8\r | |
| 1236 | EFIAPI\r | |
| 1237 | MmioAnd8 (\r | |
| 1238 | IN UINTN Address,\r | |
| 1239 | IN UINT8 AndData\r | |
| 1240 | )\r | |
| 1241 | {\r | |
| 1242 | return MmioWrite8 (Address, (UINT8) (MmioRead8 (Address) & AndData));\r | |
| 1243 | }\r | |
| 1244 | \r | |
| 1245 | /**\r | |
| 9095d37b | 1246 | Reads an 8-bit MMIO register, performs a bitwise AND followed by a bitwise\r |
| 62991af2 | 1247 | OR, and writes the result back to the 8-bit MMIO register.\r |
| e1f414b6 | 1248 | \r |
| 1249 | Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r | |
| 1250 | between the read result and the value specified by AndData, performs a\r | |
| 1251 | bitwise OR between the result of the AND operation and the value specified by\r | |
| 1252 | OrData, and writes the result to the 8-bit MMIO register specified by\r | |
| 1253 | Address. The value written to the MMIO register is returned. This function\r | |
| 1254 | must guarantee that all MMIO read and write operations are serialized.\r | |
| 1255 | \r | |
| 1256 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
| 1257 | \r | |
| 1258 | \r | |
| 1259 | @param Address The MMIO register to write.\r | |
| 1260 | @param AndData The value to AND with the read value from the MMIO register.\r | |
| 1261 | @param OrData The value to OR with the result of the AND operation.\r | |
| 1262 | \r | |
| 1263 | @return The value written back to the MMIO register.\r | |
| 1264 | \r | |
| 1265 | **/\r | |
| 1266 | UINT8\r | |
| 1267 | EFIAPI\r | |
| 1268 | MmioAndThenOr8 (\r | |
| 1269 | IN UINTN Address,\r | |
| 1270 | IN UINT8 AndData,\r | |
| 1271 | IN UINT8 OrData\r | |
| 1272 | )\r | |
| 1273 | {\r | |
| 1274 | return MmioWrite8 (Address, (UINT8) ((MmioRead8 (Address) & AndData) | OrData));\r | |
| 1275 | }\r | |
| 1276 | \r | |
| 1277 | /**\r | |
| 1278 | Reads a bit field of a MMIO register.\r | |
| 1279 | \r | |
| 1280 | Reads the bit field in an 8-bit MMIO register. The bit field is specified by\r | |
| 1281 | the StartBit and the EndBit. The value of the bit field is returned.\r | |
| 1282 | \r | |
| 1283 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
| 1284 | If StartBit is greater than 7, then ASSERT().\r | |
| 1285 | If EndBit is greater than 7, then ASSERT().\r | |
| 1286 | If EndBit is less than StartBit, then ASSERT().\r | |
| 1287 | \r | |
| 35a17154 | 1288 | @param Address The MMIO register to read.\r |
| e1f414b6 | 1289 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1290 | Range 0..7.\r | |
| 1291 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 1292 | Range 0..7.\r | |
| 1293 | \r | |
| 2281e7a9 | 1294 | @return The value read.\r |
| e1f414b6 | 1295 | \r |
| 1296 | **/\r | |
| 1297 | UINT8\r | |
| 1298 | EFIAPI\r | |
| 1299 | MmioBitFieldRead8 (\r | |
| 1300 | IN UINTN Address,\r | |
| 1301 | IN UINTN StartBit,\r | |
| 1302 | IN UINTN EndBit\r | |
| 1303 | )\r | |
| 1304 | {\r | |
| 1305 | return BitFieldRead8 (MmioRead8 (Address), StartBit, EndBit);\r | |
| 1306 | }\r | |
| 1307 | \r | |
| 1308 | /**\r | |
| 1309 | Writes a bit field to a MMIO register.\r | |
| 1310 | \r | |
| 1311 | Writes Value to the bit field of the MMIO register. The bit field is\r | |
| 1312 | specified by the StartBit and the EndBit. All other bits in the destination\r | |
| 1313 | MMIO register are preserved. The new value of the 8-bit register is returned.\r | |
| 1314 | \r | |
| 1315 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
| 1316 | If StartBit is greater than 7, then ASSERT().\r | |
| 1317 | If EndBit is greater than 7, then ASSERT().\r | |
| 1318 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 1319 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| e1f414b6 | 1320 | \r |
| 35a17154 | 1321 | @param Address The MMIO register to write.\r |
| e1f414b6 | 1322 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1323 | Range 0..7.\r | |
| 1324 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 1325 | Range 0..7.\r | |
| 2fc59a00 | 1326 | @param Value The new value of the bit field.\r |
| e1f414b6 | 1327 | \r |
| 1328 | @return The value written back to the MMIO register.\r | |
| 1329 | \r | |
| 1330 | **/\r | |
| 1331 | UINT8\r | |
| 1332 | EFIAPI\r | |
| 1333 | MmioBitFieldWrite8 (\r | |
| 1334 | IN UINTN Address,\r | |
| 1335 | IN UINTN StartBit,\r | |
| 1336 | IN UINTN EndBit,\r | |
| 1337 | IN UINT8 Value\r | |
| 1338 | )\r | |
| 1339 | {\r | |
| 1340 | return MmioWrite8 (\r | |
| 1341 | Address,\r | |
| 1342 | BitFieldWrite8 (MmioRead8 (Address), StartBit, EndBit, Value)\r | |
| 1343 | );\r | |
| 1344 | }\r | |
| 1345 | \r | |
| 1346 | /**\r | |
| 1347 | Reads a bit field in an 8-bit MMIO register, performs a bitwise OR, and\r | |
| 1348 | writes the result back to the bit field in the 8-bit MMIO register.\r | |
| 1349 | \r | |
| 9095d37b | 1350 | Reads the 8-bit MMIO register specified by Address, performs a bitwise\r |
| 62991af2 | 1351 | OR between the read result and the value specified by OrData, and\r |
| e1f414b6 | 1352 | writes the result to the 8-bit MMIO register specified by Address. The value\r |
| 1353 | written to the MMIO register is returned. This function must guarantee that\r | |
| 35a17154 | 1354 | all MMIO read and write operations are serialized. Extra bits left in OrData\r |
| e1f414b6 | 1355 | are stripped.\r |
| 1356 | \r | |
| 1357 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
| 1358 | If StartBit is greater than 7, then ASSERT().\r | |
| 1359 | If EndBit is greater than 7, then ASSERT().\r | |
| 1360 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 1361 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| e1f414b6 | 1362 | \r |
| 35a17154 | 1363 | @param Address The MMIO register to write.\r |
| e1f414b6 | 1364 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1365 | Range 0..7.\r | |
| 1366 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 1367 | Range 0..7.\r | |
| 1368 | @param OrData The value to OR with read value from the MMIO register.\r | |
| 1369 | \r | |
| 1370 | @return The value written back to the MMIO register.\r | |
| 1371 | \r | |
| 1372 | **/\r | |
| 1373 | UINT8\r | |
| 1374 | EFIAPI\r | |
| 1375 | MmioBitFieldOr8 (\r | |
| 1376 | IN UINTN Address,\r | |
| 1377 | IN UINTN StartBit,\r | |
| 1378 | IN UINTN EndBit,\r | |
| 1379 | IN UINT8 OrData\r | |
| 1380 | )\r | |
| 1381 | {\r | |
| 1382 | return MmioWrite8 (\r | |
| 1383 | Address,\r | |
| 1384 | BitFieldOr8 (MmioRead8 (Address), StartBit, EndBit, OrData)\r | |
| 1385 | );\r | |
| 1386 | }\r | |
| 1387 | \r | |
| 1388 | /**\r | |
| 1389 | Reads a bit field in an 8-bit MMIO register, performs a bitwise AND, and\r | |
| 1390 | writes the result back to the bit field in the 8-bit MMIO register.\r | |
| 1391 | \r | |
| 1392 | Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r | |
| 1393 | between the read result and the value specified by AndData, and writes the\r | |
| 1394 | result to the 8-bit MMIO register specified by Address. The value written to\r | |
| 1395 | the MMIO register is returned. This function must guarantee that all MMIO\r | |
| 35a17154 | 1396 | read and write operations are serialized. Extra bits left in AndData are\r |
| e1f414b6 | 1397 | stripped.\r |
| 1398 | \r | |
| 1399 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
| 1400 | If StartBit is greater than 7, then ASSERT().\r | |
| 1401 | If EndBit is greater than 7, then ASSERT().\r | |
| 1402 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 1403 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| e1f414b6 | 1404 | \r |
| 35a17154 | 1405 | @param Address The MMIO register to write.\r |
| e1f414b6 | 1406 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1407 | Range 0..7.\r | |
| 1408 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 1409 | Range 0..7.\r | |
| 1410 | @param AndData The value to AND with read value from the MMIO register.\r | |
| 1411 | \r | |
| 1412 | @return The value written back to the MMIO register.\r | |
| 1413 | \r | |
| 1414 | **/\r | |
| 1415 | UINT8\r | |
| 1416 | EFIAPI\r | |
| 1417 | MmioBitFieldAnd8 (\r | |
| 1418 | IN UINTN Address,\r | |
| 1419 | IN UINTN StartBit,\r | |
| 1420 | IN UINTN EndBit,\r | |
| 1421 | IN UINT8 AndData\r | |
| 1422 | )\r | |
| 1423 | {\r | |
| 1424 | return MmioWrite8 (\r | |
| 1425 | Address,\r | |
| 1426 | BitFieldAnd8 (MmioRead8 (Address), StartBit, EndBit, AndData)\r | |
| 1427 | );\r | |
| 1428 | }\r | |
| 1429 | \r | |
| 1430 | /**\r | |
| 1431 | Reads a bit field in an 8-bit MMIO register, performs a bitwise AND followed\r | |
| 62991af2 | 1432 | by a bitwise OR, and writes the result back to the bit field in the\r |
| e1f414b6 | 1433 | 8-bit MMIO register.\r |
| 1434 | \r | |
| 1435 | Reads the 8-bit MMIO register specified by Address, performs a bitwise AND\r | |
| 62991af2 | 1436 | followed by a bitwise OR between the read result and the value\r |
| e1f414b6 | 1437 | specified by AndData, and writes the result to the 8-bit MMIO register\r |
| 1438 | specified by Address. The value written to the MMIO register is returned.\r | |
| 1439 | This function must guarantee that all MMIO read and write operations are\r | |
| 35a17154 | 1440 | serialized. Extra bits left in both AndData and OrData are stripped.\r |
| e1f414b6 | 1441 | \r |
| 1442 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
| 1443 | If StartBit is greater than 7, then ASSERT().\r | |
| 1444 | If EndBit is greater than 7, then ASSERT().\r | |
| 1445 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 LG |
1446 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| 1447 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
| e1f414b6 | 1448 | \r |
| 35a17154 | 1449 | @param Address The MMIO register to write.\r |
| e1f414b6 | 1450 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1451 | Range 0..7.\r | |
| 1452 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 1453 | Range 0..7.\r | |
| 1454 | @param AndData The value to AND with read value from the MMIO register.\r | |
| 1455 | @param OrData The value to OR with the result of the AND operation.\r | |
| 1456 | \r | |
| 1457 | @return The value written back to the MMIO register.\r | |
| 1458 | \r | |
| 1459 | **/\r | |
| 1460 | UINT8\r | |
| 1461 | EFIAPI\r | |
| 1462 | MmioBitFieldAndThenOr8 (\r | |
| 1463 | IN UINTN Address,\r | |
| 1464 | IN UINTN StartBit,\r | |
| 1465 | IN UINTN EndBit,\r | |
| 1466 | IN UINT8 AndData,\r | |
| 1467 | IN UINT8 OrData\r | |
| 1468 | )\r | |
| 1469 | {\r | |
| 1470 | return MmioWrite8 (\r | |
| 1471 | Address,\r | |
| 1472 | BitFieldAndThenOr8 (MmioRead8 (Address), StartBit, EndBit, AndData, OrData)\r | |
| 1473 | );\r | |
| 1474 | }\r | |
| 1475 | \r | |
| 1476 | /**\r | |
| 62991af2 | 1477 | Reads a 16-bit MMIO register, performs a bitwise OR, and writes the\r |
| e1f414b6 | 1478 | result back to the 16-bit MMIO register.\r |
| 1479 | \r | |
| 9095d37b | 1480 | Reads the 16-bit MMIO register specified by Address, performs a bitwise\r |
| 62991af2 | 1481 | OR between the read result and the value specified by OrData, and\r |
| e1f414b6 | 1482 | writes the result to the 16-bit MMIO register specified by Address. The value\r |
| 1483 | written to the MMIO register is returned. This function must guarantee that\r | |
| 1484 | all MMIO read and write operations are serialized.\r | |
| 1485 | \r | |
| 1486 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 1487 | If Address is not aligned on a 16-bit boundary, then ASSERT().\r |
| e1f414b6 | 1488 | \r |
| 1489 | @param Address The MMIO register to write.\r | |
| 1490 | @param OrData The value to OR with the read value from the MMIO register.\r | |
| 1491 | \r | |
| 1492 | @return The value written back to the MMIO register.\r | |
| 1493 | \r | |
| 1494 | **/\r | |
| 1495 | UINT16\r | |
| 1496 | EFIAPI\r | |
| 1497 | MmioOr16 (\r | |
| 1498 | IN UINTN Address,\r | |
| 1499 | IN UINT16 OrData\r | |
| 1500 | )\r | |
| 1501 | {\r | |
| 1502 | return MmioWrite16 (Address, (UINT16) (MmioRead16 (Address) | OrData));\r | |
| 1503 | }\r | |
| 1504 | \r | |
| 1505 | /**\r | |
| 1506 | Reads a 16-bit MMIO register, performs a bitwise AND, and writes the result\r | |
| 1507 | back to the 16-bit MMIO register.\r | |
| 1508 | \r | |
| 1509 | Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r | |
| 1510 | between the read result and the value specified by AndData, and writes the\r | |
| 1511 | result to the 16-bit MMIO register specified by Address. The value written to\r | |
| 1512 | the MMIO register is returned. This function must guarantee that all MMIO\r | |
| 1513 | read and write operations are serialized.\r | |
| 1514 | \r | |
| 1515 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 1516 | If Address is not aligned on a 16-bit boundary, then ASSERT().\r |
| e1f414b6 | 1517 | \r |
| 1518 | @param Address The MMIO register to write.\r | |
| 1519 | @param AndData The value to AND with the read value from the MMIO register.\r | |
| 1520 | \r | |
| 1521 | @return The value written back to the MMIO register.\r | |
| 1522 | \r | |
| 1523 | **/\r | |
| 1524 | UINT16\r | |
| 1525 | EFIAPI\r | |
| 1526 | MmioAnd16 (\r | |
| 1527 | IN UINTN Address,\r | |
| 1528 | IN UINT16 AndData\r | |
| 1529 | )\r | |
| 1530 | {\r | |
| 1531 | return MmioWrite16 (Address, (UINT16) (MmioRead16 (Address) & AndData));\r | |
| 1532 | }\r | |
| 1533 | \r | |
| 1534 | /**\r | |
| 9095d37b | 1535 | Reads a 16-bit MMIO register, performs a bitwise AND followed by a bitwise\r |
| 62991af2 | 1536 | OR, and writes the result back to the 16-bit MMIO register.\r |
| e1f414b6 | 1537 | \r |
| 1538 | Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r | |
| 1539 | between the read result and the value specified by AndData, performs a\r | |
| 1540 | bitwise OR between the result of the AND operation and the value specified by\r | |
| 1541 | OrData, and writes the result to the 16-bit MMIO register specified by\r | |
| 1542 | Address. The value written to the MMIO register is returned. This function\r | |
| 1543 | must guarantee that all MMIO read and write operations are serialized.\r | |
| 1544 | \r | |
| 1545 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 1546 | If Address is not aligned on a 16-bit boundary, then ASSERT().\r |
| e1f414b6 | 1547 | \r |
| 1548 | @param Address The MMIO register to write.\r | |
| 1549 | @param AndData The value to AND with the read value from the MMIO register.\r | |
| 1550 | @param OrData The value to OR with the result of the AND operation.\r | |
| 1551 | \r | |
| 1552 | @return The value written back to the MMIO register.\r | |
| 1553 | \r | |
| 1554 | **/\r | |
| 1555 | UINT16\r | |
| 1556 | EFIAPI\r | |
| 1557 | MmioAndThenOr16 (\r | |
| 1558 | IN UINTN Address,\r | |
| 1559 | IN UINT16 AndData,\r | |
| 1560 | IN UINT16 OrData\r | |
| 1561 | )\r | |
| 1562 | {\r | |
| 1563 | return MmioWrite16 (Address, (UINT16) ((MmioRead16 (Address) & AndData) | OrData));\r | |
| 1564 | }\r | |
| 1565 | \r | |
| 1566 | /**\r | |
| 1567 | Reads a bit field of a MMIO register.\r | |
| 1568 | \r | |
| 1569 | Reads the bit field in a 16-bit MMIO register. The bit field is specified by\r | |
| 1570 | the StartBit and the EndBit. The value of the bit field is returned.\r | |
| 1571 | \r | |
| 1572 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 1573 | If Address is not aligned on a 16-bit boundary, then ASSERT().\r |
| e1f414b6 | 1574 | If StartBit is greater than 15, then ASSERT().\r |
| 1575 | If EndBit is greater than 15, then ASSERT().\r | |
| 1576 | If EndBit is less than StartBit, then ASSERT().\r | |
| 1577 | \r | |
| 35a17154 | 1578 | @param Address The MMIO register to read.\r |
| e1f414b6 | 1579 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1580 | Range 0..15.\r | |
| 1581 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 1582 | Range 0..15.\r | |
| 1583 | \r | |
| 2281e7a9 | 1584 | @return The value read.\r |
| e1f414b6 | 1585 | \r |
| 1586 | **/\r | |
| 1587 | UINT16\r | |
| 1588 | EFIAPI\r | |
| 1589 | MmioBitFieldRead16 (\r | |
| 1590 | IN UINTN Address,\r | |
| 1591 | IN UINTN StartBit,\r | |
| 1592 | IN UINTN EndBit\r | |
| 1593 | )\r | |
| 1594 | {\r | |
| 1595 | return BitFieldRead16 (MmioRead16 (Address), StartBit, EndBit);\r | |
| 1596 | }\r | |
| 1597 | \r | |
| 1598 | /**\r | |
| 1599 | Writes a bit field to a MMIO register.\r | |
| 1600 | \r | |
| 1601 | Writes Value to the bit field of the MMIO register. The bit field is\r | |
| 1602 | specified by the StartBit and the EndBit. All other bits in the destination\r | |
| 1603 | MMIO register are preserved. The new value of the 16-bit register is returned.\r | |
| 1604 | \r | |
| 1605 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 1606 | If Address is not aligned on a 16-bit boundary, then ASSERT().\r |
| e1f414b6 | 1607 | If StartBit is greater than 15, then ASSERT().\r |
| 1608 | If EndBit is greater than 15, then ASSERT().\r | |
| 1609 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 1610 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| e1f414b6 | 1611 | \r |
| 35a17154 | 1612 | @param Address The MMIO register to write.\r |
| e1f414b6 | 1613 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1614 | Range 0..15.\r | |
| 1615 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 1616 | Range 0..15.\r | |
| 2fc59a00 | 1617 | @param Value The new value of the bit field.\r |
| e1f414b6 | 1618 | \r |
| 1619 | @return The value written back to the MMIO register.\r | |
| 1620 | \r | |
| 1621 | **/\r | |
| 1622 | UINT16\r | |
| 1623 | EFIAPI\r | |
| 1624 | MmioBitFieldWrite16 (\r | |
| 1625 | IN UINTN Address,\r | |
| 1626 | IN UINTN StartBit,\r | |
| 1627 | IN UINTN EndBit,\r | |
| 1628 | IN UINT16 Value\r | |
| 1629 | )\r | |
| 1630 | {\r | |
| 1631 | return MmioWrite16 (\r | |
| 1632 | Address,\r | |
| 1633 | BitFieldWrite16 (MmioRead16 (Address), StartBit, EndBit, Value)\r | |
| 1634 | );\r | |
| 1635 | }\r | |
| 1636 | \r | |
| 1637 | /**\r | |
| 1638 | Reads a bit field in a 16-bit MMIO register, performs a bitwise OR, and\r | |
| 1639 | writes the result back to the bit field in the 16-bit MMIO register.\r | |
| 1640 | \r | |
| 9095d37b | 1641 | Reads the 16-bit MMIO register specified by Address, performs a bitwise\r |
| 62991af2 | 1642 | OR between the read result and the value specified by OrData, and\r |
| e1f414b6 | 1643 | writes the result to the 16-bit MMIO register specified by Address. The value\r |
| 1644 | written to the MMIO register is returned. This function must guarantee that\r | |
| 35a17154 | 1645 | all MMIO read and write operations are serialized. Extra bits left in OrData\r |
| e1f414b6 | 1646 | are stripped.\r |
| 1647 | \r | |
| 1648 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 1649 | If Address is not aligned on a 16-bit boundary, then ASSERT().\r |
| e1f414b6 | 1650 | If StartBit is greater than 15, then ASSERT().\r |
| 1651 | If EndBit is greater than 15, then ASSERT().\r | |
| 1652 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 1653 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| e1f414b6 | 1654 | \r |
| 35a17154 | 1655 | @param Address The MMIO register to write.\r |
| e1f414b6 | 1656 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1657 | Range 0..15.\r | |
| 1658 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 1659 | Range 0..15.\r | |
| 1660 | @param OrData The value to OR with read value from the MMIO register.\r | |
| 1661 | \r | |
| 1662 | @return The value written back to the MMIO register.\r | |
| 1663 | \r | |
| 1664 | **/\r | |
| 1665 | UINT16\r | |
| 1666 | EFIAPI\r | |
| 1667 | MmioBitFieldOr16 (\r | |
| 1668 | IN UINTN Address,\r | |
| 1669 | IN UINTN StartBit,\r | |
| 1670 | IN UINTN EndBit,\r | |
| 1671 | IN UINT16 OrData\r | |
| 1672 | )\r | |
| 1673 | {\r | |
| 1674 | return MmioWrite16 (\r | |
| 1675 | Address,\r | |
| 1676 | BitFieldOr16 (MmioRead16 (Address), StartBit, EndBit, OrData)\r | |
| 1677 | );\r | |
| 1678 | }\r | |
| 1679 | \r | |
| 1680 | /**\r | |
| 1681 | Reads a bit field in a 16-bit MMIO register, performs a bitwise AND, and\r | |
| 1682 | writes the result back to the bit field in the 16-bit MMIO register.\r | |
| 1683 | \r | |
| 1684 | Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r | |
| 1685 | between the read result and the value specified by AndData, and writes the\r | |
| 1686 | result to the 16-bit MMIO register specified by Address. The value written to\r | |
| 1687 | the MMIO register is returned. This function must guarantee that all MMIO\r | |
| 35a17154 | 1688 | read and write operations are serialized. Extra bits left in AndData are\r |
| e1f414b6 | 1689 | stripped.\r |
| 1690 | \r | |
| 1691 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 1692 | If Address is not aligned on a 16-bit boundary, then ASSERT().\r |
| e1f414b6 | 1693 | If StartBit is greater than 15, then ASSERT().\r |
| 1694 | If EndBit is greater than 15, then ASSERT().\r | |
| 1695 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 1696 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| e1f414b6 | 1697 | \r |
| 35a17154 | 1698 | @param Address The MMIO register to write.\r |
| e1f414b6 | 1699 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1700 | Range 0..15.\r | |
| 1701 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 1702 | Range 0..15.\r | |
| 1703 | @param AndData The value to AND with read value from the MMIO register.\r | |
| 1704 | \r | |
| 1705 | @return The value written back to the MMIO register.\r | |
| 1706 | \r | |
| 1707 | **/\r | |
| 1708 | UINT16\r | |
| 1709 | EFIAPI\r | |
| 1710 | MmioBitFieldAnd16 (\r | |
| 1711 | IN UINTN Address,\r | |
| 1712 | IN UINTN StartBit,\r | |
| 1713 | IN UINTN EndBit,\r | |
| 1714 | IN UINT16 AndData\r | |
| 1715 | )\r | |
| 1716 | {\r | |
| 1717 | return MmioWrite16 (\r | |
| 1718 | Address,\r | |
| 1719 | BitFieldAnd16 (MmioRead16 (Address), StartBit, EndBit, AndData)\r | |
| 1720 | );\r | |
| 1721 | }\r | |
| 1722 | \r | |
| 1723 | /**\r | |
| 1724 | Reads a bit field in a 16-bit MMIO register, performs a bitwise AND followed\r | |
| 62991af2 | 1725 | by a bitwise OR, and writes the result back to the bit field in the\r |
| e1f414b6 | 1726 | 16-bit MMIO register.\r |
| 1727 | \r | |
| 1728 | Reads the 16-bit MMIO register specified by Address, performs a bitwise AND\r | |
| 62991af2 | 1729 | followed by a bitwise OR between the read result and the value\r |
| e1f414b6 | 1730 | specified by AndData, and writes the result to the 16-bit MMIO register\r |
| 1731 | specified by Address. The value written to the MMIO register is returned.\r | |
| 1732 | This function must guarantee that all MMIO read and write operations are\r | |
| 35a17154 | 1733 | serialized. Extra bits left in both AndData and OrData are stripped.\r |
| e1f414b6 | 1734 | \r |
| 1735 | If 16-bit MMIO register operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 1736 | If Address is not aligned on a 16-bit boundary, then ASSERT().\r |
| e1f414b6 | 1737 | If StartBit is greater than 15, then ASSERT().\r |
| 1738 | If EndBit is greater than 15, then ASSERT().\r | |
| 1739 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 LG |
1740 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| 1741 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
| e1f414b6 | 1742 | \r |
| 35a17154 | 1743 | @param Address The MMIO register to write.\r |
| e1f414b6 | 1744 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1745 | Range 0..15.\r | |
| 1746 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 1747 | Range 0..15.\r | |
| 1748 | @param AndData The value to AND with read value from the MMIO register.\r | |
| 1749 | @param OrData The value to OR with the result of the AND operation.\r | |
| 1750 | \r | |
| 1751 | @return The value written back to the MMIO register.\r | |
| 1752 | \r | |
| 1753 | **/\r | |
| 1754 | UINT16\r | |
| 1755 | EFIAPI\r | |
| 1756 | MmioBitFieldAndThenOr16 (\r | |
| 1757 | IN UINTN Address,\r | |
| 1758 | IN UINTN StartBit,\r | |
| 1759 | IN UINTN EndBit,\r | |
| 1760 | IN UINT16 AndData,\r | |
| 1761 | IN UINT16 OrData\r | |
| 1762 | )\r | |
| 1763 | {\r | |
| 1764 | return MmioWrite16 (\r | |
| 1765 | Address,\r | |
| 1766 | BitFieldAndThenOr16 (MmioRead16 (Address), StartBit, EndBit, AndData, OrData)\r | |
| 1767 | );\r | |
| 1768 | }\r | |
| 1769 | \r | |
| 1770 | /**\r | |
| 62991af2 | 1771 | Reads a 32-bit MMIO register, performs a bitwise OR, and writes the\r |
| e1f414b6 | 1772 | result back to the 32-bit MMIO register.\r |
| 1773 | \r | |
| 9095d37b | 1774 | Reads the 32-bit MMIO register specified by Address, performs a bitwise\r |
| 62991af2 | 1775 | OR between the read result and the value specified by OrData, and\r |
| e1f414b6 | 1776 | writes the result to the 32-bit MMIO register specified by Address. The value\r |
| 1777 | written to the MMIO register is returned. This function must guarantee that\r | |
| 1778 | all MMIO read and write operations are serialized.\r | |
| 1779 | \r | |
| 1780 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 1781 | If Address is not aligned on a 32-bit boundary, then ASSERT().\r |
| e1f414b6 | 1782 | \r |
| 1783 | @param Address The MMIO register to write.\r | |
| 1784 | @param OrData The value to OR with the read value from the MMIO register.\r | |
| 1785 | \r | |
| 1786 | @return The value written back to the MMIO register.\r | |
| 1787 | \r | |
| 1788 | **/\r | |
| 1789 | UINT32\r | |
| 1790 | EFIAPI\r | |
| 1791 | MmioOr32 (\r | |
| 1792 | IN UINTN Address,\r | |
| 1793 | IN UINT32 OrData\r | |
| 1794 | )\r | |
| 1795 | {\r | |
| 1796 | return MmioWrite32 (Address, MmioRead32 (Address) | OrData);\r | |
| 1797 | }\r | |
| 1798 | \r | |
| 1799 | /**\r | |
| 1800 | Reads a 32-bit MMIO register, performs a bitwise AND, and writes the result\r | |
| 1801 | back to the 32-bit MMIO register.\r | |
| 1802 | \r | |
| 1803 | Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r | |
| 1804 | between the read result and the value specified by AndData, and writes the\r | |
| 1805 | result to the 32-bit MMIO register specified by Address. The value written to\r | |
| 1806 | the MMIO register is returned. This function must guarantee that all MMIO\r | |
| 1807 | read and write operations are serialized.\r | |
| 1808 | \r | |
| 1809 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 1810 | If Address is not aligned on a 32-bit boundary, then ASSERT().\r |
| e1f414b6 | 1811 | \r |
| 1812 | @param Address The MMIO register to write.\r | |
| 1813 | @param AndData The value to AND with the read value from the MMIO register.\r | |
| 1814 | \r | |
| 1815 | @return The value written back to the MMIO register.\r | |
| 1816 | \r | |
| 1817 | **/\r | |
| 1818 | UINT32\r | |
| 1819 | EFIAPI\r | |
| 1820 | MmioAnd32 (\r | |
| 1821 | IN UINTN Address,\r | |
| 1822 | IN UINT32 AndData\r | |
| 1823 | )\r | |
| 1824 | {\r | |
| 1825 | return MmioWrite32 (Address, MmioRead32 (Address) & AndData);\r | |
| 1826 | }\r | |
| 1827 | \r | |
| 1828 | /**\r | |
| 9095d37b | 1829 | Reads a 32-bit MMIO register, performs a bitwise AND followed by a bitwise\r |
| 62991af2 | 1830 | OR, and writes the result back to the 32-bit MMIO register.\r |
| e1f414b6 | 1831 | \r |
| 1832 | Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r | |
| 1833 | between the read result and the value specified by AndData, performs a\r | |
| 1834 | bitwise OR between the result of the AND operation and the value specified by\r | |
| 1835 | OrData, and writes the result to the 32-bit MMIO register specified by\r | |
| 1836 | Address. The value written to the MMIO register is returned. This function\r | |
| 1837 | must guarantee that all MMIO read and write operations are serialized.\r | |
| 1838 | \r | |
| 1839 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 1840 | If Address is not aligned on a 32-bit boundary, then ASSERT().\r |
| e1f414b6 | 1841 | \r |
| 1842 | @param Address The MMIO register to write.\r | |
| 1843 | @param AndData The value to AND with the read value from the MMIO register.\r | |
| 1844 | @param OrData The value to OR with the result of the AND operation.\r | |
| 1845 | \r | |
| 1846 | @return The value written back to the MMIO register.\r | |
| 1847 | \r | |
| 1848 | **/\r | |
| 1849 | UINT32\r | |
| 1850 | EFIAPI\r | |
| 1851 | MmioAndThenOr32 (\r | |
| 1852 | IN UINTN Address,\r | |
| 1853 | IN UINT32 AndData,\r | |
| 1854 | IN UINT32 OrData\r | |
| 1855 | )\r | |
| 1856 | {\r | |
| 1857 | return MmioWrite32 (Address, (MmioRead32 (Address) & AndData) | OrData);\r | |
| 1858 | }\r | |
| 1859 | \r | |
| 1860 | /**\r | |
| 1861 | Reads a bit field of a MMIO register.\r | |
| 1862 | \r | |
| 1863 | Reads the bit field in a 32-bit MMIO register. The bit field is specified by\r | |
| 1864 | the StartBit and the EndBit. The value of the bit field is returned.\r | |
| 1865 | \r | |
| 1866 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 1867 | If Address is not aligned on a 32-bit boundary, then ASSERT().\r |
| e1f414b6 | 1868 | If StartBit is greater than 31, then ASSERT().\r |
| 1869 | If EndBit is greater than 31, then ASSERT().\r | |
| 1870 | If EndBit is less than StartBit, then ASSERT().\r | |
| 1871 | \r | |
| 35a17154 | 1872 | @param Address The MMIO register to read.\r |
| e1f414b6 | 1873 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1874 | Range 0..31.\r | |
| 1875 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 1876 | Range 0..31.\r | |
| 1877 | \r | |
| 2281e7a9 | 1878 | @return The value read.\r |
| e1f414b6 | 1879 | \r |
| 1880 | **/\r | |
| 1881 | UINT32\r | |
| 1882 | EFIAPI\r | |
| 1883 | MmioBitFieldRead32 (\r | |
| 1884 | IN UINTN Address,\r | |
| 1885 | IN UINTN StartBit,\r | |
| 1886 | IN UINTN EndBit\r | |
| 1887 | )\r | |
| 1888 | {\r | |
| 1889 | return BitFieldRead32 (MmioRead32 (Address), StartBit, EndBit);\r | |
| 1890 | }\r | |
| 1891 | \r | |
| 1892 | /**\r | |
| 1893 | Writes a bit field to a MMIO register.\r | |
| 1894 | \r | |
| 1895 | Writes Value to the bit field of the MMIO register. The bit field is\r | |
| 1896 | specified by the StartBit and the EndBit. All other bits in the destination\r | |
| 1897 | MMIO register are preserved. The new value of the 32-bit register is returned.\r | |
| 1898 | \r | |
| 1899 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 1900 | If Address is not aligned on a 32-bit boundary, then ASSERT().\r |
| e1f414b6 | 1901 | If StartBit is greater than 31, then ASSERT().\r |
| 1902 | If EndBit is greater than 31, then ASSERT().\r | |
| 1903 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 1904 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| e1f414b6 | 1905 | \r |
| 35a17154 | 1906 | @param Address The MMIO register to write.\r |
| e1f414b6 | 1907 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1908 | Range 0..31.\r | |
| 1909 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 1910 | Range 0..31.\r | |
| 2fc59a00 | 1911 | @param Value The new value of the bit field.\r |
| e1f414b6 | 1912 | \r |
| 1913 | @return The value written back to the MMIO register.\r | |
| 1914 | \r | |
| 1915 | **/\r | |
| 1916 | UINT32\r | |
| 1917 | EFIAPI\r | |
| 1918 | MmioBitFieldWrite32 (\r | |
| 1919 | IN UINTN Address,\r | |
| 1920 | IN UINTN StartBit,\r | |
| 1921 | IN UINTN EndBit,\r | |
| 1922 | IN UINT32 Value\r | |
| 1923 | )\r | |
| 1924 | {\r | |
| 1925 | return MmioWrite32 (\r | |
| 1926 | Address,\r | |
| 1927 | BitFieldWrite32 (MmioRead32 (Address), StartBit, EndBit, Value)\r | |
| 1928 | );\r | |
| 1929 | }\r | |
| 1930 | \r | |
| 1931 | /**\r | |
| 1932 | Reads a bit field in a 32-bit MMIO register, performs a bitwise OR, and\r | |
| 1933 | writes the result back to the bit field in the 32-bit MMIO register.\r | |
| 1934 | \r | |
| 9095d37b | 1935 | Reads the 32-bit MMIO register specified by Address, performs a bitwise\r |
| 62991af2 | 1936 | OR between the read result and the value specified by OrData, and\r |
| e1f414b6 | 1937 | writes the result to the 32-bit MMIO register specified by Address. The value\r |
| 1938 | written to the MMIO register is returned. This function must guarantee that\r | |
| 35a17154 | 1939 | all MMIO read and write operations are serialized. Extra bits left in OrData\r |
| e1f414b6 | 1940 | are stripped.\r |
| 1941 | \r | |
| 1942 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 1943 | If Address is not aligned on a 32-bit boundary, then ASSERT().\r |
| e1f414b6 | 1944 | If StartBit is greater than 31, then ASSERT().\r |
| 1945 | If EndBit is greater than 31, then ASSERT().\r | |
| 1946 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 1947 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| e1f414b6 | 1948 | \r |
| 35a17154 | 1949 | @param Address The MMIO register to write.\r |
| e1f414b6 | 1950 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1951 | Range 0..31.\r | |
| 1952 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 1953 | Range 0..31.\r | |
| 1954 | @param OrData The value to OR with read value from the MMIO register.\r | |
| 1955 | \r | |
| 1956 | @return The value written back to the MMIO register.\r | |
| 1957 | \r | |
| 1958 | **/\r | |
| 1959 | UINT32\r | |
| 1960 | EFIAPI\r | |
| 1961 | MmioBitFieldOr32 (\r | |
| 1962 | IN UINTN Address,\r | |
| 1963 | IN UINTN StartBit,\r | |
| 1964 | IN UINTN EndBit,\r | |
| 1965 | IN UINT32 OrData\r | |
| 1966 | )\r | |
| 1967 | {\r | |
| 1968 | return MmioWrite32 (\r | |
| 1969 | Address,\r | |
| 1970 | BitFieldOr32 (MmioRead32 (Address), StartBit, EndBit, OrData)\r | |
| 1971 | );\r | |
| 1972 | }\r | |
| 1973 | \r | |
| 1974 | /**\r | |
| 1975 | Reads a bit field in a 32-bit MMIO register, performs a bitwise AND, and\r | |
| 1976 | writes the result back to the bit field in the 32-bit MMIO register.\r | |
| 1977 | \r | |
| 1978 | Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r | |
| 1979 | between the read result and the value specified by AndData, and writes the\r | |
| 1980 | result to the 32-bit MMIO register specified by Address. The value written to\r | |
| 1981 | the MMIO register is returned. This function must guarantee that all MMIO\r | |
| 35a17154 | 1982 | read and write operations are serialized. Extra bits left in AndData are\r |
| e1f414b6 | 1983 | stripped.\r |
| 1984 | \r | |
| 1985 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 1986 | If Address is not aligned on a 32-bit boundary, then ASSERT().\r |
| e1f414b6 | 1987 | If StartBit is greater than 31, then ASSERT().\r |
| 1988 | If EndBit is greater than 31, then ASSERT().\r | |
| 1989 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 1990 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| e1f414b6 | 1991 | \r |
| 35a17154 | 1992 | @param Address The MMIO register to write.\r |
| e1f414b6 | 1993 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 1994 | Range 0..31.\r | |
| 1995 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 1996 | Range 0..31.\r | |
| 1997 | @param AndData The value to AND with read value from the MMIO register.\r | |
| 1998 | \r | |
| 1999 | @return The value written back to the MMIO register.\r | |
| 2000 | \r | |
| 2001 | **/\r | |
| 2002 | UINT32\r | |
| 2003 | EFIAPI\r | |
| 2004 | MmioBitFieldAnd32 (\r | |
| 2005 | IN UINTN Address,\r | |
| 2006 | IN UINTN StartBit,\r | |
| 2007 | IN UINTN EndBit,\r | |
| 2008 | IN UINT32 AndData\r | |
| 2009 | )\r | |
| 2010 | {\r | |
| 2011 | return MmioWrite32 (\r | |
| 2012 | Address,\r | |
| 2013 | BitFieldAnd32 (MmioRead32 (Address), StartBit, EndBit, AndData)\r | |
| 2014 | );\r | |
| 2015 | }\r | |
| 2016 | \r | |
| 2017 | /**\r | |
| 2018 | Reads a bit field in a 32-bit MMIO register, performs a bitwise AND followed\r | |
| 62991af2 | 2019 | by a bitwise OR, and writes the result back to the bit field in the\r |
| e1f414b6 | 2020 | 32-bit MMIO register.\r |
| 2021 | \r | |
| 2022 | Reads the 32-bit MMIO register specified by Address, performs a bitwise AND\r | |
| 62991af2 | 2023 | followed by a bitwise OR between the read result and the value\r |
| e1f414b6 | 2024 | specified by AndData, and writes the result to the 32-bit MMIO register\r |
| 2025 | specified by Address. The value written to the MMIO register is returned.\r | |
| 2026 | This function must guarantee that all MMIO read and write operations are\r | |
| 35a17154 | 2027 | serialized. Extra bits left in both AndData and OrData are stripped.\r |
| e1f414b6 | 2028 | \r |
| 2029 | If 32-bit MMIO register operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 2030 | If Address is not aligned on a 32-bit boundary, then ASSERT().\r |
| e1f414b6 | 2031 | If StartBit is greater than 31, then ASSERT().\r |
| 2032 | If EndBit is greater than 31, then ASSERT().\r | |
| 2033 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 LG |
2034 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| 2035 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
| e1f414b6 | 2036 | \r |
| 35a17154 | 2037 | @param Address The MMIO register to write.\r |
| e1f414b6 | 2038 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2039 | Range 0..31.\r | |
| 2040 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 2041 | Range 0..31.\r | |
| 2042 | @param AndData The value to AND with read value from the MMIO register.\r | |
| 2043 | @param OrData The value to OR with the result of the AND operation.\r | |
| 2044 | \r | |
| 2045 | @return The value written back to the MMIO register.\r | |
| 2046 | \r | |
| 2047 | **/\r | |
| 2048 | UINT32\r | |
| 2049 | EFIAPI\r | |
| 2050 | MmioBitFieldAndThenOr32 (\r | |
| 2051 | IN UINTN Address,\r | |
| 2052 | IN UINTN StartBit,\r | |
| 2053 | IN UINTN EndBit,\r | |
| 2054 | IN UINT32 AndData,\r | |
| 2055 | IN UINT32 OrData\r | |
| 2056 | )\r | |
| 2057 | {\r | |
| 2058 | return MmioWrite32 (\r | |
| 2059 | Address,\r | |
| 2060 | BitFieldAndThenOr32 (MmioRead32 (Address), StartBit, EndBit, AndData, OrData)\r | |
| 2061 | );\r | |
| 2062 | }\r | |
| 2063 | \r | |
| 2064 | /**\r | |
| 62991af2 | 2065 | Reads a 64-bit MMIO register, performs a bitwise OR, and writes the\r |
| e1f414b6 | 2066 | result back to the 64-bit MMIO register.\r |
| 2067 | \r | |
| 9095d37b | 2068 | Reads the 64-bit MMIO register specified by Address, performs a bitwise\r |
| 62991af2 | 2069 | OR between the read result and the value specified by OrData, and\r |
| e1f414b6 | 2070 | writes the result to the 64-bit MMIO register specified by Address. The value\r |
| 2071 | written to the MMIO register is returned. This function must guarantee that\r | |
| 2072 | all MMIO read and write operations are serialized.\r | |
| 2073 | \r | |
| 2074 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 2075 | If Address is not aligned on a 64-bit boundary, then ASSERT().\r |
| e1f414b6 | 2076 | \r |
| 2077 | @param Address The MMIO register to write.\r | |
| 2078 | @param OrData The value to OR with the read value from the MMIO register.\r | |
| 2079 | \r | |
| 2080 | @return The value written back to the MMIO register.\r | |
| 2081 | \r | |
| 2082 | **/\r | |
| 2083 | UINT64\r | |
| 2084 | EFIAPI\r | |
| 2085 | MmioOr64 (\r | |
| 2086 | IN UINTN Address,\r | |
| 2087 | IN UINT64 OrData\r | |
| 2088 | )\r | |
| 2089 | {\r | |
| 2090 | return MmioWrite64 (Address, MmioRead64 (Address) | OrData);\r | |
| 2091 | }\r | |
| 2092 | \r | |
| 2093 | /**\r | |
| 2094 | Reads a 64-bit MMIO register, performs a bitwise AND, and writes the result\r | |
| 2095 | back to the 64-bit MMIO register.\r | |
| 2096 | \r | |
| 2097 | Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r | |
| 2098 | between the read result and the value specified by AndData, and writes the\r | |
| 2099 | result to the 64-bit MMIO register specified by Address. The value written to\r | |
| 2100 | the MMIO register is returned. This function must guarantee that all MMIO\r | |
| 2101 | read and write operations are serialized.\r | |
| 2102 | \r | |
| 2103 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 2104 | If Address is not aligned on a 64-bit boundary, then ASSERT().\r |
| e1f414b6 | 2105 | \r |
| 2106 | @param Address The MMIO register to write.\r | |
| 2107 | @param AndData The value to AND with the read value from the MMIO register.\r | |
| 2108 | \r | |
| 2109 | @return The value written back to the MMIO register.\r | |
| 2110 | \r | |
| 2111 | **/\r | |
| 2112 | UINT64\r | |
| 2113 | EFIAPI\r | |
| 2114 | MmioAnd64 (\r | |
| 2115 | IN UINTN Address,\r | |
| 2116 | IN UINT64 AndData\r | |
| 2117 | )\r | |
| 2118 | {\r | |
| 2119 | return MmioWrite64 (Address, MmioRead64 (Address) & AndData);\r | |
| 2120 | }\r | |
| 2121 | \r | |
| 2122 | /**\r | |
| 9095d37b | 2123 | Reads a 64-bit MMIO register, performs a bitwise AND followed by a bitwise\r |
| 62991af2 | 2124 | OR, and writes the result back to the 64-bit MMIO register.\r |
| e1f414b6 | 2125 | \r |
| 2126 | Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r | |
| 2127 | between the read result and the value specified by AndData, performs a\r | |
| 2128 | bitwise OR between the result of the AND operation and the value specified by\r | |
| 2129 | OrData, and writes the result to the 64-bit MMIO register specified by\r | |
| 2130 | Address. The value written to the MMIO register is returned. This function\r | |
| 2131 | must guarantee that all MMIO read and write operations are serialized.\r | |
| 2132 | \r | |
| 2133 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 2134 | If Address is not aligned on a 64-bit boundary, then ASSERT().\r |
| e1f414b6 | 2135 | \r |
| 2136 | @param Address The MMIO register to write.\r | |
| 2137 | @param AndData The value to AND with the read value from the MMIO register.\r | |
| 2138 | @param OrData The value to OR with the result of the AND operation.\r | |
| 2139 | \r | |
| 2140 | @return The value written back to the MMIO register.\r | |
| 2141 | \r | |
| 2142 | **/\r | |
| 2143 | UINT64\r | |
| 2144 | EFIAPI\r | |
| 2145 | MmioAndThenOr64 (\r | |
| 2146 | IN UINTN Address,\r | |
| 2147 | IN UINT64 AndData,\r | |
| 2148 | IN UINT64 OrData\r | |
| 2149 | )\r | |
| 2150 | {\r | |
| 2151 | return MmioWrite64 (Address, (MmioRead64 (Address) & AndData) | OrData);\r | |
| 2152 | }\r | |
| 2153 | \r | |
| 2154 | /**\r | |
| 2155 | Reads a bit field of a MMIO register.\r | |
| 2156 | \r | |
| 2157 | Reads the bit field in a 64-bit MMIO register. The bit field is specified by\r | |
| 2158 | the StartBit and the EndBit. The value of the bit field is returned.\r | |
| 2159 | \r | |
| 2160 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 2161 | If Address is not aligned on a 64-bit boundary, then ASSERT().\r |
| e1f414b6 | 2162 | If StartBit is greater than 63, then ASSERT().\r |
| 2163 | If EndBit is greater than 63, then ASSERT().\r | |
| 2164 | If EndBit is less than StartBit, then ASSERT().\r | |
| 2165 | \r | |
| 35a17154 | 2166 | @param Address The MMIO register to read.\r |
| e1f414b6 | 2167 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2168 | Range 0..63.\r | |
| 2169 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 2170 | Range 0..63.\r | |
| 2171 | \r | |
| 2281e7a9 | 2172 | @return The value read.\r |
| e1f414b6 | 2173 | \r |
| 2174 | **/\r | |
| 2175 | UINT64\r | |
| 2176 | EFIAPI\r | |
| 2177 | MmioBitFieldRead64 (\r | |
| 2178 | IN UINTN Address,\r | |
| 2179 | IN UINTN StartBit,\r | |
| 2180 | IN UINTN EndBit\r | |
| 2181 | )\r | |
| 2182 | {\r | |
| 2183 | return BitFieldRead64 (MmioRead64 (Address), StartBit, EndBit);\r | |
| 2184 | }\r | |
| 2185 | \r | |
| 2186 | /**\r | |
| 2187 | Writes a bit field to a MMIO register.\r | |
| 2188 | \r | |
| 2189 | Writes Value to the bit field of the MMIO register. The bit field is\r | |
| 2190 | specified by the StartBit and the EndBit. All other bits in the destination\r | |
| 2191 | MMIO register are preserved. The new value of the 64-bit register is returned.\r | |
| 2192 | \r | |
| 2193 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 2194 | If Address is not aligned on a 64-bit boundary, then ASSERT().\r |
| e1f414b6 | 2195 | If StartBit is greater than 63, then ASSERT().\r |
| 2196 | If EndBit is greater than 63, then ASSERT().\r | |
| 2197 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 2198 | If Value is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| e1f414b6 | 2199 | \r |
| 35a17154 | 2200 | @param Address The MMIO register to write.\r |
| e1f414b6 | 2201 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2202 | Range 0..63.\r | |
| 2203 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 2204 | Range 0..63.\r | |
| 2fc59a00 | 2205 | @param Value The new value of the bit field.\r |
| e1f414b6 | 2206 | \r |
| 2207 | @return The value written back to the MMIO register.\r | |
| 2208 | \r | |
| 2209 | **/\r | |
| 2210 | UINT64\r | |
| 2211 | EFIAPI\r | |
| 2212 | MmioBitFieldWrite64 (\r | |
| 2213 | IN UINTN Address,\r | |
| 2214 | IN UINTN StartBit,\r | |
| 2215 | IN UINTN EndBit,\r | |
| 2216 | IN UINT64 Value\r | |
| 2217 | )\r | |
| 2218 | {\r | |
| 2219 | return MmioWrite64 (\r | |
| 2220 | Address,\r | |
| 2221 | BitFieldWrite64 (MmioRead64 (Address), StartBit, EndBit, Value)\r | |
| 2222 | );\r | |
| 2223 | }\r | |
| 2224 | \r | |
| 2225 | /**\r | |
| 2226 | Reads a bit field in a 64-bit MMIO register, performs a bitwise OR, and\r | |
| 2227 | writes the result back to the bit field in the 64-bit MMIO register.\r | |
| 2228 | \r | |
| 9095d37b | 2229 | Reads the 64-bit MMIO register specified by Address, performs a bitwise\r |
| 62991af2 | 2230 | OR between the read result and the value specified by OrData, and\r |
| e1f414b6 | 2231 | writes the result to the 64-bit MMIO register specified by Address. The value\r |
| 2232 | written to the MMIO register is returned. This function must guarantee that\r | |
| 35a17154 | 2233 | all MMIO read and write operations are serialized. Extra bits left in OrData\r |
| e1f414b6 | 2234 | are stripped.\r |
| 2235 | \r | |
| 2236 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 2237 | If Address is not aligned on a 64-bit boundary, then ASSERT().\r |
| e1f414b6 | 2238 | If StartBit is greater than 63, then ASSERT().\r |
| 2239 | If EndBit is greater than 63, then ASSERT().\r | |
| 2240 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 2241 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| e1f414b6 | 2242 | \r |
| 35a17154 | 2243 | @param Address The MMIO register to write.\r |
| e1f414b6 | 2244 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2245 | Range 0..63.\r | |
| 2246 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 2247 | Range 0..63.\r | |
| 2248 | @param OrData The value to OR with read value from the MMIO register.\r | |
| 2249 | \r | |
| 2250 | @return The value written back to the MMIO register.\r | |
| 2251 | \r | |
| 2252 | **/\r | |
| 2253 | UINT64\r | |
| 2254 | EFIAPI\r | |
| 2255 | MmioBitFieldOr64 (\r | |
| 2256 | IN UINTN Address,\r | |
| 2257 | IN UINTN StartBit,\r | |
| 2258 | IN UINTN EndBit,\r | |
| 2259 | IN UINT64 OrData\r | |
| 2260 | )\r | |
| 2261 | {\r | |
| 2262 | return MmioWrite64 (\r | |
| 2263 | Address,\r | |
| 2264 | BitFieldOr64 (MmioRead64 (Address), StartBit, EndBit, OrData)\r | |
| 2265 | );\r | |
| 2266 | }\r | |
| 2267 | \r | |
| 2268 | /**\r | |
| 2269 | Reads a bit field in a 64-bit MMIO register, performs a bitwise AND, and\r | |
| 2270 | writes the result back to the bit field in the 64-bit MMIO register.\r | |
| 2271 | \r | |
| 2272 | Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r | |
| 2273 | between the read result and the value specified by AndData, and writes the\r | |
| 2274 | result to the 64-bit MMIO register specified by Address. The value written to\r | |
| 2275 | the MMIO register is returned. This function must guarantee that all MMIO\r | |
| 35a17154 | 2276 | read and write operations are serialized. Extra bits left in AndData are\r |
| e1f414b6 | 2277 | stripped.\r |
| 2278 | \r | |
| 2279 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 2280 | If Address is not aligned on a 64-bit boundary, then ASSERT().\r |
| e1f414b6 | 2281 | If StartBit is greater than 63, then ASSERT().\r |
| 2282 | If EndBit is greater than 63, then ASSERT().\r | |
| 2283 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 | 2284 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| e1f414b6 | 2285 | \r |
| 35a17154 | 2286 | @param Address The MMIO register to write.\r |
| e1f414b6 | 2287 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2288 | Range 0..63.\r | |
| 2289 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 2290 | Range 0..63.\r | |
| 2291 | @param AndData The value to AND with read value from the MMIO register.\r | |
| 2292 | \r | |
| 2293 | @return The value written back to the MMIO register.\r | |
| 2294 | \r | |
| 2295 | **/\r | |
| 2296 | UINT64\r | |
| 2297 | EFIAPI\r | |
| 2298 | MmioBitFieldAnd64 (\r | |
| 2299 | IN UINTN Address,\r | |
| 2300 | IN UINTN StartBit,\r | |
| 2301 | IN UINTN EndBit,\r | |
| 2302 | IN UINT64 AndData\r | |
| 2303 | )\r | |
| 2304 | {\r | |
| 2305 | return MmioWrite64 (\r | |
| 2306 | Address,\r | |
| 2307 | BitFieldAnd64 (MmioRead64 (Address), StartBit, EndBit, AndData)\r | |
| 2308 | );\r | |
| 2309 | }\r | |
| 2310 | \r | |
| 2311 | /**\r | |
| 2312 | Reads a bit field in a 64-bit MMIO register, performs a bitwise AND followed\r | |
| 62991af2 | 2313 | by a bitwise OR, and writes the result back to the bit field in the\r |
| e1f414b6 | 2314 | 64-bit MMIO register.\r |
| 2315 | \r | |
| 2316 | Reads the 64-bit MMIO register specified by Address, performs a bitwise AND\r | |
| 62991af2 | 2317 | followed by a bitwise OR between the read result and the value\r |
| e1f414b6 | 2318 | specified by AndData, and writes the result to the 64-bit MMIO register\r |
| 2319 | specified by Address. The value written to the MMIO register is returned.\r | |
| 2320 | This function must guarantee that all MMIO read and write operations are\r | |
| 35a17154 | 2321 | serialized. Extra bits left in both AndData and OrData are stripped.\r |
| e1f414b6 | 2322 | \r |
| 2323 | If 64-bit MMIO register operations are not supported, then ASSERT().\r | |
| 2281e7a9 | 2324 | If Address is not aligned on a 64-bit boundary, then ASSERT().\r |
| e1f414b6 | 2325 | If StartBit is greater than 63, then ASSERT().\r |
| 2326 | If EndBit is greater than 63, then ASSERT().\r | |
| 2327 | If EndBit is less than StartBit, then ASSERT().\r | |
| 94952554 LG |
2328 | If AndData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r |
| 2329 | If OrData is larger than the bitmask value range specified by StartBit and EndBit, then ASSERT().\r | |
| e1f414b6 | 2330 | \r |
| 35a17154 | 2331 | @param Address The MMIO register to write.\r |
| e1f414b6 | 2332 | @param StartBit The ordinal of the least significant bit in the bit field.\r |
| 2333 | Range 0..63.\r | |
| 2334 | @param EndBit The ordinal of the most significant bit in the bit field.\r | |
| 2335 | Range 0..63.\r | |
| 2336 | @param AndData The value to AND with read value from the MMIO register.\r | |
| 2337 | @param OrData The value to OR with the result of the AND operation.\r | |
| 2338 | \r | |
| 2339 | @return The value written back to the MMIO register.\r | |
| 2340 | \r | |
| 2341 | **/\r | |
| 2342 | UINT64\r | |
| 2343 | EFIAPI\r | |
| 2344 | MmioBitFieldAndThenOr64 (\r | |
| 2345 | IN UINTN Address,\r | |
| 2346 | IN UINTN StartBit,\r | |
| 2347 | IN UINTN EndBit,\r | |
| 2348 | IN UINT64 AndData,\r | |
| 2349 | IN UINT64 OrData\r | |
| 2350 | )\r | |
| 2351 | {\r | |
| 2352 | return MmioWrite64 (\r | |
| 2353 | Address,\r | |
| 2354 | BitFieldAndThenOr64 (MmioRead64 (Address), StartBit, EndBit, AndData, OrData)\r | |
| 2355 | );\r | |
| 2356 | }\r |