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1;------------------------------------------------------------------------------\r
2;\r
3; GetInterruptState() function for AArch64\r
4;\r
5; Copyright (c) 2006 - 2009, Intel Corporation. All rights reserved.<BR>\r
6; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
7; Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r
9344f092 8; SPDX-License-Identifier: BSD-2-Clause-Patent\r
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9;\r
10;------------------------------------------------------------------------------\r
11\r
12 EXPORT GetInterruptState\r
13 AREA BaseLib_LowLevel, CODE, READONLY\r
14\r
15DAIF_RD_IRQ_BIT EQU (1 << 7)\r
16\r
17;/**\r
18; Retrieves the current CPU interrupt state.\r
19;\r
20; Returns TRUE is interrupts are currently enabled. Otherwise\r
21; returns FALSE.\r
22;\r
23; @retval TRUE CPU interrupts are enabled.\r
24; @retval FALSE CPU interrupts are disabled.\r
25;\r
26;**/\r
27;\r
28;BOOLEAN\r
29;EFIAPI\r
30;GetInterruptState (\r
31; VOID\r
32; );\r
33;\r
34GetInterruptState\r
35 mrs x0, daif\r
36 mov w0, wzr\r
37 tst x0, #DAIF_RD_IRQ_BIT // Check IRQ mask; set Z=1 if clear/unmasked\r
38 bne exit // if Z=1 (eq) return 1, else 0\r
39 mov w0, #1\r
40exit\r
41 ret\r
42\r
43 END\r