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9095d37b | 1 | #------------------------------------------------------------------------------\r |
ebd04fc2 | 2 | #\r |
3 | # CpuBreakpoint() for ARM\r | |
4 | #\r | |
9095d37b | 5 | # Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r |
bb817c56 | 6 | # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r |
9344f092 | 7 | # SPDX-License-Identifier: BSD-2-Clause-Patent\r |
ebd04fc2 | 8 | #\r |
9 | #------------------------------------------------------------------------------\r | |
10 | \r | |
11 | .text\r | |
ea3c1b3a | 12 | .p2align 2\r |
4c8a6e06 | 13 | GCC_ASM_EXPORT(CpuBreakpoint)\r |
ebd04fc2 | 14 | \r |
15 | #/**\r | |
16 | # Generates a breakpoint on the CPU.\r | |
17 | #\r | |
18 | # Generates a breakpoint on the CPU. The breakpoint must be implemented such\r | |
19 | # that code can resume normal execution after the breakpoint.\r | |
20 | #\r | |
21 | #**/\r | |
22 | #VOID\r | |
23 | #EFIAPI\r | |
24 | #CpuBreakpoint (\r | |
25 | # VOID\r | |
26 | # );\r | |
27 | #\r | |
28 | ASM_PFX(CpuBreakpoint):\r | |
9095d37b | 29 | swi 0xdbdbdb\r |
ebd04fc2 | 30 | bx lr\r |