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9095d37b | 1 | ;------------------------------------------------------------------------------\r |
ebd04fc2 | 2 | ;\r |
3 | ; CpuPause() for ARM\r | |
4 | ;\r | |
9095d37b | 5 | ; Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r |
bb817c56 HT |
6 | ; Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r |
7 | ; This program and the accompanying materials\r | |
ebd04fc2 | 8 | ; are licensed and made available under the terms and conditions of the BSD License\r |
9 | ; which accompanies this distribution. The full text of the license may be found at\r | |
35a17154 | 10 | ; http://opensource.org/licenses/bsd-license.php.\r |
ebd04fc2 | 11 | ;\r |
12 | ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
13 | ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
14 | ;\r | |
15 | ;------------------------------------------------------------------------------\r | |
16 | \r | |
17 | EXPORT CpuPause\r | |
18 | AREA cpu_pause, CODE, READONLY\r | |
19 | \r | |
20 | ;/**\r | |
21 | ; Requests CPU to pause for a short period of time.\r | |
22 | ;\r | |
23 | ; Requests CPU to pause for a short period of time. Typically used in MP\r | |
24 | ; systems to prevent memory starvation while waiting for a spin lock.\r | |
25 | ;\r | |
26 | ;**/\r | |
27 | ;VOID\r | |
28 | ;EFIAPI\r | |
29 | ;CpuPause (\r | |
30 | ; VOID\r | |
31 | ; );\r | |
32 | ;\r | |
33 | CpuPause\r | |
34 | NOP\r | |
35 | NOP\r | |
36 | NOP\r | |
37 | NOP\r | |
38 | NOP\r | |
39 | BX LR\r | |
40 | \r | |
41 | END\r |