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9095d37b | 1 | #------------------------------------------------------------------------------\r |
ebd04fc2 | 2 | #\r |
3 | # EnableInterrupts() for ARM\r | |
4 | #\r | |
9095d37b | 5 | # Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r |
bb817c56 | 6 | # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r |
9344f092 | 7 | # SPDX-License-Identifier: BSD-2-Clause-Patent\r |
ebd04fc2 | 8 | #\r |
9 | #------------------------------------------------------------------------------\r | |
10 | \r | |
11 | .text\r | |
12 | .p2align 2\r | |
4c8a6e06 | 13 | GCC_ASM_EXPORT(EnableInterrupts)\r |
ebd04fc2 | 14 | \r |
15 | \r | |
16 | #/**\r | |
17 | # Enables CPU interrupts.\r | |
18 | #\r | |
19 | #**/\r | |
20 | #VOID\r | |
21 | #EFIAPI\r | |
22 | #EnableInterrupts (\r | |
23 | # VOID\r | |
24 | # );\r | |
25 | #\r | |
26 | ASM_PFX(EnableInterrupts):\r | |
27 | mrs R0,CPSR\r | |
01a54966 | 28 | bic R0,R0,#0x80 @Enable IRQ interrupts\r |
ebd04fc2 | 29 | msr CPSR_c,R0\r |
30 | bx LR\r |