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e1f414b6 1#/** @file\r
34b0820e 2# Base Library implementation.\r
85ea851e 3#\r
287f4f47 4# Copyright (c) 2007 - 2009, Intel Corporation.\r
e1f414b6 5#\r
6# All rights reserved. This program and the accompanying materials\r
7# are licensed and made available under the terms and conditions of the BSD License\r
8# which accompanies this distribution. The full text of the license may be found at\r
9# http://opensource.org/licenses/bsd-license.php\r
10# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12#\r
13#\r
14#**/\r
15\r
e1f414b6 16[Defines]\r
17 INF_VERSION = 0x00010005\r
18 BASE_NAME = BaseLib\r
19 FILE_GUID = 27d67720-ea68-48ae-93da-a3a074c90e30\r
20 MODULE_TYPE = BASE\r
21 VERSION_STRING = 1.0\r
22 LIBRARY_CLASS = BaseLib \r
e1f414b6 23\r
e1f414b6 24#\r
25# VALID_ARCHITECTURES = IA32 X64 IPF EBC\r
26#\r
27\r
e1f414b6 28[Sources.common]\r
29 CheckSum.c\r
30 SwitchStack.c\r
31 SwapBytes64.c\r
32 SwapBytes32.c\r
33 SwapBytes16.c\r
34 LongJump.c\r
35 SetJump.c\r
36 RShiftU64.c\r
37 RRotU64.c\r
38 RRotU32.c\r
39 MultU64x64.c\r
40 MultU64x32.c\r
41 MultS64x64.c\r
42 ModU64x32.c\r
43 LShiftU64.c\r
44 LRotU64.c\r
45 LRotU32.c\r
46 LowBitSet64.c\r
47 LowBitSet32.c\r
48 HighBitSet64.c\r
49 HighBitSet32.c\r
50 GetPowerOfTwo64.c\r
51 GetPowerOfTwo32.c\r
52 DivU64x64Remainder.c\r
53 DivU64x32Remainder.c\r
54 DivU64x32.c\r
55 DivS64x64Remainder.c\r
56 ARShiftU64.c\r
57 BitField.c\r
58 CpuDeadLoop.c\r
59 Cpu.c\r
60 LinkedList.c\r
61 String.c\r
62 BaseLibInternals.h\r
e1f414b6 63\r
64[Sources.Ia32]\r
6b4fe92a 65 Ia32/Wbinvd.c | MSFT \r
66 Ia32/WriteMm7.c | MSFT \r
67 Ia32/WriteMm6.c | MSFT \r
68 Ia32/WriteMm5.c | MSFT \r
69 Ia32/WriteMm4.c | MSFT \r
70 Ia32/WriteMm3.c | MSFT \r
71 Ia32/WriteMm2.c | MSFT \r
72 Ia32/WriteMm1.c | MSFT \r
73 Ia32/WriteMm0.c | MSFT \r
74 Ia32/WriteLdtr.c | MSFT \r
75 Ia32/WriteIdtr.c | MSFT \r
76 Ia32/WriteGdtr.c | MSFT \r
77 Ia32/WriteDr7.c | MSFT \r
78 Ia32/WriteDr6.c | MSFT \r
79 Ia32/WriteDr5.c | MSFT \r
80 Ia32/WriteDr4.c | MSFT \r
81 Ia32/WriteDr3.c | MSFT \r
82 Ia32/WriteDr2.c | MSFT \r
83 Ia32/WriteDr1.c | MSFT \r
84 Ia32/WriteDr0.c | MSFT \r
85 Ia32/WriteCr4.c | MSFT \r
86 Ia32/WriteCr3.c | MSFT \r
87 Ia32/WriteCr2.c | MSFT \r
88 Ia32/WriteCr0.c | MSFT \r
89 Ia32/WriteMsr64.c | MSFT \r
6b4fe92a 90 Ia32/SwapBytes64.c | MSFT \r
91 Ia32/SetJump.c | MSFT \r
92 Ia32/RRotU64.c | MSFT \r
93 Ia32/RShiftU64.c | MSFT \r
94 Ia32/ReadPmc.c | MSFT \r
95 Ia32/ReadTsc.c | MSFT \r
96 Ia32/ReadLdtr.c | MSFT \r
97 Ia32/ReadIdtr.c | MSFT \r
98 Ia32/ReadGdtr.c | MSFT \r
99 Ia32/ReadTr.c | MSFT \r
100 Ia32/ReadSs.c | MSFT \r
101 Ia32/ReadGs.c | MSFT \r
102 Ia32/ReadFs.c | MSFT \r
103 Ia32/ReadEs.c | MSFT \r
104 Ia32/ReadDs.c | MSFT \r
105 Ia32/ReadCs.c | MSFT \r
106 Ia32/ReadMsr64.c | MSFT \r
107 Ia32/ReadMm7.c | MSFT \r
108 Ia32/ReadMm6.c | MSFT \r
109 Ia32/ReadMm5.c | MSFT \r
110 Ia32/ReadMm4.c | MSFT \r
111 Ia32/ReadMm3.c | MSFT \r
112 Ia32/ReadMm2.c | MSFT \r
113 Ia32/ReadMm1.c | MSFT \r
114 Ia32/ReadMm0.c | MSFT \r
115 Ia32/ReadEflags.c | MSFT \r
116 Ia32/ReadDr7.c | MSFT \r
117 Ia32/ReadDr6.c | MSFT \r
118 Ia32/ReadDr5.c | MSFT \r
119 Ia32/ReadDr4.c | MSFT \r
120 Ia32/ReadDr3.c | MSFT \r
121 Ia32/ReadDr2.c | MSFT \r
122 Ia32/ReadDr1.c | MSFT \r
123 Ia32/ReadDr0.c | MSFT \r
124 Ia32/ReadCr4.c | MSFT \r
125 Ia32/ReadCr3.c | MSFT \r
126 Ia32/ReadCr2.c | MSFT \r
127 Ia32/ReadCr0.c | MSFT \r
128 Ia32/Mwait.c | MSFT \r
129 Ia32/Monitor.c | MSFT \r
130 Ia32/ModU64x32.c | MSFT \r
131 Ia32/MultU64x64.c | MSFT \r
132 Ia32/MultU64x32.c | MSFT \r
133 Ia32/LShiftU64.c | MSFT \r
134 Ia32/LRotU64.c | MSFT \r
135 Ia32/LongJump.c | MSFT \r
136 Ia32/Invd.c | MSFT \r
6b4fe92a 137 Ia32/FxRestore.c | MSFT \r
138 Ia32/FxSave.c | MSFT \r
139 Ia32/FlushCacheLine.c | MSFT \r
6b4fe92a 140 Ia32/EnablePaging32.c | MSFT \r
141 Ia32/EnableInterrupts.c | MSFT \r
142 Ia32/EnableDisableInterrupts.c | MSFT \r
41c7f551 143 Ia32/DivU64x64Remainder.asm | MSFT \r
6b4fe92a 144 Ia32/DivU64x32Remainder.c | MSFT \r
145 Ia32/DivU64x32.c | MSFT \r
146 Ia32/DisablePaging32.c | MSFT \r
147 Ia32/DisableInterrupts.c | MSFT \r
148 Ia32/CpuPause.c | MSFT \r
149 Ia32/CpuIdEx.c | MSFT \r
150 Ia32/CpuId.c | MSFT \r
6b4fe92a 151 Ia32/CpuBreakpoint.c | MSFT \r
152 Ia32/ARShiftU64.c | MSFT \r
b26978d3 153 Ia32/Thunk16.asm | MSFT\r
154 Ia32/EnablePaging64.asm | MSFT\r
9f4f2f0e 155 Ia32/EnableCache.c | MSFT\r
156 Ia32/DisableCache.c | MSFT\r
d074a8e1 157\r
158 Ia32/Wbinvd.asm | INTEL \r
159 Ia32/WriteMm7.asm | INTEL \r
160 Ia32/WriteMm6.asm | INTEL \r
161 Ia32/WriteMm5.asm | INTEL \r
162 Ia32/WriteMm4.asm | INTEL \r
163 Ia32/WriteMm3.asm | INTEL \r
164 Ia32/WriteMm2.asm | INTEL \r
165 Ia32/WriteMm1.asm | INTEL \r
166 Ia32/WriteMm0.asm | INTEL \r
167 Ia32/WriteLdtr.asm | INTEL \r
168 Ia32/WriteIdtr.asm | INTEL \r
169 Ia32/WriteGdtr.asm | INTEL \r
170 Ia32/WriteDr7.asm | INTEL \r
171 Ia32/WriteDr6.asm | INTEL \r
172 Ia32/WriteDr5.asm | INTEL \r
173 Ia32/WriteDr4.asm | INTEL \r
174 Ia32/WriteDr3.asm | INTEL \r
175 Ia32/WriteDr2.asm | INTEL \r
176 Ia32/WriteDr1.asm | INTEL \r
177 Ia32/WriteDr0.asm | INTEL \r
178 Ia32/WriteCr4.asm | INTEL \r
179 Ia32/WriteCr3.asm | INTEL \r
180 Ia32/WriteCr2.asm | INTEL \r
181 Ia32/WriteCr0.asm | INTEL \r
182 Ia32/WriteMsr64.asm | INTEL \r
183 Ia32/SwapBytes64.asm | INTEL \r
184 Ia32/SetJump.asm | INTEL \r
185 Ia32/RRotU64.asm | INTEL \r
186 Ia32/RShiftU64.asm | INTEL \r
187 Ia32/ReadPmc.asm | INTEL \r
188 Ia32/ReadTsc.asm | INTEL \r
189 Ia32/ReadLdtr.asm | INTEL \r
190 Ia32/ReadIdtr.asm | INTEL \r
191 Ia32/ReadGdtr.asm | INTEL \r
192 Ia32/ReadTr.asm | INTEL \r
193 Ia32/ReadSs.asm | INTEL \r
194 Ia32/ReadGs.asm | INTEL \r
195 Ia32/ReadFs.asm | INTEL \r
196 Ia32/ReadEs.asm | INTEL \r
197 Ia32/ReadDs.asm | INTEL \r
198 Ia32/ReadCs.asm | INTEL \r
199 Ia32/ReadMsr64.asm | INTEL \r
200 Ia32/ReadMm7.asm | INTEL \r
201 Ia32/ReadMm6.asm | INTEL \r
202 Ia32/ReadMm5.asm | INTEL \r
203 Ia32/ReadMm4.asm | INTEL \r
204 Ia32/ReadMm3.asm | INTEL \r
205 Ia32/ReadMm2.asm | INTEL \r
206 Ia32/ReadMm1.asm | INTEL \r
207 Ia32/ReadMm0.asm | INTEL \r
208 Ia32/ReadEflags.asm | INTEL \r
209 Ia32/ReadDr7.asm | INTEL \r
210 Ia32/ReadDr6.asm | INTEL \r
211 Ia32/ReadDr5.asm | INTEL \r
212 Ia32/ReadDr4.asm | INTEL \r
213 Ia32/ReadDr3.asm | INTEL \r
214 Ia32/ReadDr2.asm | INTEL \r
215 Ia32/ReadDr1.asm | INTEL \r
216 Ia32/ReadDr0.asm | INTEL \r
217 Ia32/ReadCr4.asm | INTEL \r
218 Ia32/ReadCr3.asm | INTEL \r
219 Ia32/ReadCr2.asm | INTEL \r
220 Ia32/ReadCr0.asm | INTEL \r
221 Ia32/Mwait.asm | INTEL \r
222 Ia32/Monitor.asm | INTEL \r
223 Ia32/ModU64x32.asm | INTEL \r
224 Ia32/MultU64x64.asm | INTEL \r
225 Ia32/MultU64x32.asm | INTEL \r
226 Ia32/LShiftU64.asm | INTEL \r
227 Ia32/LRotU64.asm | INTEL \r
228 Ia32/LongJump.asm | INTEL \r
229 Ia32/Invd.asm | INTEL \r
d074a8e1 230 Ia32/FxRestore.asm | INTEL \r
231 Ia32/FxSave.asm | INTEL \r
232 Ia32/FlushCacheLine.asm | INTEL \r
233 Ia32/EnablePaging32.asm | INTEL \r
234 Ia32/EnableInterrupts.asm | INTEL \r
235 Ia32/EnableDisableInterrupts.asm | INTEL \r
236 Ia32/DivU64x64Remainder.asm | INTEL \r
237 Ia32/DivU64x32Remainder.asm | INTEL \r
238 Ia32/DivU64x32.asm | INTEL \r
239 Ia32/DisablePaging32.asm | INTEL \r
240 Ia32/DisableInterrupts.asm | INTEL \r
241 Ia32/CpuPause.asm | INTEL \r
242 Ia32/CpuIdEx.asm | INTEL \r
243 Ia32/CpuId.asm | INTEL \r
d074a8e1 244 Ia32/CpuBreakpoint.asm | INTEL \r
245 Ia32/ARShiftU64.asm | INTEL \r
b26978d3 246 Ia32/Thunk16.asm | INTEL\r
247 Ia32/EnablePaging64.asm | INTEL\r
9f4f2f0e 248 Ia32/EnableCache.asm | INTEL\r
249 Ia32/DisableCache.asm | INTEL\r
d074a8e1 250\r
6b4fe92a 251 Ia32/Thunk16.S | GCC \r
6b4fe92a 252 Ia32/CpuBreakpoint.S | GCC \r
253 Ia32/CpuPause.S | GCC \r
6b4fe92a 254 Ia32/EnableDisableInterrupts.S | GCC \r
255 Ia32/DisableInterrupts.S | GCC \r
256 Ia32/EnableInterrupts.S | GCC \r
6b4fe92a 257 Ia32/FlushCacheLine.S | GCC \r
258 Ia32/Invd.S | GCC \r
259 Ia32/Wbinvd.S | GCC \r
260 Ia32/EnablePaging64.S | GCC \r
261 Ia32/DisablePaging32.S | GCC \r
262 Ia32/EnablePaging32.S | GCC \r
263 Ia32/Mwait.S | GCC \r
264 Ia32/Monitor.S | GCC \r
265 Ia32/ReadPmc.S | GCC \r
266 Ia32/ReadTsc.S | GCC \r
267 Ia32/WriteMm7.S | GCC \r
268 Ia32/WriteMm6.S | GCC \r
269 Ia32/WriteMm5.S | GCC \r
270 Ia32/WriteMm4.S | GCC \r
271 Ia32/WriteMm3.S | GCC \r
272 Ia32/WriteMm2.S | GCC \r
273 Ia32/WriteMm1.S | GCC \r
274 Ia32/WriteMm0.S | GCC \r
275 Ia32/ReadMm7.S | GCC \r
276 Ia32/ReadMm6.S | GCC \r
277 Ia32/ReadMm5.S | GCC \r
278 Ia32/ReadMm4.S | GCC \r
279 Ia32/ReadMm3.S | GCC \r
280 Ia32/ReadMm2.S | GCC \r
281 Ia32/ReadMm1.S | GCC \r
282 Ia32/ReadMm0.S | GCC \r
283 Ia32/FxRestore.S | GCC \r
284 Ia32/FxSave.S | GCC \r
285 Ia32/WriteLdtr.S | GCC \r
286 Ia32/ReadLdtr.S | GCC \r
287 Ia32/WriteIdtr.S | GCC \r
288 Ia32/ReadIdtr.S | GCC \r
289 Ia32/WriteGdtr.S | GCC \r
290 Ia32/ReadGdtr.S | GCC \r
291 Ia32/ReadTr.S | GCC \r
292 Ia32/ReadSs.S | GCC \r
293 Ia32/ReadGs.S | GCC \r
294 Ia32/ReadFs.S | GCC \r
295 Ia32/ReadEs.S | GCC \r
296 Ia32/ReadDs.S | GCC \r
297 Ia32/ReadCs.S | GCC \r
298 Ia32/WriteDr7.S | GCC \r
299 Ia32/WriteDr6.S | GCC \r
300 Ia32/WriteDr5.S | GCC \r
301 Ia32/WriteDr4.S | GCC \r
302 Ia32/WriteDr3.S | GCC \r
303 Ia32/WriteDr2.S | GCC \r
304 Ia32/WriteDr1.S | GCC \r
305 Ia32/WriteDr0.S | GCC \r
306 Ia32/ReadDr7.S | GCC \r
307 Ia32/ReadDr6.S | GCC \r
308 Ia32/ReadDr5.S | GCC \r
309 Ia32/ReadDr4.S | GCC \r
310 Ia32/ReadDr3.S | GCC \r
311 Ia32/ReadDr2.S | GCC \r
312 Ia32/ReadDr1.S | GCC \r
313 Ia32/ReadDr0.S | GCC \r
314 Ia32/WriteCr4.S | GCC \r
315 Ia32/WriteCr3.S | GCC \r
316 Ia32/WriteCr2.S | GCC \r
317 Ia32/WriteCr0.S | GCC \r
318 Ia32/ReadCr4.S | GCC \r
319 Ia32/ReadCr3.S | GCC \r
320 Ia32/ReadCr2.S | GCC \r
321 Ia32/ReadCr0.S | GCC \r
322 Ia32/WriteMsr64.S | GCC \r
323 Ia32/ReadMsr64.S | GCC \r
324 Ia32/ReadEflags.S | GCC \r
325 Ia32/CpuIdEx.S | GCC \r
326 Ia32/CpuId.S | GCC \r
327 Ia32/LongJump.S | GCC \r
328 Ia32/SetJump.S | GCC \r
329 Ia32/SwapBytes64.S | GCC \r
330 Ia32/DivU64x64Remainder.S | GCC \r
331 Ia32/DivU64x32Remainder.S | GCC \r
332 Ia32/ModU64x32.S | GCC \r
333 Ia32/DivU64x32.S | GCC \r
334 Ia32/MultU64x64.S | GCC \r
335 Ia32/MultU64x32.S | GCC \r
336 Ia32/RRotU64.S | GCC \r
337 Ia32/LRotU64.S | GCC \r
338 Ia32/ARShiftU64.S | GCC \r
339 Ia32/RShiftU64.S | GCC \r
340 Ia32/LShiftU64.S | GCC \r
9f4f2f0e 341 Ia32/EnableCache.S | GCC\r
342 Ia32/DisableCache.S | GCC\r
d074a8e1 343\r
bb40027d 344 Ia32/DivS64x64Remainder.c\r
e1f414b6 345 Ia32/InternalSwitchStack.c\r
346 Ia32/Non-existing.c\r
347 Unaligned.c\r
b26978d3 348 X86WriteIdtr.c\r
349 X86WriteGdtr.c\r
350 X86Thunk.c\r
351 X86ReadIdtr.c\r
352 X86ReadGdtr.c\r
353 X86Msr.c\r
354 X86MemoryFence.c\r
355 X86GetInterruptState.c\r
356 X86FxSave.c\r
357 X86FxRestore.c\r
358 X86EnablePaging64.c\r
359 X86EnablePaging32.c\r
360 X86DisablePaging64.c\r
361 X86DisablePaging32.c\r
e1f414b6 362\r
363[Sources.X64]\r
364 X64/Thunk16.asm\r
e1f414b6 365 X64/CpuPause.asm\r
e1f414b6 366 X64/EnableDisableInterrupts.asm\r
367 X64/DisableInterrupts.asm\r
368 X64/EnableInterrupts.asm\r
e1f414b6 369 X64/FlushCacheLine.asm\r
370 X64/Invd.asm\r
371 X64/Wbinvd.asm\r
372 X64/DisablePaging64.asm\r
e1f414b6 373 X64/Mwait.asm\r
374 X64/Monitor.asm\r
375 X64/ReadPmc.asm\r
376 X64/ReadTsc.asm\r
377 X64/WriteMm7.asm\r
378 X64/WriteMm6.asm\r
379 X64/WriteMm5.asm\r
380 X64/WriteMm4.asm\r
381 X64/WriteMm3.asm\r
382 X64/WriteMm2.asm\r
383 X64/WriteMm1.asm\r
384 X64/WriteMm0.asm\r
385 X64/ReadMm7.asm\r
386 X64/ReadMm6.asm\r
387 X64/ReadMm5.asm\r
388 X64/ReadMm4.asm\r
389 X64/ReadMm3.asm\r
390 X64/ReadMm2.asm\r
391 X64/ReadMm1.asm\r
392 X64/ReadMm0.asm\r
393 X64/FxRestore.asm\r
394 X64/FxSave.asm\r
395 X64/WriteLdtr.asm\r
396 X64/ReadLdtr.asm\r
397 X64/WriteIdtr.asm\r
398 X64/ReadIdtr.asm\r
399 X64/WriteGdtr.asm\r
400 X64/ReadGdtr.asm\r
401 X64/ReadTr.asm\r
402 X64/ReadSs.asm\r
403 X64/ReadGs.asm\r
404 X64/ReadFs.asm\r
405 X64/ReadEs.asm\r
406 X64/ReadDs.asm\r
407 X64/ReadCs.asm\r
408 X64/WriteDr7.asm\r
409 X64/WriteDr6.asm\r
410 X64/WriteDr5.asm\r
411 X64/WriteDr4.asm\r
412 X64/WriteDr3.asm\r
413 X64/WriteDr2.asm\r
414 X64/WriteDr1.asm\r
415 X64/WriteDr0.asm\r
416 X64/ReadDr7.asm\r
417 X64/ReadDr6.asm\r
418 X64/ReadDr5.asm\r
419 X64/ReadDr4.asm\r
420 X64/ReadDr3.asm\r
421 X64/ReadDr2.asm\r
422 X64/ReadDr1.asm\r
423 X64/ReadDr0.asm\r
424 X64/WriteCr4.asm\r
425 X64/WriteCr3.asm\r
426 X64/WriteCr2.asm\r
427 X64/WriteCr0.asm\r
428 X64/ReadCr4.asm\r
429 X64/ReadCr3.asm\r
430 X64/ReadCr2.asm\r
431 X64/ReadCr0.asm\r
e1f414b6 432 X64/ReadEflags.asm\r
433 X64/CpuIdEx.asm\r
434 X64/CpuId.asm\r
435 X64/LongJump.asm\r
436 X64/SetJump.asm\r
437 X64/SwitchStack.asm\r
9f4f2f0e 438 X64/EnableCache.asm\r
439 X64/DisableCache.asm\r
d074a8e1 440\r
d074a8e1 441 X64/CpuBreakpoint.c | MSFT \r
442 X64/WriteMsr64.c | MSFT \r
443 X64/ReadMsr64.c | MSFT \r
d074a8e1 444\r
d074a8e1 445 X64/CpuBreakpoint.asm | INTEL \r
446 X64/WriteMsr64.asm | INTEL \r
447 X64/ReadMsr64.asm | INTEL \r
d074a8e1 448\r
e1f414b6 449 X64/Non-existing.c\r
450 Math64.c\r
451 Unaligned.c\r
b26978d3 452 X86WriteIdtr.c\r
453 X86WriteGdtr.c\r
454 X86Thunk.c\r
455 X86ReadIdtr.c\r
456 X86ReadGdtr.c\r
457 X86Msr.c\r
458 X86MemoryFence.c\r
459 X86GetInterruptState.c\r
460 X86FxSave.c\r
461 X86FxRestore.c\r
462 X86EnablePaging64.c\r
463 X86EnablePaging32.c\r
464 X86DisablePaging64.c\r
465 X86DisablePaging32.c\r
6b4fe92a 466 X64/WriteMsr64.S | GCC \r
467 X64/WriteMm7.S | GCC \r
468 X64/WriteMm6.S | GCC \r
469 X64/WriteMm5.S | GCC \r
470 X64/WriteMm4.S | GCC \r
471 X64/WriteMm3.S | GCC \r
472 X64/WriteMm2.S | GCC \r
473 X64/WriteMm1.S | GCC \r
474 X64/WriteMm0.S | GCC \r
475 X64/WriteLdtr.S | GCC \r
476 X64/WriteIdtr.S | GCC \r
477 X64/WriteGdtr.S | GCC \r
478 X64/WriteDr7.S | GCC \r
479 X64/WriteDr6.S | GCC \r
480 X64/WriteDr5.S | GCC \r
481 X64/WriteDr4.S | GCC \r
482 X64/WriteDr3.S | GCC \r
483 X64/WriteDr2.S | GCC \r
484 X64/WriteDr1.S | GCC \r
485 X64/WriteDr0.S | GCC \r
486 X64/WriteCr4.S | GCC \r
487 X64/WriteCr3.S | GCC \r
488 X64/WriteCr2.S | GCC \r
489 X64/WriteCr0.S | GCC \r
490 X64/Wbinvd.S | GCC \r
491 X64/Thunk16.S | GCC \r
492 X64/SwitchStack.S | GCC \r
493 X64/SetJump.S | GCC \r
494 X64/ReadTsc.S | GCC \r
495 X64/ReadTr.S | GCC \r
496 X64/ReadSs.S | GCC \r
497 X64/ReadPmc.S | GCC \r
498 X64/ReadMsr64.S | GCC \r
499 X64/ReadMm7.S | GCC \r
500 X64/ReadMm6.S | GCC \r
501 X64/ReadMm5.S | GCC \r
502 X64/ReadMm4.S | GCC \r
503 X64/ReadMm3.S | GCC \r
504 X64/ReadMm2.S | GCC \r
505 X64/ReadMm1.S | GCC \r
506 X64/ReadMm0.S | GCC \r
507 X64/ReadLdtr.S | GCC \r
508 X64/ReadIdtr.S | GCC \r
509 X64/ReadGs.S | GCC \r
510 X64/ReadGdtr.S | GCC \r
511 X64/ReadFs.S | GCC \r
512 X64/ReadEs.S | GCC \r
513 X64/ReadEflags.S | GCC \r
514 X64/ReadDs.S | GCC \r
515 X64/ReadDr7.S | GCC \r
516 X64/ReadDr6.S | GCC \r
517 X64/ReadDr5.S | GCC \r
518 X64/ReadDr4.S | GCC \r
519 X64/ReadDr3.S | GCC \r
520 X64/ReadDr2.S | GCC \r
521 X64/ReadDr1.S | GCC \r
522 X64/ReadDr0.S | GCC \r
523 X64/ReadCs.S | GCC \r
524 X64/ReadCr4.S | GCC \r
525 X64/ReadCr3.S | GCC \r
526 X64/ReadCr2.S | GCC \r
527 X64/ReadCr0.S | GCC \r
528 X64/Mwait.S | GCC \r
529 X64/Monitor.S | GCC \r
530 X64/LongJump.S | GCC \r
531 X64/Invd.S | GCC \r
6b4fe92a 532 X64/FxSave.S | GCC \r
533 X64/FxRestore.S | GCC \r
534 X64/FlushCacheLine.S | GCC \r
6b4fe92a 535 X64/EnableInterrupts.S | GCC \r
536 X64/EnableDisableInterrupts.S | GCC \r
537 X64/DisablePaging64.S | GCC \r
538 X64/DisableInterrupts.S | GCC \r
6b4fe92a 539 X64/CpuPause.S | GCC \r
540 X64/CpuId.S | GCC \r
541 X64/CpuIdEx.S | GCC \r
6b4fe92a 542 X64/CpuBreakpoint.S | GCC \r
9f4f2f0e 543 X64/EnableCache.S | GCC\r
544 X64/DisableCache.S | GCC\r
a21f46e4 545 ChkStkGcc.c | GCC \r
e1f414b6 546\r
547[Sources.IPF]\r
548 Ipf/AccessGp.s\r
549 Ipf/ReadCpuid.s\r
550 Ipf/ExecFc.s\r
551 Ipf/AsmPalCall.s\r
552 Ipf/AccessPsr.s\r
553 Ipf/AccessPmr.s\r
554 Ipf/AccessKr.s\r
555 Ipf/AccessGcr.s\r
556 Ipf/AccessEicr.s\r
557 Ipf/AccessDbr.s\r
59e0bb0c 558 Ipf/AccessMsr.s | INTEL\r
4e16d2cd 559 Ipf/AccessMsr.s | GCC\r
560 Ipf/AccessMsrDb.s | MSFT\r
287f4f47 561 Ipf/InternalFlushCacheRange.s\r
562 Ipf/FlushCacheRange.c\r
e1f414b6 563 Ipf/InternalSwitchStack.c\r
564 Ipf/GetInterruptState.s\r
e1f414b6 565 Ipf/CpuPause.s\r
878afe6b 566 Ipf/CpuBreakpoint.c | INTEL\r
567 Ipf/CpuBreakpointMsc.c | MSFT\r
59e0bb0c 568 Ipf/AsmCpuMisc.s | GCC\r
e1f414b6 569 Ipf/Unaligned.c\r
570 Ipf/SwitchStack.s\r
572b6b1a 571 Ipf/LongJmp.s\r
572 Ipf/SetJmp.s\r
aad6137d 573 Ipf/ReadCr.s\r
aad6137d 574 Ipf/ReadAr.s\r
572b6b1a 575 Ipf/Ia64gen.h\r
576 Ipf/Asm.h\r
e1f414b6 577 Math64.c\r
e1f414b6 578\r
579[Sources.EBC]\r
e1f414b6 580 Ebc/CpuBreakpoint.c\r
581 Ebc/SetJumpLongJump.c\r
582 Ebc/SwitchStack.c\r
583 Unaligned.c\r
584 Math64.c\r
585\r
e1f414b6 586[Packages]\r
587 MdePkg/MdePkg.dec\r
588\r
e1f414b6 589[LibraryClasses]\r
590 PcdLib\r
e1f414b6 591 DebugLib\r
592 BaseMemoryLib\r
593\r
bba9ad98 594[Pcd.common]\r
b3af5df6 595 gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength\r
596 gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength\r
597 gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength\r
e1f414b6 598\r
EFI Development Kit II mirror for PVE