projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 6bfbb5f0 | 1 | ## @file\r |
| 34b0820e | 2 | # Base Library implementation.\r |
| 85ea851e | 3 | #\r |
| 0aac2f77 | 4 | # Copyright (c) 2007 - 2019, Intel Corporation. All rights reserved.<BR>\r |
| bb817c56 | 5 | # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r |
| 807e2604 | 6 | # Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.<BR>\r |
| e1f414b6 | 7 | #\r |
| 9344f092 | 8 | # SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| e1f414b6 | 9 | #\r |
| 10 | #\r | |
| 6bfbb5f0 | 11 | ##\r |
| e1f414b6 | 12 | \r |
| e1f414b6 | 13 | [Defines]\r |
| 14 | INF_VERSION = 0x00010005\r | |
| 15 | BASE_NAME = BaseLib\r | |
| c92c1790 | 16 | MODULE_UNI_FILE = BaseLib.uni\r |
| e1f414b6 | 17 | FILE_GUID = 27d67720-ea68-48ae-93da-a3a074c90e30\r |
| 18 | MODULE_TYPE = BASE\r | |
| 88a75d26 | 19 | VERSION_STRING = 1.1\r |
| 9095d37b | 20 | LIBRARY_CLASS = BaseLib\r |
| e1f414b6 | 21 | \r |
| e1f414b6 | 22 | #\r |
| 3cb0a311 | 23 | # VALID_ARCHITECTURES = IA32 X64 EBC ARM AARCH64\r |
| e1f414b6 | 24 | #\r |
| 25 | \r | |
| 6bfbb5f0 | 26 | [Sources]\r |
| e1f414b6 | 27 | CheckSum.c\r |
| 28 | SwitchStack.c\r | |
| 29 | SwapBytes64.c\r | |
| 30 | SwapBytes32.c\r | |
| 31 | SwapBytes16.c\r | |
| 32 | LongJump.c\r | |
| 33 | SetJump.c\r | |
| 34 | RShiftU64.c\r | |
| 35 | RRotU64.c\r | |
| 36 | RRotU32.c\r | |
| 37 | MultU64x64.c\r | |
| 38 | MultU64x32.c\r | |
| 39 | MultS64x64.c\r | |
| 40 | ModU64x32.c\r | |
| 41 | LShiftU64.c\r | |
| 42 | LRotU64.c\r | |
| 43 | LRotU32.c\r | |
| 44 | LowBitSet64.c\r | |
| 45 | LowBitSet32.c\r | |
| 46 | HighBitSet64.c\r | |
| 47 | HighBitSet32.c\r | |
| 48 | GetPowerOfTwo64.c\r | |
| 49 | GetPowerOfTwo32.c\r | |
| 50 | DivU64x64Remainder.c\r | |
| 51 | DivU64x32Remainder.c\r | |
| 52 | DivU64x32.c\r | |
| 53 | DivS64x64Remainder.c\r | |
| 54 | ARShiftU64.c\r | |
| 55 | BitField.c\r | |
| 56 | CpuDeadLoop.c\r | |
| 57 | Cpu.c\r | |
| 58 | LinkedList.c\r | |
| c058d59f | 59 | SafeString.c\r |
| e1f414b6 | 60 | String.c\r |
| ae591c14 | 61 | FilePaths.c\r |
| e1f414b6 | 62 | BaseLibInternals.h\r |
| e1f414b6 | 63 | \r |
| 64 | [Sources.Ia32]\r | |
| 364a5474 | 65 | Ia32/WriteTr.nasm\r |
| 2ecd8299 | 66 | Ia32/Lfence.nasm\r |
| 364a5474 | 67 | \r |
| 9095d37b LG |
68 | Ia32/Wbinvd.c | MSFT\r |
| 69 | Ia32/WriteMm7.c | MSFT\r | |
| 70 | Ia32/WriteMm6.c | MSFT\r | |
| 71 | Ia32/WriteMm5.c | MSFT\r | |
| 72 | Ia32/WriteMm4.c | MSFT\r | |
| 73 | Ia32/WriteMm3.c | MSFT\r | |
| 74 | Ia32/WriteMm2.c | MSFT\r | |
| 75 | Ia32/WriteMm1.c | MSFT\r | |
| 76 | Ia32/WriteMm0.c | MSFT\r | |
| 77 | Ia32/WriteLdtr.c | MSFT\r | |
| 78 | Ia32/WriteIdtr.c | MSFT\r | |
| 79 | Ia32/WriteGdtr.c | MSFT\r | |
| 80 | Ia32/WriteDr7.c | MSFT\r | |
| 81 | Ia32/WriteDr6.c | MSFT\r | |
| 82 | Ia32/WriteDr5.c | MSFT\r | |
| 83 | Ia32/WriteDr4.c | MSFT\r | |
| 84 | Ia32/WriteDr3.c | MSFT\r | |
| 85 | Ia32/WriteDr2.c | MSFT\r | |
| 86 | Ia32/WriteDr1.c | MSFT\r | |
| 87 | Ia32/WriteDr0.c | MSFT\r | |
| 88 | Ia32/WriteCr4.c | MSFT\r | |
| 89 | Ia32/WriteCr3.c | MSFT\r | |
| 90 | Ia32/WriteCr2.c | MSFT\r | |
| 91 | Ia32/WriteCr0.c | MSFT\r | |
| 92 | Ia32/WriteMsr64.c | MSFT\r | |
| 93 | Ia32/SwapBytes64.c | MSFT\r | |
| 9095d37b LG |
94 | Ia32/RRotU64.c | MSFT\r |
| 95 | Ia32/RShiftU64.c | MSFT\r | |
| 96 | Ia32/ReadPmc.c | MSFT\r | |
| 97 | Ia32/ReadTsc.c | MSFT\r | |
| 98 | Ia32/ReadLdtr.c | MSFT\r | |
| 99 | Ia32/ReadIdtr.c | MSFT\r | |
| 100 | Ia32/ReadGdtr.c | MSFT\r | |
| 101 | Ia32/ReadTr.c | MSFT\r | |
| 102 | Ia32/ReadSs.c | MSFT\r | |
| 103 | Ia32/ReadGs.c | MSFT\r | |
| 104 | Ia32/ReadFs.c | MSFT\r | |
| 105 | Ia32/ReadEs.c | MSFT\r | |
| 106 | Ia32/ReadDs.c | MSFT\r | |
| 107 | Ia32/ReadCs.c | MSFT\r | |
| 108 | Ia32/ReadMsr64.c | MSFT\r | |
| 109 | Ia32/ReadMm7.c | MSFT\r | |
| 110 | Ia32/ReadMm6.c | MSFT\r | |
| 111 | Ia32/ReadMm5.c | MSFT\r | |
| 112 | Ia32/ReadMm4.c | MSFT\r | |
| 113 | Ia32/ReadMm3.c | MSFT\r | |
| 114 | Ia32/ReadMm2.c | MSFT\r | |
| 115 | Ia32/ReadMm1.c | MSFT\r | |
| 116 | Ia32/ReadMm0.c | MSFT\r | |
| 117 | Ia32/ReadEflags.c | MSFT\r | |
| 118 | Ia32/ReadDr7.c | MSFT\r | |
| 119 | Ia32/ReadDr6.c | MSFT\r | |
| 120 | Ia32/ReadDr5.c | MSFT\r | |
| 121 | Ia32/ReadDr4.c | MSFT\r | |
| 122 | Ia32/ReadDr3.c | MSFT\r | |
| 123 | Ia32/ReadDr2.c | MSFT\r | |
| 124 | Ia32/ReadDr1.c | MSFT\r | |
| 125 | Ia32/ReadDr0.c | MSFT\r | |
| 126 | Ia32/ReadCr4.c | MSFT\r | |
| 127 | Ia32/ReadCr3.c | MSFT\r | |
| 128 | Ia32/ReadCr2.c | MSFT\r | |
| 129 | Ia32/ReadCr0.c | MSFT\r | |
| 130 | Ia32/Mwait.c | MSFT\r | |
| 131 | Ia32/Monitor.c | MSFT\r | |
| 132 | Ia32/ModU64x32.c | MSFT\r | |
| 133 | Ia32/MultU64x64.c | MSFT\r | |
| 134 | Ia32/MultU64x32.c | MSFT\r | |
| 135 | Ia32/LShiftU64.c | MSFT\r | |
| 136 | Ia32/LRotU64.c | MSFT\r | |
| 9095d37b LG |
137 | Ia32/Invd.c | MSFT\r |
| 138 | Ia32/FxRestore.c | MSFT\r | |
| 139 | Ia32/FxSave.c | MSFT\r | |
| 140 | Ia32/FlushCacheLine.c | MSFT\r | |
| 141 | Ia32/EnablePaging32.c | MSFT\r | |
| 142 | Ia32/EnableInterrupts.c | MSFT\r | |
| 143 | Ia32/EnableDisableInterrupts.c | MSFT\r | |
| 9095d37b LG |
144 | Ia32/DivU64x32Remainder.c | MSFT\r |
| 145 | Ia32/DivU64x32.c | MSFT\r | |
| 146 | Ia32/DisablePaging32.c | MSFT\r | |
| 147 | Ia32/DisableInterrupts.c | MSFT\r | |
| 148 | Ia32/CpuPause.c | MSFT\r | |
| 149 | Ia32/CpuIdEx.c | MSFT\r | |
| 150 | Ia32/CpuId.c | MSFT\r | |
| 151 | Ia32/CpuBreakpoint.c | MSFT\r | |
| 152 | Ia32/ARShiftU64.c | MSFT\r | |
| 9f4f2f0e | 153 | Ia32/EnableCache.c | MSFT\r |
| 154 | Ia32/DisableCache.c | MSFT\r | |
| d074a8e1 | 155 | \r |
| d074a8e1 | 156 | \r |
| cf683fed | 157 | Ia32/GccInline.c | GCC\r |
| 5b7255e3 | 158 | Ia32/Thunk16.nasm\r |
| cb44f80a | 159 | Ia32/EnableDisableInterrupts.nasm| GCC\r |
| 5b7255e3 | 160 | Ia32/EnablePaging64.nasm\r |
| 7e08bace | 161 | Ia32/DisablePaging32.nasm| GCC\r |
| 4fc416a6 | 162 | Ia32/EnablePaging32.nasm| GCC\r |
| c3a324ff | 163 | Ia32/Mwait.nasm| GCC\r |
| fdf359f3 | 164 | Ia32/Monitor.nasm| GCC\r |
| c7f75a99 | 165 | Ia32/CpuIdEx.nasm| GCC\r |
| 3357f083 | 166 | Ia32/CpuId.nasm| GCC\r |
| 174232fa SZ |
167 | Ia32/LongJump.nasm\r |
| 168 | Ia32/SetJump.nasm\r | |
| 1d3324f9 | 169 | Ia32/SwapBytes64.nasm| GCC\r |
| 5b7255e3 | 170 | Ia32/DivU64x64Remainder.nasm\r |
| fb79aa01 | 171 | Ia32/DivU64x32Remainder.nasm| GCC\r |
| fd890f59 | 172 | Ia32/ModU64x32.nasm| GCC\r |
| fe4b3b4b | 173 | Ia32/DivU64x32.nasm| GCC\r |
| f15f4aef | 174 | Ia32/MultU64x64.nasm| GCC\r |
| f8b4c87c | 175 | Ia32/MultU64x32.nasm| GCC\r |
| 7905d234 | 176 | Ia32/RRotU64.nasm| GCC\r |
| c41d8eb0 | 177 | Ia32/LRotU64.nasm| GCC\r |
| 649509ef | 178 | Ia32/ARShiftU64.nasm| GCC\r |
| a2cc2aa7 | 179 | Ia32/RShiftU64.nasm| GCC\r |
| 76a77878 | 180 | Ia32/LShiftU64.nasm| GCC\r |
| 22327b5a | 181 | Ia32/EnableCache.nasm| GCC\r |
| b204f668 | 182 | Ia32/DisableCache.nasm| GCC\r |
| 5b7255e3 | 183 | Ia32/RdRand.nasm\r |
| d074a8e1 | 184 | \r |
| bb40027d | 185 | Ia32/DivS64x64Remainder.c\r |
| bab427db | 186 | Ia32/InternalSwitchStack.c | MSFT\r |
| 65960189 | 187 | Ia32/InternalSwitchStack.nasm | GCC\r |
| e1f414b6 | 188 | Ia32/Non-existing.c\r |
| 189 | Unaligned.c\r | |
| b26978d3 | 190 | X86WriteIdtr.c\r |
| 191 | X86WriteGdtr.c\r | |
| 192 | X86Thunk.c\r | |
| 193 | X86ReadIdtr.c\r | |
| 194 | X86ReadGdtr.c\r | |
| 195 | X86Msr.c\r | |
| c756ce80 | 196 | X86MemoryFence.c | MSFT\r |
| b26978d3 | 197 | X86GetInterruptState.c\r |
| 198 | X86FxSave.c\r | |
| 199 | X86FxRestore.c\r | |
| 200 | X86EnablePaging64.c\r | |
| 201 | X86EnablePaging32.c\r | |
| 202 | X86DisablePaging64.c\r | |
| 203 | X86DisablePaging32.c\r | |
| 9ec9a7a5 | 204 | X86RdRand.c\r |
| 8596c140 | 205 | X86PatchInstruction.c\r |
| d9f1cac5 | 206 | X86SpeculationBarrier.c\r |
| e1f414b6 | 207 | \r |
| 208 | [Sources.X64]\r | |
| 6655cbf1 | 209 | X64/Thunk16.nasm\r |
| 9f6bfc11 | 210 | X64/CpuIdEx.nasm\r |
| fd5eb53d | 211 | X64/CpuId.nasm\r |
| 56244b92 | 212 | X64/LongJump.nasm\r |
| e3d50cc4 | 213 | X64/SetJump.nasm\r |
| ed1e7222 | 214 | X64/SwitchStack.nasm\r |
| a91d8309 | 215 | X64/EnableCache.nasm\r |
| c1d82295 | 216 | X64/DisableCache.nasm\r |
| 364a5474 | 217 | X64/WriteTr.nasm\r |
| 2ecd8299 | 218 | X64/Lfence.nasm\r |
| d074a8e1 | 219 | \r |
| 9095d37b LG |
220 | X64/CpuBreakpoint.c | MSFT\r |
| 221 | X64/WriteMsr64.c | MSFT\r | |
| 222 | X64/ReadMsr64.c | MSFT\r | |
| 345068d6 | 223 | X64/CpuPause.nasm| MSFT\r |
| 10f8b8d1 | 224 | X64/DisableInterrupts.nasm| MSFT\r |
| 4f66e999 | 225 | X64/EnableInterrupts.nasm| MSFT\r |
| 6a4d3fed | 226 | X64/FlushCacheLine.nasm| MSFT\r |
| e53f8184 | 227 | X64/Invd.nasm| MSFT\r |
| 079f75d5 | 228 | X64/Wbinvd.nasm| MSFT\r |
| fe945935 | 229 | X64/Mwait.nasm| MSFT\r |
| 4a9ae789 | 230 | X64/Monitor.nasm| MSFT\r |
| 3dbb4a70 | 231 | X64/ReadPmc.nasm| MSFT\r |
| 1119b2ac | 232 | X64/ReadTsc.nasm| MSFT\r |
| 37753fa0 | 233 | X64/WriteMm7.nasm| MSFT\r |
| 114fc827 | 234 | X64/WriteMm6.nasm| MSFT\r |
| 6c9c6ce8 | 235 | X64/WriteMm5.nasm| MSFT\r |
| 7c8fa338 | 236 | X64/WriteMm4.nasm| MSFT\r |
| f3175833 | 237 | X64/WriteMm3.nasm| MSFT\r |
| dd432baa | 238 | X64/WriteMm2.nasm| MSFT\r |
| 1322928f | 239 | X64/WriteMm1.nasm| MSFT\r |
| 24946626 | 240 | X64/WriteMm0.nasm| MSFT\r |
| 90e30b11 | 241 | X64/ReadMm7.nasm| MSFT\r |
| 103db15c | 242 | X64/ReadMm6.nasm| MSFT\r |
| 3566b815 | 243 | X64/ReadMm5.nasm| MSFT\r |
| adafb84b | 244 | X64/ReadMm4.nasm| MSFT\r |
| c936112a | 245 | X64/ReadMm3.nasm| MSFT\r |
| 434363ce | 246 | X64/ReadMm2.nasm| MSFT\r |
| b13e693e | 247 | X64/ReadMm1.nasm| MSFT\r |
| 29384370 | 248 | X64/ReadMm0.nasm| MSFT\r |
| ac94856d | 249 | X64/FxRestore.nasm| MSFT\r |
| fe3034ba | 250 | X64/FxSave.nasm| MSFT\r |
| 0a6729da | 251 | X64/WriteLdtr.nasm| MSFT\r |
| f80180f9 | 252 | X64/ReadLdtr.nasm| MSFT\r |
| 8cf392dd | 253 | X64/WriteIdtr.nasm| MSFT\r |
| 20bd7f34 | 254 | X64/ReadIdtr.nasm| MSFT\r |
| 0339e057 | 255 | X64/WriteGdtr.nasm| MSFT\r |
| 33ba62ac | 256 | X64/ReadGdtr.nasm| MSFT\r |
| 9967c4b0 | 257 | X64/ReadTr.nasm| MSFT\r |
| fbc9a910 | 258 | X64/ReadSs.nasm| MSFT\r |
| 3c8d7412 | 259 | X64/ReadGs.nasm| MSFT\r |
| 0401a03e | 260 | X64/ReadFs.nasm| MSFT\r |
| 8a63e4e9 | 261 | X64/ReadEs.nasm| MSFT\r |
| c892afaf | 262 | X64/ReadDs.nasm| MSFT\r |
| b56da74a | 263 | X64/ReadCs.nasm| MSFT\r |
| b09957b7 | 264 | X64/WriteDr7.nasm| MSFT\r |
| 689759d6 | 265 | X64/WriteDr6.nasm| MSFT\r |
| 0490028c | 266 | X64/WriteDr5.nasm| MSFT\r |
| 5874dd6b | 267 | X64/WriteDr4.nasm| MSFT\r |
| 7b8be919 | 268 | X64/WriteDr3.nasm| MSFT\r |
| 30fa9c79 | 269 | X64/WriteDr2.nasm| MSFT\r |
| f3594c83 | 270 | X64/WriteDr1.nasm| MSFT\r |
| aa5bfdcb | 271 | X64/WriteDr0.nasm| MSFT\r |
| dea86a29 | 272 | X64/ReadDr7.nasm| MSFT\r |
| 41535500 | 273 | X64/ReadDr6.nasm| MSFT\r |
| 9aa2efaa | 274 | X64/ReadDr5.nasm| MSFT\r |
| b03d993a | 275 | X64/ReadDr4.nasm| MSFT\r |
| e8ad4030 | 276 | X64/ReadDr3.nasm| MSFT\r |
| 7df38fad | 277 | X64/ReadDr2.nasm| MSFT\r |
| 3fca763f | 278 | X64/ReadDr1.nasm| MSFT\r |
| cb509ade | 279 | X64/ReadDr0.nasm| MSFT\r |
| 9f91893f | 280 | X64/WriteCr4.nasm| MSFT\r |
| 4dac999f | 281 | X64/WriteCr3.nasm| MSFT\r |
| 94a5acc9 | 282 | X64/WriteCr2.nasm| MSFT\r |
| b2a22733 | 283 | X64/WriteCr0.nasm| MSFT\r |
| 656a75da | 284 | X64/ReadCr4.nasm| MSFT\r |
| f08409a7 | 285 | X64/ReadCr3.nasm| MSFT\r |
| bcdc107c | 286 | X64/ReadCr2.nasm| MSFT\r |
| 63a21006 | 287 | X64/ReadCr0.nasm| MSFT\r |
| 5401d5be | 288 | X64/ReadEflags.nasm| MSFT\r |
| d074a8e1 | 289 | \r |
| d074a8e1 | 290 | \r |
| e1f414b6 | 291 | X64/Non-existing.c\r |
| 292 | Math64.c\r | |
| 293 | Unaligned.c\r | |
| b26978d3 | 294 | X86WriteIdtr.c\r |
| 295 | X86WriteGdtr.c\r | |
| 296 | X86Thunk.c\r | |
| 297 | X86ReadIdtr.c\r | |
| 298 | X86ReadGdtr.c\r | |
| 299 | X86Msr.c\r | |
| 2653bb43 | 300 | X86MemoryFence.c | MSFT\r |
| b26978d3 | 301 | X86GetInterruptState.c\r |
| 302 | X86FxSave.c\r | |
| 303 | X86FxRestore.c\r | |
| 304 | X86EnablePaging64.c\r | |
| 305 | X86EnablePaging32.c\r | |
| 306 | X86DisablePaging64.c\r | |
| 307 | X86DisablePaging32.c\r | |
| 9ec9a7a5 | 308 | X86RdRand.c\r |
| 8596c140 | 309 | X86PatchInstruction.c\r |
| d9f1cac5 | 310 | X86SpeculationBarrier.c\r |
| cf683fed | 311 | X64/GccInline.c | GCC\r |
| 5b7255e3 SZ |
312 | X64/EnableDisableInterrupts.nasm\r |
| 313 | X64/DisablePaging64.nasm\r | |
| 314 | X64/RdRand.nasm\r | |
| 9095d37b | 315 | ChkStkGcc.c | GCC\r |
| e1f414b6 | 316 | \r |
| e1f414b6 | 317 | [Sources.EBC]\r |
| e1f414b6 | 318 | Ebc/CpuBreakpoint.c\r |
| 319 | Ebc/SetJumpLongJump.c\r | |
| 320 | Ebc/SwitchStack.c\r | |
| d9f1cac5 | 321 | Ebc/SpeculationBarrier.c\r |
| e1f414b6 | 322 | Unaligned.c\r |
| 323 | Math64.c\r | |
| 324 | \r | |
| 4b5f371b | 325 | [Sources.ARM]\r |
| 326 | Arm/InternalSwitchStack.c\r | |
| 327 | Arm/Unaligned.c\r | |
| 30939ff2 PB |
328 | Math64.c | RVCT\r |
| 329 | Math64.c | MSFT\r | |
| 330 | \r | |
| 4b5f371b | 331 | Arm/SwitchStack.asm | RVCT\r |
| 332 | Arm/SetJumpLongJump.asm | RVCT\r | |
| 333 | Arm/DisableInterrupts.asm | RVCT\r | |
| 334 | Arm/EnableInterrupts.asm | RVCT\r | |
| 335 | Arm/GetInterruptsState.asm | RVCT\r | |
| 336 | Arm/CpuPause.asm | RVCT\r | |
| 703f1d09 | 337 | Arm/CpuBreakpoint.asm | RVCT\r |
| 8c1e7951 | 338 | Arm/MemoryFence.asm | RVCT\r |
| c0959b44 | 339 | Arm/SpeculationBarrier.S | RVCT\r |
| 30939ff2 PB |
340 | \r |
| 341 | Arm/SwitchStack.asm | MSFT\r | |
| 342 | Arm/SetJumpLongJump.asm | MSFT\r | |
| 343 | Arm/DisableInterrupts.asm | MSFT\r | |
| 344 | Arm/EnableInterrupts.asm | MSFT\r | |
| 345 | Arm/GetInterruptsState.asm | MSFT\r | |
| 346 | Arm/CpuPause.asm | MSFT\r | |
| 347 | Arm/CpuBreakpoint.asm | MSFT\r | |
| 348 | Arm/MemoryFence.asm | MSFT\r | |
| c0959b44 | 349 | Arm/SpeculationBarrier.asm | MSFT\r |
| 30939ff2 | 350 | \r |
| 703f1d09 | 351 | Arm/Math64.S | GCC\r |
| 08068159 | 352 | Arm/SwitchStack.S | GCC\r |
| 4b5f371b | 353 | Arm/EnableInterrupts.S | GCC\r |
| 354 | Arm/DisableInterrupts.S | GCC\r | |
| 7f22d351 | 355 | Arm/GetInterruptsState.S | GCC\r |
| 4b5f371b | 356 | Arm/SetJumpLongJump.S | GCC\r |
| 357 | Arm/CpuBreakpoint.S | GCC\r | |
| 8c1e7951 | 358 | Arm/MemoryFence.S | GCC\r |
| c0959b44 | 359 | Arm/SpeculationBarrier.S | GCC\r |
| 4b5f371b | 360 | \r |
| 807e2604 HL |
361 | [Sources.AARCH64]\r |
| 362 | Arm/InternalSwitchStack.c\r | |
| 363 | Arm/Unaligned.c\r | |
| 364 | Math64.c\r | |
| 365 | \r | |
| 8c1e7951 | 366 | AArch64/MemoryFence.S | GCC\r |
| 807e2604 HL |
367 | AArch64/SwitchStack.S | GCC\r |
| 368 | AArch64/EnableInterrupts.S | GCC\r | |
| 369 | AArch64/DisableInterrupts.S | GCC\r | |
| 370 | AArch64/GetInterruptsState.S | GCC\r | |
| 371 | AArch64/SetJumpLongJump.S | GCC\r | |
| 372 | AArch64/CpuBreakpoint.S | GCC\r | |
| c0959b44 | 373 | AArch64/SpeculationBarrier.S | GCC\r |
| 807e2604 | 374 | \r |
| da351bdb PB |
375 | AArch64/MemoryFence.asm | MSFT\r |
| 376 | AArch64/SwitchStack.asm | MSFT\r | |
| 377 | AArch64/EnableInterrupts.asm | MSFT\r | |
| 378 | AArch64/DisableInterrupts.asm | MSFT\r | |
| 379 | AArch64/GetInterruptsState.asm | MSFT\r | |
| 380 | AArch64/SetJumpLongJump.asm | MSFT\r | |
| 381 | AArch64/CpuBreakpoint.asm | MSFT\r | |
| c0959b44 | 382 | AArch64/SpeculationBarrier.asm | MSFT\r |
| da351bdb | 383 | \r |
| e1f414b6 | 384 | [Packages]\r |
| 385 | MdePkg/MdePkg.dec\r | |
| 386 | \r | |
| e1f414b6 | 387 | [LibraryClasses]\r |
| 388 | PcdLib\r | |
| e1f414b6 | 389 | DebugLib\r |
| 390 | BaseMemoryLib\r | |
| 391 | \r | |
| 1081f624 | 392 | [Pcd]\r |
| c92c1790 LG |
393 | gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength ## SOMETIMES_CONSUMES\r |
| 394 | gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength ## SOMETIMES_CONSUMES\r | |
| 395 | gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength ## SOMETIMES_CONSUMES\r | |
| 0aac2f77 | 396 | gEfiMdePkgTokenSpaceGuid.PcdControlFlowEnforcementPropertyMask ## SOMETIMES_CONSUMES\r |
| da03183c LE |
397 | \r |
| 398 | [FeaturePcd]\r | |
| c92c1790 | 399 | gEfiMdePkgTokenSpaceGuid.PcdVerifyNodeInList ## CONSUMES\r |