[mirror_edk2.git] / MdePkg / Library / BaseLib / Ia32 / DisableCache.c

/** @file\r
  AsmDisableCache function\r
\r
  Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
/**\r
  Set CD bit and clear NW bit of CR0 followed by a WBINVD.\r
\r
  Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,\r
  and executing a WBINVD instruction.  This function is only available on IA-32 and x64.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmDisableCache (\r
  VOID\r
  )\r
{\r
  _asm {\r
    mov     eax, cr0\r
    bts     eax, 30\r
    btr     eax, 29\r
    mov     cr0, eax\r
    wbinvd\r
  }\r
}\r
Commit	Line	Data
9f4f2f0e	1	/** @file\r
	2	AsmDisableCache function\r
	3	\r
bb817c56	4	Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>\r
9344f092	5	SPDX-License-Identifier: BSD-2-Clause-Patent\r
9f4f2f0e	6	\r
	7	**/\r
	8	\r
	9	/**\r
be5f1614	10	Set CD bit and clear NW bit of CR0 followed by a WBINVD.\r
9f4f2f0e	11	\r
be5f1614	12	Disables the caches by setting the CD bit of CR0 to 1, clearing the NW bit of CR0 to 0,\r
be5f1614	13	and executing a WBINVD instruction. This function is only available on IA-32 and x64.\r
9f4f2f0e	14	\r
	15	**/\r
	16	VOID\r
	17	EFIAPI\r
	18	AsmDisableCache (\r
	19	VOID\r
	20	)\r
	21	{\r
	22	_asm {\r
	23	mov eax, cr0\r
	24	bts eax, 30\r
	25	btr eax, 29\r
	26	mov cr0, eax\r
	27	wbinvd\r
	28	}\r
	29	}\r