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1;------------------------------------------------------------------------------\r
2;\r
3; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>\r
9344f092 4; SPDX-License-Identifier: BSD-2-Clause-Patent\r
2c71f739
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5;\r
6; Module Name:\r
7;\r
8; EnablePaging64.Asm\r
9;\r
10; Abstract:\r
11;\r
12; AsmEnablePaging64 function\r
13;\r
14; Notes:\r
15;\r
16;------------------------------------------------------------------------------\r
17\r
18 SECTION .text\r
19\r
20;------------------------------------------------------------------------------\r
21; VOID\r
22; EFIAPI\r
23; InternalX86EnablePaging64 (\r
24; IN UINT16 Cs,\r
25; IN UINT64 EntryPoint,\r
26; IN UINT64 Context1, OPTIONAL\r
27; IN UINT64 Context2, OPTIONAL\r
28; IN UINT64 NewStack\r
29; );\r
30;------------------------------------------------------------------------------\r
31global ASM_PFX(InternalX86EnablePaging64)\r
32ASM_PFX(InternalX86EnablePaging64):\r
33 cli\r
34 mov DWORD [esp], .0 ; offset for far retf, seg is the 1st arg\r
35 mov eax, cr4\r
36 or al, (1 << 5)\r
37 mov cr4, eax ; enable PAE\r
38 mov ecx, 0xc0000080\r
39 rdmsr\r
40 or ah, 1 ; set LME\r
41 wrmsr\r
42 mov eax, cr0\r
43 bts eax, 31 ; set PG\r
44 mov cr0, eax ; enable paging\r
45 retf ; topmost 2 dwords hold the address\r
46.0:\r
47 DB 0x67, 0x48 ; 32-bit address size, 64-bit operand size\r
48 mov ebx, [esp] ; mov rbx, [esp]\r
49 DB 0x67, 0x48\r
50 mov ecx, [esp + 8] ; mov rcx, [esp + 8]\r
51 DB 0x67, 0x48\r
52 mov edx, [esp + 0x10] ; mov rdx, [esp + 10h]\r
53 DB 0x67, 0x48\r
54 mov esp, [esp + 0x18] ; mov rsp, [esp + 18h]\r
55 DB 0x48\r
56 add esp, -0x20 ; add rsp, -20h\r
57 call ebx ; call rbx\r
58 hlt ; no one should get here\r
59\r