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e1f414b6 | 1 | /** @file\r |
2 | 64-bit left rotation for Ia32\r | |
3 | \r | |
88a75d26 | 4 | Copyright (c) 2006 - 2015, Intel Corporation. All rights reserved.<BR>\r |
9344f092 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
e1f414b6 | 6 | \r |
7 | **/\r | |
8 | \r | |
1efcc4ae | 9 | \r |
f734a10a | 10 | \r |
e1f414b6 | 11 | \r |
42eedea9 | 12 | /**\r |
13 | Rotates a 64-bit integer left between 0 and 63 bits, filling\r | |
14 | the low bits with the high bits that were rotated.\r | |
15 | \r | |
16 | This function rotates the 64-bit value Operand to the left by Count bits. The\r | |
17 | low Count bits are fill with the high Count bits of Operand. The rotated\r | |
18 | value is returned.\r | |
19 | \r | |
20 | @param Operand The 64-bit operand to rotate left.\r | |
21 | @param Count The number of bits to rotate left.\r | |
22 | \r | |
23 | @return Operand <<< Count\r | |
24 | \r | |
25 | **/\r | |
e1f414b6 | 26 | UINT64\r |
27 | EFIAPI\r | |
28 | InternalMathLRotU64 (\r | |
29 | IN UINT64 Operand,\r | |
30 | IN UINTN Count\r | |
31 | )\r | |
32 | {\r | |
33 | _asm {\r | |
34 | mov cl, byte ptr [Count]\r | |
35 | mov edx, dword ptr [Operand + 4]\r | |
36 | mov eax, dword ptr [Operand + 0]\r | |
37 | shld ebx, edx, cl\r | |
38 | shld edx, eax, cl\r | |
39 | ror ebx, cl\r | |
40 | shld eax, ebx, cl\r | |
41 | test cl, 32 ; Count >= 32?\r | |
88a75d26 MK |
42 | jz L0\r |
43 | mov ecx, eax\r | |
44 | mov eax, edx\r | |
45 | mov edx, ecx\r | |
46 | L0:\r | |
e1f414b6 | 47 | }\r |
48 | }\r | |
49 | \r |