[mirror_edk2.git] / MdePkg / Library / BaseLib / Ia32 / Thunk16.S

#------------------------------------------------------------------------------\r
#\r
# Copyright (c) 2006 - 2008, Intel Corporation\r
# All rights reserved. This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution.  The full text of the license may be found at\r
# http://opensource.org/licenses/bsd-license.php\r
#\r
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
#\r
# Module Name:\r
#\r
#   Thunk16.S\r
#\r
# Abstract:\r
#\r
#   Real mode thunk\r
#\r
#------------------------------------------------------------------------------\r
\r
#include <Library/BaseLib.h>\r
\r
.globl ASM_PFX(m16Start), ASM_PFX(m16Size), ASM_PFX(mThunk16Attr), ASM_PFX(m16Gdt), ASM_PFX(m16GdtrBase), ASM_PFX(mTransition)\r
.globl ASM_PFX(InternalAsmThunk16)\r
\r
ASM_PFX(m16Start):\r
\r
SavedGdt:     .space  6\r
\r
ASM_PFX(BackFromUserCode):\r
    push    %ss\r
    push    %cs\r
    .byte   0x66\r
    call    L_Base1                     # push eip\r
L_Base1:\r
    pushfw                              # pushfd actually\r
    cli                                 # disable interrupts\r
    push    %gs\r
    push    %fs\r
    push    %es\r
    push    %ds\r
    pushaw                              # pushad actually\r
    .byte   0x66, 0xba                  # mov edx, imm32\r
ASM_PFX(ThunkAttr): .space  4\r
    testb   $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl\r
    jz      1f\r
    movl    $0x15cd2401, %eax           # mov ax, 2401h & int 15h\r
    cli                                 # disable interrupts\r
    jnc     2f\r
1:\r
    testb   $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl\r
    jz      2f\r
    inb     $0x92, %al\r
    orb     $2, %al\r
    outb    %al, $0x92                  # deactivate A20M#\r
2:\r
    movl    %ss, %eax\r
    .byte   0x67, 0x66, 0x8d, 0x6c, 0x24, 0x34, 0x66\r
    mov     %ebp, 0xffffffd8(%esi)\r
    mov     0xfffffff8(%esi), %ebx\r
    shlw    $4, %ax                     # shl eax, 4\r
    addw    %ax, %bp                    # add ebp, eax\r
    .byte   0x66, 0xb8                   # mov eax, imm32\r
SavedCr4:   .space  4\r
    movl    %eax, %cr4\r
    lgdtw   %cs:0xfffffff2(%edi)\r
    .byte   0x66, 0xb8                   # mov eax, imm32\r
SavedCr0:   .space  4\r
    movl    %eax, %cr0\r
    .byte   0xb8                        # mov ax, imm16\r
SavedSs:    .space  2\r
    movl    %eax, %ss\r
    .byte   0x66, 0xbc                   # mov esp, imm32\r
SavedEsp:   .space  4\r
    .byte   0x66\r
    lret                                # return to protected mode\r
\r
_EntryPoint:    .long      ASM_PFX(ToUserCode) - ASM_PFX(m16Start)\r
                .word      0x8\r
_16Idtr:        .word      0x3ff\r
                .long      0\r
_16Gdtr:        .word      GdtEnd - _NullSegDesc - 1\r
_16GdtrBase:    .long      _NullSegDesc\r
\r
ASM_PFX(ToUserCode):\r
    movl    %ss, %edx\r
    movl    %ecx, %ss                   # set new segment selectors\r
    movl    %ecx, %ds\r
    movl    %ecx, %es\r
    movl    %ecx, %fs\r
    movl    %ecx, %gs\r
    movl    %eax, %cr0\r
    movl    %ebp, %cr4                  # real mode starts at next instruction\r
    movl    %esi, %ss                   # set up 16-bit stack segment\r
    xchgw   %bx, %sp                    # set up 16-bit stack pointer\r
    .byte   0x66\r
    call    L_Base                      # push eip\r
L_Base:\r
    popw    %bp                         # ebp <- offset L_Base\r
    .byte   0x67;                       # address size override\r
    push    54(%esp)\r
    lea     0xc(%esi), %eax\r
    push    %eax\r
    lret\r
\r
L_RealMode:\r
    mov     %edx, %cs:0xffffffc5(%esi)\r
    mov     %bx, %cs:0xffffffcb(%esi)\r
    lidtw   %cs:0xffffffd7(%esi)\r
    popaw                               # popad actually\r
    pop     %ds\r
    pop     %es\r
    pop     %fs\r
    pop     %gs\r
    popfw                               # popfd\r
    lretw                               # transfer control to user code\r
\r
_NullSegDesc:   .quad   0\r
_16CsDesc:\r
                .word   -1\r
                .word   0\r
                .byte   0\r
                .byte   0x9b\r
                .byte   0x8f            # 16-bit segment, 4GB limit\r
                .byte   0\r
_16DsDesc:\r
                .word   -1\r
                .word   0\r
                .byte   0\r
                .byte   0x93\r
                .byte   0x8f            # 16-bit segment, 4GB limit\r
                .byte   0\r
GdtEnd:\r
\r
#\r
#   @param  RegSet  Pointer to a IA32_DWORD_REGS structure\r
#   @param  Transition  Pointer to the transition code\r
#   @return The address of the 16-bit stack after returning from user code\r
#\r
ASM_PFX(InternalAsmThunk16):\r
    push    %ebp\r
    push    %ebx\r
    push    %esi\r
    push    %edi\r
    push    %ds\r
    push    %es\r
    push    %fs\r
    push    %gs\r
    movl    36(%esp), %esi              # esi <- RegSet\r
    movzwl  0x32(%esi), %edx\r
    mov     0xc(%esi), %edi\r
    add     $0xffffffc8, %edi\r
    movl    %edi, %ebx                  # ebx <- stack offset\r
    imul    $0x10, %edx, %eax\r
    push    $0xd\r
    addl    %eax, %edi                  # edi <- linear address of 16-bit stack\r
    pop     %ecx\r
    rep\r
    movsl                               # copy RegSet\r
    movl    40(%esp), %eax              # eax <- address of transition code\r
    movl    %edx, %esi                  # esi <- 16-bit stack segment\r
    lea     0x5e(%eax), %edx\r
    movl    %eax, %ecx\r
    andl    $0xf, %ecx\r
    shll    $12, %eax\r
    lea     0x6(%ecx), %ecx\r
    movw    %cx, %ax\r
    stosl                               # [edi] <- return address of user code\r
    sgdtl   0xffffffa2(%edx)\r
    sidtl   0x24(%esp)\r
    movl    %cr0, %eax\r
    movl    %eax, (%edx)                # save CR0 in SavedCr0\r
    andl    $0x7ffffffe, %eax           # clear PE, PG bits\r
    movl    %cr4, %ebp\r
    mov     %ebp, 0xfffffff1(%edx)\r
    andl    $0x300, %ebp                # clear all but PCE and OSFXSR bits\r
    pushl   $0x10\r
    pop     %ecx                        # ecx <- selector for data segments\r
    lgdtl   0x20(%edx)\r
    pushfl\r
    lcall   *0x14(%edx)\r
    popfl\r
    lidtl   0x24(%esp)\r
    lea     0xffffffcc(%ebp), %eax\r
    pop     %gs\r
    pop     %fs\r
    pop     %es\r
    pop     %ds\r
    pop     %edi\r
    pop     %esi\r
    pop     %ebx\r
    pop     %ebp\r
    ret\r
\r
    .const:\r
\r
ASM_PFX(m16Size):        .word      _InternalAsmThunk16 - ASM_PFX(m16Start)\r
ASM_PFX(mThunk16Attr):   .word      _ThunkAttr          - ASM_PFX(m16Start)\r
ASM_PFX(m16Gdt):         .word      _NullSegDesc        - ASM_PFX(m16Start)\r
ASM_PFX(m16GdtrBase):    .word      _16GdtrBase         - ASM_PFX(m16Start)\r
ASM_PFX(mTransition):    .word      _EntryPoint         - ASM_PFX(m16Start)\r
Commit	Line	Data
e1f414b6	1	#------------------------------------------------------------------------------\r
e1f414b6	2	#\r
373ade0e	3	# Copyright (c) 2006 - 2008, Intel Corporation\r
e1f414b6	4	# All rights reserved. This program and the accompanying materials\r
	5	# are licensed and made available under the terms and conditions of the BSD License\r
	6	# which accompanies this distribution. The full text of the license may be found at\r
	7	# http://opensource.org/licenses/bsd-license.php\r
	8	#\r
	9	# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	10	# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	11	#\r
	12	# Module Name:\r
	13	#\r
	14	# Thunk16.S\r
	15	#\r
	16	# Abstract:\r
	17	#\r
	18	# Real mode thunk\r
	19	#\r
	20	#------------------------------------------------------------------------------\r
	21	\r
bff2467a	22	#include <Library/BaseLib.h>\r
bff2467a	23	\r
e1f414b6	24	.globl ASM_PFX(m16Start), ASM_PFX(m16Size), ASM_PFX(mThunk16Attr), ASM_PFX(m16Gdt), ASM_PFX(m16GdtrBase), ASM_PFX(mTransition)\r
	25	.globl ASM_PFX(InternalAsmThunk16)\r
	26	\r
	27	ASM_PFX(m16Start):\r
	28	\r
	29	SavedGdt: .space 6\r
	30	\r
	31	ASM_PFX(BackFromUserCode):\r
	32	push %ss\r
	33	push %cs\r
	34	.byte 0x66\r
	35	call L_Base1 # push eip\r
	36	L_Base1:\r
	37	pushfw # pushfd actually\r
	38	cli # disable interrupts\r
	39	push %gs\r
	40	push %fs\r
	41	push %es\r
	42	push %ds\r
	43	pushaw # pushad actually\r
	44	.byte 0x66, 0xba # mov edx, imm32\r
	45	ASM_PFX(ThunkAttr): .space 4\r
	46	testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl\r
	47	jz 1f\r
	48	movl $0x15cd2401, %eax # mov ax, 2401h & int 15h\r
	49	cli # disable interrupts\r
	50	jnc 2f\r
	51	1:\r
	52	testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl\r
	53	jz 2f\r
	54	inb $0x92, %al\r
	55	orb $2, %al\r
	56	outb %al, $0x92 # deactivate A20M#\r
	57	2:\r
	58	movl %ss, %eax\r
	59	.byte 0x67, 0x66, 0x8d, 0x6c, 0x24, 0x34, 0x66\r
	60	mov %ebp, 0xffffffd8(%esi)\r
	61	mov 0xfffffff8(%esi), %ebx\r
	62	shlw $4, %ax # shl eax, 4\r
	63	addw %ax, %bp # add ebp, eax\r
	64	.byte 0x66, 0xb8 # mov eax, imm32\r
	65	SavedCr4: .space 4\r
	66	movl %eax, %cr4\r
	67	lgdtw %cs:0xfffffff2(%edi)\r
	68	.byte 0x66, 0xb8 # mov eax, imm32\r
	69	SavedCr0: .space 4\r
	70	movl %eax, %cr0\r
	71	.byte 0xb8 # mov ax, imm16\r
	72	SavedSs: .space 2\r
	73	movl %eax, %ss\r
	74	.byte 0x66, 0xbc # mov esp, imm32\r
	75	SavedEsp: .space 4\r
	76	.byte 0x66\r
	77	lret # return to protected mode\r
	78	\r
	79	_EntryPoint: .long ASM_PFX(ToUserCode) - ASM_PFX(m16Start)\r
	80	.word 0x8\r
	81	_16Idtr: .word 0x3ff\r
	82	.long 0\r
	83	_16Gdtr: .word GdtEnd - _NullSegDesc - 1\r
	84	_16GdtrBase: .long _NullSegDesc\r
	85	\r
	86	ASM_PFX(ToUserCode):\r
	87	movl %ss, %edx\r
88	movl %ecx, %ss # set new segment selectors\r
89	movl %ecx, %ds\r
90	movl %ecx, %es\r
91	movl %ecx, %fs\r
92	movl %ecx, %gs\r
93	movl %eax, %cr0\r
94	movl %ebp, %cr4 # real mode starts at next instruction\r
95	movl %esi, %ss # set up 16-bit stack segment\r
96	xchgw %bx, %sp # set up 16-bit stack pointer\r
97	.byte 0x66\r
98	call L_Base # push eip\r
99	L_Base:\r
100	popw %bp # ebp <- offset L_Base\r
9e77c2c3	101	.byte 0x67; # address size override\r
9e77c2c3	102	push 54(%esp)\r
e1f414b6	103	lea 0xc(%esi), %eax\r
	104	push %eax\r
	105	lret\r
	106	\r
	107	L_RealMode:\r
	108	mov %edx, %cs:0xffffffc5(%esi)\r
	109	mov %bx, %cs:0xffffffcb(%esi)\r
	110	lidtw %cs:0xffffffd7(%esi)\r
	111	popaw # popad actually\r
	112	pop %ds\r
	113	pop %es\r
	114	pop %fs\r
	115	pop %gs\r
	116	popfw # popfd\r
	117	lretw # transfer control to user code\r
	118	\r
	119	_NullSegDesc: .quad 0\r
	120	_16CsDesc:\r
	121	.word -1\r
	122	.word 0\r
	123	.byte 0\r
	124	.byte 0x9b\r
	125	.byte 0x8f # 16-bit segment, 4GB limit\r
	126	.byte 0\r
	127	_16DsDesc:\r
	128	.word -1\r
	129	.word 0\r
	130	.byte 0\r
	131	.byte 0x93\r
	132	.byte 0x8f # 16-bit segment, 4GB limit\r
	133	.byte 0\r
	134	GdtEnd:\r
	135	\r
	136	#\r
	137	# @param RegSet Pointer to a IA32_DWORD_REGS structure\r
	138	# @param Transition Pointer to the transition code\r
	139	# @return The address of the 16-bit stack after returning from user code\r
	140	#\r
	141	ASM_PFX(InternalAsmThunk16):\r
	142	push %ebp\r
	143	push %ebx\r
	144	push %esi\r
	145	push %edi\r
	146	push %ds\r
	147	push %es\r
	148	push %fs\r
	149	push %gs\r
	150	movl 36(%esp), %esi # esi <- RegSet\r
	151	movzwl 0x32(%esi), %edx\r
	152	mov 0xc(%esi), %edi\r
	153	add $0xffffffc8, %edi\r
	154	movl %edi, %ebx # ebx <- stack offset\r
	155	imul $0x10, %edx, %eax\r
	156	push $0xd\r
	157	addl %eax, %edi # edi <- linear address of 16-bit stack\r
	158	pop %ecx\r
	159	rep\r
	160	movsl # copy RegSet\r
	161	movl 40(%esp), %eax # eax <- address of transition code\r
	162	movl %edx, %esi # esi <- 16-bit stack segment\r
	163	lea 0x5e(%eax), %edx\r
	164	movl %eax, %ecx\r
	165	andl $0xf, %ecx\r
	166	shll $12, %eax\r
167	lea 0x6(%ecx), %ecx\r
168	movw %cx, %ax\r
169	stosl # [edi] <- return address of user code\r
170	sgdtl 0xffffffa2(%edx)\r
171	sidtl 0x24(%esp)\r
172	movl %cr0, %eax\r
173	movl %eax, (%edx) # save CR0 in SavedCr0\r
174	andl $0x7ffffffe, %eax # clear PE, PG bits\r
175	movl %cr4, %ebp\r
176	mov %ebp, 0xfffffff1(%edx)\r
177	andl $0x300, %ebp # clear all but PCE and OSFXSR bits\r
178	pushl $0x10\r
179	pop %ecx # ecx <- selector for data segments\r
180	lgdtl 0x20(%edx)\r
181	pushfl\r
182	lcall *0x14(%edx)\r
183	popfl\r
184	lidtl 0x24(%esp)\r
185	lea 0xffffffcc(%ebp), %eax\r
6f890d5b	186	pop %gs\r
	187	pop %fs\r
	188	pop %es\r
	189	pop %ds\r
	190	pop %edi\r
	191	pop %esi\r
	192	pop %ebx\r
	193	pop %ebp\r
e1f414b6	194	ret\r
	195	\r
	196	.const:\r
	197	\r
	198	ASM_PFX(m16Size): .word _InternalAsmThunk16 - ASM_PFX(m16Start)\r
	199	ASM_PFX(mThunk16Attr): .word _ThunkAttr - ASM_PFX(m16Start)\r
	200	ASM_PFX(m16Gdt): .word _NullSegDesc - ASM_PFX(m16Start)\r
	201	ASM_PFX(m16GdtrBase): .word _16GdtrBase - ASM_PFX(m16Start)\r
	202	ASM_PFX(mTransition): .word _EntryPoint - ASM_PFX(m16Start)\r