[mirror_edk2.git] / MdePkg / Library / BaseLib / Ia32 / Thunk16.S

#------------------------------------------------------------------------------\r
#\r
# Copyright (c) 2006, Intel Corporation\r
# All rights reserved. This program and the accompanying materials\r
# are licensed and made available under the terms and conditions of the BSD License\r
# which accompanies this distribution.  The full text of the license may be found at\r
# http://opensource.org/licenses/bsd-license.php\r
#\r
# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
#\r
# Module Name:\r
#\r
#   Thunk16.S\r
#\r
# Abstract:\r
#\r
#   Real mode thunk\r
#\r
#------------------------------------------------------------------------------\r
\r
.globl _m16Start, _m16Size, _mThunk16Attr, _m16Gdt, _m16GdtrBase, _mTransition\r
.globl _InternalAsmThunk16\r
\r
_m16Start:\r
\r
SavedGdt:     .space  6\r
\r
_BackFromUserCode:\r
    push    %ss\r
    push    %cs\r
    .byte   0x66\r
    call    L_Base1                     # push eip\r
L_Base1:\r
    pushfw                              # pushfd actually\r
    cli                                 # disable interrupts\r
    push    %gs\r
    push    %fs\r
    push    %es\r
    push    %ds\r
    pushaw                              # pushad actually\r
    .byte   0x66, 0xba                  # mov edx, imm32\r
_ThunkAttr: .space  4\r
    testb   $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl\r
    jz      1f\r
    movl    $0x15cd2401, %eax           # mov ax, 2401h & int 15h\r
    cli                                 # disable interrupts\r
    jnc     2f\r
1:\r
    testb   $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl\r
    jz      2f\r
    inb     $0x92, %al\r
    orb     $2, %al\r
    outb    %al, $0x92                  # deactivate A20M#\r
2:\r
    movl    %ss, %eax\r
    .byte   0x67, 0x66, 0x8d, 0x6c, 0x24, 0x34, 0x66\r
    mov     %ebp, 0xffffffd8(%esi)\r
    mov     0xfffffff8(%esi), %ebx\r
    shlw    $4, %ax                     # shl eax, 4\r
    addw    %ax, %bp                    # add ebp, eax\r
    .byte   0x66, 0xb8                   # mov eax, imm32\r
SavedCr4:   .space  4\r
    movl    %eax, %cr4\r
    lgdtw   %cs:0xfffffff2(%edi)\r
    .byte   0x66, 0xb8                   # mov eax, imm32\r
SavedCr0:   .space  4\r
    movl    %eax, %cr0\r
    .byte   0xb8                        # mov ax, imm16\r
SavedSs:    .space  2\r
    movl    %eax, %ss\r
    .byte   0x66, 0xbc                   # mov esp, imm32\r
SavedEsp:   .space  4\r
    .byte   0x66\r
    lret                                # return to protected mode\r
\r
_EntryPoint:    .long      _ToUserCode - _m16Start\r
                .word      0x8\r
_16Idtr:        .word      0x3ff\r
                .long      0\r
_16Gdtr:        .word      GdtEnd - _NullSegDesc - 1\r
_16GdtrBase:    .long     _NullSegDesc\r
\r
_ToUserCode:\r
    movl    %ss, %edx\r
    movl    %ecx, %ss                   # set new segment selectors\r
    movl    %ecx, %ds\r
    movl    %ecx, %es\r
    movl    %ecx, %fs\r
    movl    %ecx, %gs\r
    movl    %eax, %cr0\r
    movl    %ebp, %cr4                  # real mode starts at next instruction\r
    movl    %esi, %ss                   # set up 16-bit stack segment\r
    xchgw   %bx, %sp                    # set up 16-bit stack pointer\r
    .byte   0x66\r
    call    L_Base                      # push eip\r
L_Base:\r
    popw    %bp                         # ebp <- offset L_Base\r
    addr16  pushl 36(%si)\r
    .byte   0x36\r
    lea     0xc(%esi), %eax\r
    push    %eax\r
    lret\r
\r
L_RealMode:\r
    mov     %edx, %cs:0xffffffc5(%esi)\r
    mov     %bx, %cs:0xffffffcb(%esi)\r
    lidtw   %cs:0xffffffd7(%esi)\r
    popaw                               # popad actually\r
    pop     %ds\r
    pop     %es\r
    pop     %fs\r
    pop     %gs\r
    popfw                               # popfd\r
    lretw                               # transfer control to user code\r
\r
_NullSegDesc:   .quad   0\r
_16CsDesc:\r
                .word   -1\r
                .word   0\r
                .byte   0\r
                .byte   0x9b\r
                .byte   0x8f            # 16-bit segment, 4GB limit\r
                .byte   0\r
_16DsDesc:\r
                .word   -1\r
                .word   0\r
                .byte   0\r
                .byte   0x93\r
                .byte   0x8f            # 16-bit segment, 4GB limit\r
                .byte   0\r
GdtEnd:\r
\r
#\r
#   @param  RegSet  Pointer to a IA32_DWORD_REGS structure\r
#   @param  Transition  Pointer to the transition code\r
#   @return The address of the 16-bit stack after returning from user code\r
#\r
_InternalAsmThunk16:\r
    push    %ebp\r
    push    %ebx\r
    push    %esi\r
    push    %edi\r
    push    %ds\r
    push    %es\r
    push    %fs\r
    push    %gs\r
    movl    36(%esp), %esi              # esi <- RegSet\r
    movzwl  0x32(%esi), %edx\r
    mov     0xc(%esi), %edi\r
    add     $0xffffffc8, %edi\r
    movl    %edi, %ebx                  # ebx <- stack offset\r
    imul    $0x10, %edx, %eax\r
    push    $0xd\r
    addl    %eax, %edi                  # edi <- linear address of 16-bit stack\r
    pop     %ecx\r
    rep\r
    movsl                               # copy RegSet\r
    movl    40(%esp), %eax              # eax <- address of transition code\r
    movl    %edx, %esi                  # esi <- 16-bit stack segment\r
    lea     0x5e(%eax), %edx\r
    movl    %eax, %ecx\r
    andl    $0xf, %ecx\r
    shll    $12, %eax\r
    lea     0x6(%ecx), %ecx\r
    movw    %cx, %ax\r
    stosl                               # [edi] <- return address of user code\r
    sgdtl   0xffffffa2(%edx)\r
    sidtl   0x24(%esp)\r
    movl    %cr0, %eax\r
    movl    %eax, (%edx)                # save CR0 in SavedCr0\r
    andl    $0x7ffffffe, %eax           # clear PE, PG bits\r
    movl    %cr4, %ebp\r
    mov     %ebp, 0xfffffff1(%edx)\r
    andl    $0x300, %ebp                # clear all but PCE and OSFXSR bits\r
    pushl   $0x10\r
    pop     %ecx                        # ecx <- selector for data segments\r
    lgdtl   0x20(%edx)\r
    pushfl\r
    lcall   *0x14(%edx)\r
    popfl\r
    lidtl   0x24(%esp)\r
    lea     0xffffffcc(%ebp), %eax\r
  	pop     %gs\r
   	pop     %fs\r
   	pop     %es\r
  	pop     %ds\r
   	pop     %edi\r
   	pop     %esi\r
   	pop     %ebx\r
   	pop     %ebp\r
    ret\r
\r
    .const:\r
\r
_m16Size:        .word      _InternalAsmThunk16 - _m16Start\r
_mThunk16Attr:   .word      _ThunkAttr          - _m16Start\r
_m16Gdt:         .word      _NullSegDesc        - _m16Start\r
_m16GdtrBase:    .word      _16GdtrBase         - _m16Start\r
_mTransition:    .word      _EntryPoint         - _m16Start\r
Commit	Line	Data
878ddf1f	1	#------------------------------------------------------------------------------\r
	2	#\r
	3	# Copyright (c) 2006, Intel Corporation\r
	4	# All rights reserved. This program and the accompanying materials\r
	5	# are licensed and made available under the terms and conditions of the BSD License\r
	6	# which accompanies this distribution. The full text of the license may be found at\r
	7	# http://opensource.org/licenses/bsd-license.php\r
	8	#\r
	9	# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	10	# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	11	#\r
	12	# Module Name:\r
	13	#\r
44cf7a02	14	# Thunk16.S\r
878ddf1f	15	#\r
	16	# Abstract:\r
	17	#\r
	18	# Real mode thunk\r
	19	#\r
	20	#------------------------------------------------------------------------------\r
	21	\r
b7089db1	22	.globl _m16Start, _m16Size, _mThunk16Attr, _m16Gdt, _m16GdtrBase, _mTransition\r
b7089db1	23	.globl _InternalAsmThunk16\r
44cf7a02	24	\r
3f566587	25	_m16Start:\r
44cf7a02	26	\r
	27	SavedGdt: .space 6\r
	28	\r
	29	_BackFromUserCode:\r
	30	push %ss\r
	31	push %cs\r
	32	.byte 0x66\r
b7089db1	33	call L_Base1 # push eip\r
b7089db1	34	L_Base1:\r
44cf7a02	35	pushfw # pushfd actually\r
	36	cli # disable interrupts\r
	37	push %gs\r
	38	push %fs\r
	39	push %es\r
	40	push %ds\r
	41	pushaw # pushad actually\r
b7089db1	42	.byte 0x66, 0xba # mov edx, imm32\r
44cf7a02	43	_ThunkAttr: .space 4\r
44cf7a02	44	testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_INT_15, %dl\r
b7089db1	45	jz 1f\r
44cf7a02	46	movl $0x15cd2401, %eax # mov ax, 2401h & int 15h\r
44cf7a02	47	cli # disable interrupts\r
b7089db1	48	jnc 2f\r
b7089db1	49	1:\r
44cf7a02	50	testb $THUNK_ATTRIBUTE_DISABLE_A20_MASK_KBD_CTRL, %dl\r
b7089db1	51	jz 2f\r
44cf7a02	52	inb $0x92, %al\r
	53	orb $2, %al\r
	54	outb %al, $0x92 # deactivate A20M#\r
b7089db1	55	2:\r
44cf7a02	56	movl %ss, %eax\r
44cf7a02	57	.byte 0x67, 0x66, 0x8d, 0x6c, 0x24, 0x34, 0x66\r
3f566587	58	mov %ebp, 0xffffffd8(%esi)\r
3f566587	59	mov 0xfffffff8(%esi), %ebx\r
44cf7a02	60	shlw $4, %ax # shl eax, 4\r
44cf7a02	61	addw %ax, %bp # add ebp, eax\r
3f566587	62	.byte 0x66, 0xb8 # mov eax, imm32\r
44cf7a02	63	SavedCr4: .space 4\r
44cf7a02	64	movl %eax, %cr4\r
3f566587	65	lgdtw %cs:0xfffffff2(%edi)\r
3f566587	66	.byte 0x66, 0xb8 # mov eax, imm32\r
44cf7a02	67	SavedCr0: .space 4\r
	68	movl %eax, %cr0\r
	69	.byte 0xb8 # mov ax, imm16\r
	70	SavedSs: .space 2\r
	71	movl %eax, %ss\r
3f566587	72	.byte 0x66, 0xbc # mov esp, imm32\r
44cf7a02	73	SavedEsp: .space 4\r
	74	.byte 0x66\r
	75	lret # return to protected mode\r
	76	\r
	77	_EntryPoint: .long _ToUserCode - _m16Start\r
	78	.word 0x8\r
	79	_16Idtr: .word 0x3ff\r
	80	.long 0\r
	81	_16Gdtr: .word GdtEnd - _NullSegDesc - 1\r
	82	_16GdtrBase: .long _NullSegDesc\r
	83	\r
	84	_ToUserCode:\r
	85	movl %ss, %edx\r
	86	movl %ecx, %ss # set new segment selectors\r
	87	movl %ecx, %ds\r
	88	movl %ecx, %es\r
	89	movl %ecx, %fs\r
	90	movl %ecx, %gs\r
	91	movl %eax, %cr0\r
	92	movl %ebp, %cr4 # real mode starts at next instruction\r
	93	movl %esi, %ss # set up 16-bit stack segment\r
	94	xchgw %bx, %sp # set up 16-bit stack pointer\r
	95	.byte 0x66\r
b7089db1	96	call L_Base # push eip\r
	97	L_Base:\r
	98	popw %bp # ebp <- offset L_Base\r
44cf7a02	99	addr16 pushl 36(%si)\r
44cf7a02	100	.byte 0x36\r
3f566587	101	lea 0xc(%esi), %eax\r
3f566587	102	push %eax\r
44cf7a02	103	lret\r
44cf7a02	104	\r
b7089db1	105	L_RealMode:\r
3f566587	106	mov %edx, %cs:0xffffffc5(%esi)\r
3f566587	107	mov %bx, %cs:0xffffffcb(%esi)\r
44cf7a02	108	lidtw %cs:0xffffffd7(%esi)\r
44cf7a02	109	popaw # popad actually\r
3f566587	110	pop %ds\r
	111	pop %es\r
	112	pop %fs\r
	113	pop %gs\r
44cf7a02	114	popfw # popfd\r
	115	lretw # transfer control to user code\r
	116	\r
	117	_NullSegDesc: .quad 0\r
	118	_16CsDesc:\r
	119	.word -1\r
	120	.word 0\r
	121	.byte 0\r
	122	.byte 0x9b\r
	123	.byte 0x8f # 16-bit segment, 4GB limit\r
	124	.byte 0\r
	125	_16DsDesc:\r
	126	.word -1\r
	127	.word 0\r
	128	.byte 0\r
	129	.byte 0x93\r
	130	.byte 0x8f # 16-bit segment, 4GB limit\r
	131	.byte 0\r
	132	GdtEnd:\r
	133	\r
	134	#\r
	135	# @param RegSet Pointer to a IA32_DWORD_REGS structure\r
	136	# @param Transition Pointer to the transition code\r
	137	# @return The address of the 16-bit stack after returning from user code\r
	138	#\r
bd0cd44b	139	_InternalAsmThunk16:\r
44cf7a02	140	push %ebp\r
	141	push %ebx\r
	142	push %esi\r
	143	push %edi\r
	144	push %ds\r
	145	push %es\r
	146	push %fs\r
	147	push %gs\r
	148	movl 36(%esp), %esi # esi <- RegSet\r
3f566587	149	movzwl 0x32(%esi), %edx\r
	150	mov 0xc(%esi), %edi\r
	151	add $0xffffffc8, %edi\r
44cf7a02	152	movl %edi, %ebx # ebx <- stack offset\r
3f566587	153	imul $0x10, %edx, %eax\r
44cf7a02	154	push $0xd\r
44cf7a02	155	addl %eax, %edi # edi <- linear address of 16-bit stack\r
3f566587	156	pop %ecx\r
44cf7a02	157	rep\r
	158	movsl # copy RegSet\r
	159	movl 40(%esp), %eax # eax <- address of transition code\r
	160	movl %edx, %esi # esi <- 16-bit stack segment\r
3f566587	161	lea 0x5e(%eax), %edx\r
44cf7a02	162	movl %eax, %ecx\r
	163	andl $0xf, %ecx\r
	164	shll $12, %eax\r
3f566587	165	lea 0x6(%ecx), %ecx\r
44cf7a02	166	movw %cx, %ax\r
44cf7a02	167	stosl # [edi] <- return address of user code\r
3f566587	168	sgdtl 0xffffffa2(%edx)\r
44cf7a02	169	sidtl 0x24(%esp)\r
	170	movl %cr0, %eax\r
	171	movl %eax, (%edx) # save CR0 in SavedCr0\r
	172	andl $0x7ffffffe, %eax # clear PE, PG bits\r
	173	movl %cr4, %ebp\r
3f566587	174	mov %ebp, 0xfffffff1(%edx)\r
44cf7a02	175	andl $0x300, %ebp # clear all but PCE and OSFXSR bits\r
44cf7a02	176	pushl $0x10\r
3f566587	177	pop %ecx # ecx <- selector for data segments\r
44cf7a02	178	lgdtl 0x20(%edx)\r
	179	pushfl\r
	180	lcall *0x14(%edx)\r
	181	popfl\r
	182	lidtl 0x24(%esp)\r
3f566587	183	lea 0xffffffcc(%ebp), %eax\r
44cf7a02	184	pop %gs\r
	185	pop %fs\r
	186	pop %es\r
	187	pop %ds\r
	188	pop %edi\r
	189	pop %esi\r
	190	pop %ebx\r
	191	pop %ebp\r
	192	ret\r
	193	\r
3f566587	194	.const:\r
44cf7a02	195	\r
	196	_m16Size: .word _InternalAsmThunk16 - _m16Start\r
	197	_mThunk16Attr: .word _ThunkAttr - _m16Start\r
	198	_m16Gdt: .word _NullSegDesc - _m16Start\r
	199	_m16GdtrBase: .word _16GdtrBase - _m16Start\r
	200	_mTransition: .word _EntryPoint - _m16Start\r