Update the copyright notice format

[mirror_edk2.git] / MdePkg / Library / BaseLib / Ipf / ReadAr.s

/// @file\r
///  IPF specific application register reading functions\r
///\r
/// Copyright (c) 2008, Intel Corporation. All rights reserved.<BR>\r
/// This program and the accompanying materials\r
/// are licensed and made available under the terms and conditions of the BSD License\r
/// which accompanies this distribution.  The full text of the license may be found at\r
/// http://opensource.org/licenses/bsd-license.php\r
///\r
/// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
/// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
///\r
///\r
///\r
\r
\r
\r
//---------------------------------------------------------------------------------\r
//++\r
// AsmReadApplicationRegister\r
//\r
// Reads a 64-bit application register.\r
//\r
// Reads and returns the application register specified by Index.\r
// If Index is invalid then 0xFFFFFFFFFFFFFFFF is returned.  This function is only available on IPF.\r
//\r
// Arguments :\r
//\r
// On Entry : The index of the application register to read.\r
//\r
// Return Value: The application register specified by Index.\r
//\r
//--\r
//----------------------------------------------------------------------------------\r
.text\r
.type   AsmReadApplicationRegister, @function\r
.proc   AsmReadApplicationRegister\r
.regstk 1, 0, 0, 0\r
\r
AsmReadApplicationRegister::\r
  //\r
  // ARs are defined in the ranges 0-44 and 64-66 (with some holes).\r
  // Compact this list by subtracting 16 from the top range.\r
  // 0-44, 64-66 -> 0-44, 48-50\r
  //\r
  mov  r15=2\r
  mov  r14=pr                   // save predicates\r
  cmp.leu  p6,p7=64,in0         // p6 = AR# >= 64\r
  ;;\r
  (p7)  cmp.leu  p7,p0=48,in0   // p7 = 32 <= AR# < 64\r
  (p6)  add  in0=-16,in0        // if (AR >= 64) AR# -= 16\r
  ;;\r
  (p7)  mov  r15=0              // if bad range (48-63)\r
  ;;\r
  mov  ret0=-1                  // in case of illegal AR #\r
  shl  r15=r15,in0              // r15 = 0x2 << AR#\r
  ;;\r
  mov  pr=r15,-1\r
  ;;\r
  //\r
  // At this point the predicates contain a bit field of the\r
  // AR desired.  (The bit is the AR+1, since pr0 is always 1.)\r
  //\r
  .pred.rel "mutex",p1,p2,p3,p4,p5,p6,p7,p8,p17,p18,p19,p20,p22,p25,\\r
        p26,p27,p28,p29,p30,p31,p33,p37,p41,p45,p49,p50,p51\r
  (p1)  mov  ret0=ar.k0         // ar0\r
  (p2)  mov  ret0=ar.k1         // ar1\r
  (p3)  mov  ret0=ar.k2         // ar2\r
  (p4)  mov  ret0=ar.k3         // ar3\r
  (p5)  mov  ret0=ar.k4         // ar4\r
  (p6)  mov  ret0=ar.k5         // ar5\r
  (p7)  mov  ret0=ar.k6         // ar6\r
  (p8)  mov  ret0=ar.k7         // ar7\r
\r
  (p17)  mov  ret0=ar.rsc       // ar16\r
  (p18)  mov  ret0=ar.bsp       // ar17\r
  (p19)  mov  ret0=ar.bspstore  // ar18\r
  (p20)  mov  ret0=ar.rnat      // ar19\r
\r
  (p22)  mov  ret0=ar.fcr       // ar21 [iA32]\r
\r
  (p25)  mov  ret0=ar.eflag     // ar24 [iA32]\r
  (p26)  mov  ret0=ar.csd       // ar25 [iA32]\r
  (p27)  mov  ret0=ar.ssd       // ar26 [iA32]\r
  (p28)  mov  ret0=ar.cflg      // ar27 [iA32]\r
  (p29)  mov  ret0=ar.fsr       // ar28 [iA32]\r
  (p30)  mov  ret0=ar.fir       // ar29 [iA32]\r
  (p31)  mov  ret0=ar.fdr       // ar30 [iA32]\r
\r
  (p33)  mov  ret0=ar.ccv       // ar32\r
\r
  (p37)  mov  ret0=ar.unat      // ar36\r
\r
  (p41)  mov  ret0=ar.fpsr      // ar40\r
\r
  (p45)  mov  ret0=ar.itc       // ar44\r
\r
  //\r
  // This is the translated (-16) range.\r
  //\r
  (p49)  mov  ret0=ar.pfs       // ar64\r
  (p50)  mov  ret0=ar.lc        // ar65\r
  (p51)  mov  ret0=ar.ec        // ar66\r
\r
  // Restore predicates and return.\r
\r
  mov  pr=r14,-1\r
  br.ret.sptk  b0\r
  .endp\r