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ArmPkg/ArmDisassemblerLib: fix check for MSR instruction
[mirror_edk2.git] / MdePkg / Library / BaseLib / X64 / DisableCache.asm
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9f4f2f0e 1;------------------------------------------------------------------------------\r
2;\r
bb817c56
HT
3; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>\r
4; This program and the accompanying materials\r
9f4f2f0e 5; are licensed and made available under the terms and conditions of the BSD License\r
6; which accompanies this distribution. The full text of the license may be found at\r
2fc59a00 7; http://opensource.org/licenses/bsd-license.php.\r
9f4f2f0e 8;\r
9; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
10; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
11;\r
12; Module Name:\r
13;\r
14; DisableCache.Asm\r
15;\r
16; Abstract:\r
17;\r
18; Set the CD bit of CR0 to 1, clear the NW bit of CR0 to 0, and flush all caches with a\r
19; WBINVD instruction.\r
20;\r
21; Notes:\r
22;\r
23;------------------------------------------------------------------------------\r
24\r
25 .code\r
26\r
27;------------------------------------------------------------------------------\r
28; VOID\r
29; EFIAPI\r
30; AsmDisableCache (\r
31; VOID\r
32; );\r
33;------------------------------------------------------------------------------\r
34AsmDisableCache PROC\r
35 mov rax, cr0\r
36 bts rax, 30\r
37 btr rax, 29\r
38 mov cr0, rax\r
39 wbinvd\r
40 ret\r
41AsmDisableCache ENDP\r
42\r
43 END\r