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b1ff428c | 1 | #------------------------------------------------------------------------------\r |
2 | #\r | |
9095d37b | 3 | # Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r |
bb817c56 | 4 | # This program and the accompanying materials\r |
b1ff428c | 5 | # are licensed and made available under the terms and conditions of the BSD License\r |
6 | # which accompanies this distribution. The full text of the license may be found at\r | |
2fc59a00 | 7 | # http://opensource.org/licenses/bsd-license.php.\r |
b1ff428c | 8 | #\r |
9 | # THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
10 | # WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
11 | #\r | |
12 | # Module Name:\r | |
13 | #\r | |
14 | # DisablePaging64.S\r | |
15 | #\r | |
16 | # Abstract:\r | |
17 | #\r | |
18 | # AsmDisablePaging64 function\r | |
19 | #\r | |
20 | # Notes:\r | |
21 | #\r | |
22 | #------------------------------------------------------------------------------\r | |
23 | \r | |
9095d37b | 24 | \r |
b1ff428c | 25 | \r |
26 | #------------------------------------------------------------------------------\r | |
27 | # VOID\r | |
28 | # EFIAPI\r | |
29 | # InternalX86DisablePaging64 (\r | |
30 | # IN UINT16 Cs,\r | |
2561f565 | 31 | # IN UINT32 EntryPoint,\r |
32 | # IN UINT32 Context1, OPTIONAL\r | |
b1ff428c | 33 | # IN UINT32 Context2, OPTIONAL\r |
2561f565 | 34 | # IN UINT32 NewStack\r |
b1ff428c | 35 | # );\r |
36 | #------------------------------------------------------------------------------\r | |
37 | \r | |
d5172f91 | 38 | ASM_GLOBAL ASM_PFX(InternalX86DisablePaging64)\r |
b1ff428c | 39 | ASM_PFX(InternalX86DisablePaging64):\r |
9095d37b | 40 | cli\r |
09b0fdbb | 41 | lea L1(%rip), %rsi # rsi <- The start address of transition code\r |
42 | mov 0x28(%rsp), %edi # rdi <- New stack\r | |
09b0fdbb | 43 | lea _mTransitionEnd(%rip), %rax # rax <- end of transition code\r |
44 | sub %rsi, %rax # rax <- The size of transition piece code\r | |
be04587c | 45 | add $4, %rax # round rax up to the next 4 byte boundary\r |
bc810c89 | 46 | and $0xfc, %al\r |
9095d37b | 47 | sub %rax, %rdi # rdi <- use stack to hold transition code\r |
be04587c | 48 | mov %edi, %r10d # r10 <- The start address of transicition code below 4G\r |
09b0fdbb | 49 | push %rcx # save rcx to stack\r |
50 | mov %rax, %rcx # rcx <- The size of transition piece code\r | |
51 | rep\r | |
52 | movsb # copy transition code to (new stack - 64byte) below 4G\r | |
53 | pop %rcx # restore rcx\r | |
9095d37b LG |
54 | \r |
55 | mov %r8d, %esi\r | |
56 | mov %r9d, %edi\r | |
be04587c | 57 | mov %r10d, %eax\r |
58 | sub $4, %eax\r | |
2561f565 | 59 | push %rcx # push Cs to stack\r |
9095d37b | 60 | push %r10 # push address of transition code on stack\r |
2561f565 | 61 | .byte 0x48, 0xcb # retq: Use far return to load CS register from stack\r |
9095d37b | 62 | # (Use raw byte code since some GNU assemblers generates incorrect code for "retq")\r |
b1ff428c | 63 | L1:\r |
64 | mov %eax,%esp # set up new stack\r | |
65 | mov %cr0,%rax\r | |
be04587c | 66 | btr $0x1f,%eax # clear CR0.PG\r |
b1ff428c | 67 | mov %rax,%cr0 # disable paging\r |
63d7211e | 68 | \r |
be04587c | 69 | mov %edx,%ebx # save EntryPoint to ebx, for rdmsr will overwrite edx\r |
b1ff428c | 70 | mov $0xc0000080,%ecx\r |
9095d37b | 71 | rdmsr\r |
b1ff428c | 72 | and $0xfe,%ah # clear LME\r |
9095d37b | 73 | wrmsr\r |
b1ff428c | 74 | mov %cr4,%rax\r |
75 | and $0xdf,%al # clear PAE\r | |
76 | mov %rax,%cr4\r | |
77 | push %rdi # push Context2\r | |
78 | push %rsi # push Context1\r | |
63d7211e | 79 | callq *%rbx # transfer control to EntryPoint\r |
b1ff428c | 80 | jmp . # no one should get here\r |
bc810c89 EB |
81 | \r |
82 | _mTransitionEnd :\r |