ArmPkg/ArmDisassemblerLib: fix check for MSR instruction

[mirror_edk2.git] / MdePkg / Library / BaseLib / X64 / DisablePaging64.asm

;------------------------------------------------------------------------------\r
;\r
; Copyright (c) 2006 - 2008, Intel Corporation. All rights reserved.<BR>\r
; This program and the accompanying materials\r
; are licensed and made available under the terms and conditions of the BSD License\r
; which accompanies this distribution.  The full text of the license may be found at\r
; http://opensource.org/licenses/bsd-license.php.\r
;\r
; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
;\r
; Module Name:\r
;\r
;   DisablePaging64.Asm\r
;\r
; Abstract:\r
;\r
;   AsmDisablePaging64 function\r
;\r
; Notes:\r
;\r
;------------------------------------------------------------------------------\r
\r
    .code\r
\r
;------------------------------------------------------------------------------\r
; VOID\r
; EFIAPI\r
; InternalX86DisablePaging64 (\r
;   IN      UINT16                    Cs,\r
;   IN      UINT32                    EntryPoint,\r
;   IN      UINT32                    Context1,  OPTIONAL\r
;   IN      UINT32                    Context2,  OPTIONAL\r
;   IN      UINT32                    NewStack\r
;   );\r
;------------------------------------------------------------------------------\r
InternalX86DisablePaging64    PROC\r
    cli\r
    lea     rsi, @F                     ; rsi <- The start address of transition code\r
    mov     edi, [rsp + 28h]            ; rdi <- New stack\r
    lea     rax, mTransitionEnd         ; rax <- end of transition code\r
    sub     rax, rsi                    ; rax <- The size of transition piece code \r
    add     rax, 4                      ; Round RAX up to the next 4 byte boundary\r
    and     al, 0fch\r
    sub     rdi, rax                    ; rdi <- Use stack to hold transition code\r
    mov     r10d, edi                   ; r10 <- The start address of transicition code below 4G\r
    push    rcx                         ; save rcx to stack\r
    mov     rcx, rax                    ; rcx <- The size of transition piece code\r
    rep     movsb                       ; copy transition code to top of new stack which must be below 4GB\r
    pop     rcx                         ; restore rcx\r
    \r
    mov     esi, r8d\r
    mov     edi, r9d\r
    mov     eax, r10d                   ; eax <- start of the transition code on the stack\r
    sub     eax, 4                      ; eax <- One slot below transition code on the stack\r
    push    rcx                         ; push Cs to stack\r
    push    r10                         ; push address of tansition code on stack\r
    DB      48h                         ; prefix to composite "retq" with next "retf"\r
    retf                                ; Use far return to load CS register from stack\r
\r
; Start of transition code\r
@@:\r
    mov     esp, eax                    ; set up new stack\r
    mov     rax, cr0\r
    btr     eax, 31                     ; Clear CR0.PG\r
    mov     cr0, rax                    ; disable paging and caches\r
    \r
    mov     ebx, edx                    ; save EntryPoint to rbx, for rdmsr will overwrite rdx\r
    mov     ecx, 0c0000080h\r
    rdmsr\r
    and     ah, NOT 1                   ; clear LME\r
    wrmsr\r
    mov     rax, cr4\r
    and     al, NOT (1 SHL 5)           ; clear PAE\r
    mov     cr4, rax\r
    push    rdi                         ; push Context2\r
    push    rsi                         ; push Context1\r
    call    rbx                         ; transfer control to EntryPoint\r
    hlt                                 ; no one should get here\r
InternalX86DisablePaging64    ENDP\r
\r
mTransitionEnd LABEL    BYTE\r
\r
    END\r