Fixed one bug of WriteUnaligned24()

[mirror_edk2.git] / MdePkg / Library / BaseLib / x86LowLevel.c

/** @file\r
  IA-32/x64 specific functions.\r
\r
  Copyright (c) 2006, Intel Corporation<BR>\r
  All rights reserved. This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
  Module Name:  x86LowLevel.c\r
\r
**/\r
\r
#include "BaseLibInternals.h"\r
\r
//\r
// Bit-wise MSR operations\r
//\r
\r
/**\r
  Reads a 64-bit MSR, performs a bitwise inclusive OR on the lower 32-bits, and\r
  writes the result back to the 64-bit MSR.\r
\r
  Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r
  between the lower 32-bits of the read result and the value specified by\r
  OrData, and writes the result to the 64-bit MSR specified by Index. The lower\r
  32-bits of the value written to the MSR is returned. No parameter checking is\r
  performed on Index or OrData, and some of these may cause CPU exceptions. The\r
  caller must either guarantee that Index and OrData are valid, or the caller\r
  must establish proper exception handlers. This function is only available on\r
  IA-32 and X64.\r
\r
  @param  Index   The 32-bit MSR index to write.\r
  @param  OrData  The value to OR with the read value from the MSR.\r
\r
  @return The lower 32-bit value written to the MSR.\r
\r
**/\r
UINT32\r
EFIAPI\r
AsmMsrOr32 (\r
  IN      UINT32                    Index,\r
  IN      UINT32                    OrData\r
  )\r
{\r
  return (UINT32)AsmMsrOr64 (Index, OrData);\r
}\r
\r
/**\r
  Reads a 64-bit MSR, performs a bitwise AND on the lower 32-bits, and writes\r
  the result back to the 64-bit MSR.\r
\r
  Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
  lower 32-bits of the read result and the value specified by AndData, and\r
  writes the result to the 64-bit MSR specified by Index. The lower 32-bits of\r
  the value written to the MSR is returned. No parameter checking is performed\r
  on Index or AndData, and some of these may cause CPU exceptions. The caller\r
  must either guarantee that Index and AndData are valid, or the caller must\r
  establish proper exception handlers. This function is only available on IA-32\r
  and X64.\r
\r
  @param  Index   The 32-bit MSR index to write.\r
  @param  AndData The value to AND with the read value from the MSR.\r
\r
  @return The lower 32-bit value written to the MSR.\r
\r
**/\r
UINT32\r
EFIAPI\r
AsmMsrAnd32 (\r
  IN      UINT32                    Index,\r
  IN      UINT32                    AndData\r
  )\r
{\r
  return (UINT32)AsmMsrAnd64 (Index, AndData);\r
}\r
\r
/**\r
  Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive OR\r
  on the lower 32-bits, and writes the result back to the 64-bit MSR.\r
\r
  Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
  lower 32-bits of the read result and the value specified by AndData\r
  preserving the upper 32-bits, performs a bitwise inclusive OR between the\r
  result of the AND operation and the value specified by OrData, and writes the\r
  result to the 64-bit MSR specified by Address. The lower 32-bits of the value\r
  written to the MSR is returned. No parameter checking is performed on Index,\r
  AndData, or OrData, and some of these may cause CPU exceptions. The caller\r
  must either guarantee that Index, AndData, and OrData are valid, or the\r
  caller must establish proper exception handlers. This function is only\r
  available on IA-32 and X64.\r
\r
  @param  Index   The 32-bit MSR index to write.\r
  @param  AndData The value to AND with the read value from the MSR.\r
  @param  OrData  The value to OR with the result of the AND operation.\r
\r
  @return The lower 32-bit value written to the MSR.\r
\r
**/\r
UINT32\r
EFIAPI\r
AsmMsrAndThenOr32 (\r
  IN      UINT32                    Index,\r
  IN      UINT32                    AndData,\r
  IN      UINT32                    OrData\r
  )\r
{\r
  return (UINT32)AsmMsrAndThenOr64 (Index, AndData, OrData);\r
}\r
\r
/**\r
  Reads a bit field of an MSR.\r
\r
  Reads the bit field in the lower 32-bits of a 64-bit MSR. The bit field is\r
  specified by the StartBit and the EndBit. The value of the bit field is\r
  returned. The caller must either guarantee that Index is valid, or the caller\r
  must set up exception handlers to catch the exceptions. This function is only\r
  available on IA-32 and X64.\r
\r
  If StartBit is greater than 31, then ASSERT().\r
  If EndBit is greater than 31, then ASSERT().\r
  If EndBit is less than or equal to StartBit, then ASSERT().\r
\r
  @param  Index     The 32-bit MSR index to read.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..31.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..31.\r
\r
  @return The bit field read from the MSR.\r
\r
**/\r
UINT32\r
EFIAPI\r
AsmMsrBitFieldRead32 (\r
  IN      UINT32                    Index,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit\r
  )\r
{\r
  return BitFieldRead32 (AsmReadMsr32 (Index), StartBit, EndBit);\r
}\r
\r
/**\r
  Writes a bit field to an MSR.\r
\r
  Writes Value to a bit field in the lower 32-bits of a  64-bit MSR. The bit\r
  field is specified by the StartBit and the EndBit. All other bits in the\r
  destination MSR are preserved. The lower 32-bits of the MSR written is\r
  returned. Extra left bits in Value are stripped. The caller must either\r
  guarantee that Index and the data written is valid, or the caller must set up\r
  exception handlers to catch the exceptions. This function is only available\r
  on IA-32 and X64.\r
\r
  If StartBit is greater than 31, then ASSERT().\r
  If EndBit is greater than 31, then ASSERT().\r
  If EndBit is less than or equal to StartBit, then ASSERT().\r
\r
  @param  Index     The 32-bit MSR index to write.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..31.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..31.\r
  @param  Value     New value of the bit field.\r
\r
  @return The lower 32-bit of the value written to the MSR.\r
\r
**/\r
UINT32\r
EFIAPI\r
AsmMsrBitFieldWrite32 (\r
  IN      UINT32                    Index,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT32                    Value\r
  )\r
{\r
  ASSERT (EndBit < sizeof (Value) * 8);\r
  ASSERT (StartBit <= EndBit);\r
  return (UINT32)AsmMsrBitFieldWrite64 (Index, StartBit, EndBit, Value);\r
}\r
\r
/**\r
  Reads a bit field in a 64-bit MSR, performs a bitwise OR, and writes the\r
  result back to the bit field in the 64-bit MSR.\r
\r
  Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r
  between the read result and the value specified by OrData, and writes the\r
  result to the 64-bit MSR specified by Index. The lower 32-bits of the value\r
  written to the MSR are returned. Extra left bits in OrData are stripped. The\r
  caller must either guarantee that Index and the data written is valid, or\r
  the caller must set up exception handlers to catch the exceptions. This\r
  function is only available on IA-32 and X64.\r
\r
  If StartBit is greater than 31, then ASSERT().\r
  If EndBit is greater than 31, then ASSERT().\r
  If EndBit is less than or equal to StartBit, then ASSERT().\r
\r
  @param  Index     The 32-bit MSR index to write.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..31.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..31.\r
  @param  OrData    The value to OR with the read value from the MSR.\r
\r
  @return The lower 32-bit of the value written to the MSR.\r
\r
**/\r
UINT32\r
EFIAPI\r
AsmMsrBitFieldOr32 (\r
  IN      UINT32                    Index,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT32                    OrData\r
  )\r
{\r
  ASSERT (EndBit < sizeof (OrData) * 8);\r
  ASSERT (StartBit <= EndBit);\r
  return (UINT32)AsmMsrBitFieldOr64 (Index, StartBit, EndBit, OrData);\r
}\r
\r
/**\r
  Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r
  result back to the bit field in the 64-bit MSR.\r
\r
  Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
  read result and the value specified by AndData, and writes the result to the\r
  64-bit MSR specified by Index. The lower 32-bits of the value written to the\r
  MSR are returned. Extra left bits in AndData are stripped. The caller must\r
  either guarantee that Index and the data written is valid, or the caller must\r
  set up exception handlers to catch the exceptions. This function is only\r
  available on IA-32 and X64.\r
\r
  If StartBit is greater than 31, then ASSERT().\r
  If EndBit is greater than 31, then ASSERT().\r
  If EndBit is less than or equal to StartBit, then ASSERT().\r
\r
  @param  Index     The 32-bit MSR index to write.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..31.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..31.\r
  @param  AndData   The value to AND with the read value from the MSR.\r
\r
  @return The lower 32-bit of the value written to the MSR.\r
\r
**/\r
UINT32\r
EFIAPI\r
AsmMsrBitFieldAnd32 (\r
  IN      UINT32                    Index,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT32                    AndData\r
  )\r
{\r
  ASSERT (EndBit < sizeof (AndData) * 8);\r
  ASSERT (StartBit <= EndBit);\r
  return (UINT32)AsmMsrBitFieldAnd64 (Index, StartBit, EndBit, AndData);\r
}\r
\r
/**\r
  Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r
  bitwise inclusive OR, and writes the result back to the bit field in the\r
  64-bit MSR.\r
\r
  Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by a\r
  bitwise inclusive OR between the read result and the value specified by\r
  AndData, and writes the result to the 64-bit MSR specified by Index. The\r
  lower 32-bits of the value written to the MSR are returned. Extra left bits\r
  in both AndData and OrData are stripped. The caller must either guarantee\r
  that Index and the data written is valid, or the caller must set up exception\r
  handlers to catch the exceptions. This function is only available on IA-32\r
  and X64.\r
\r
  If StartBit is greater than 31, then ASSERT().\r
  If EndBit is greater than 31, then ASSERT().\r
  If EndBit is less than or equal to StartBit, then ASSERT().\r
\r
  @param  Index     The 32-bit MSR index to write.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..31.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..31.\r
  @param  AndData   The value to AND with the read value from the MSR.\r
  @param  OrData    The value to OR with the result of the AND operation.\r
\r
  @return The lower 32-bit of the value written to the MSR.\r
\r
**/\r
UINT32\r
EFIAPI\r
AsmMsrBitFieldAndThenOr32 (\r
  IN      UINT32                    Index,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT32                    AndData,\r
  IN      UINT32                    OrData\r
  )\r
{\r
  ASSERT (EndBit < sizeof (AndData) * 8);\r
  ASSERT (StartBit <= EndBit);\r
  return (UINT32)AsmMsrBitFieldAndThenOr64 (\r
                   Index,\r
                   StartBit,\r
                   EndBit,\r
                   AndData,\r
                   OrData\r
                   );\r
}\r
\r
/**\r
  Reads a 64-bit MSR, performs a bitwise inclusive OR, and writes the result\r
  back to the 64-bit MSR.\r
\r
  Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r
  between the read result and the value specified by OrData, and writes the\r
  result to the 64-bit MSR specified by Index. The value written to the MSR is\r
  returned. No parameter checking is performed on Index or OrData, and some of\r
  these may cause CPU exceptions. The caller must either guarantee that Index\r
  and OrData are valid, or the caller must establish proper exception handlers.\r
  This function is only available on IA-32 and X64.\r
\r
  @param  Index   The 32-bit MSR index to write.\r
  @param  OrData  The value to OR with the read value from the MSR.\r
\r
  @return The value written back to the MSR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmMsrOr64 (\r
  IN      UINT32                    Index,\r
  IN      UINT64                    OrData\r
  )\r
{\r
  return AsmWriteMsr64 (Index, AsmReadMsr64 (Index) | OrData);\r
}\r
\r
/**\r
  Reads a 64-bit MSR, performs a bitwise AND, and writes the result back to the\r
  64-bit MSR.\r
\r
  Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
  read result and the value specified by OrData, and writes the result to the\r
  64-bit MSR specified by Index. The value written to the MSR is returned. No\r
  parameter checking is performed on Index or OrData, and some of these may\r
  cause CPU exceptions. The caller must either guarantee that Index and OrData\r
  are valid, or the caller must establish proper exception handlers. This\r
  function is only available on IA-32 and X64.\r
\r
  @param  Index   The 32-bit MSR index to write.\r
  @param  AndData The value to AND with the read value from the MSR.\r
\r
  @return The value written back to the MSR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmMsrAnd64 (\r
  IN      UINT32                    Index,\r
  IN      UINT64                    AndData\r
  )\r
{\r
  return AsmWriteMsr64 (Index, AsmReadMsr64 (Index) & AndData);\r
}\r
\r
/**\r
  Reads a 64-bit MSR, performs a bitwise AND followed by a bitwise inclusive\r
  OR, and writes the result back to the 64-bit MSR.\r
\r
  Reads the 64-bit MSR specified by Index, performs a bitwise AND between read\r
  result and the value specified by AndData, performs a bitwise inclusive OR\r
  between the result of the AND operation and the value specified by OrData,\r
  and writes the result to the 64-bit MSR specified by Index. The value written\r
  to the MSR is returned. No parameter checking is performed on Index, AndData,\r
  or OrData, and some of these may cause CPU exceptions. The caller must either\r
  guarantee that Index, AndData, and OrData are valid, or the caller must\r
  establish proper exception handlers. This function is only available on IA-32\r
  and X64.\r
\r
  @param  Index   The 32-bit MSR index to write.\r
  @param  AndData The value to AND with the read value from the MSR.\r
  @param  OrData  The value to OR with the result of the AND operation.\r
\r
  @return The value written back to the MSR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmMsrAndThenOr64 (\r
  IN      UINT32                    Index,\r
  IN      UINT64                    AndData,\r
  IN      UINT64                    OrData\r
  )\r
{\r
  return AsmWriteMsr64 (Index, (AsmReadMsr64 (Index) & AndData) | OrData);\r
}\r
\r
/**\r
  Reads a bit field of an MSR.\r
\r
  Reads the bit field in the 64-bit MSR. The bit field is specified by the\r
  StartBit and the EndBit. The value of the bit field is returned. The caller\r
  must either guarantee that Index is valid, or the caller must set up\r
  exception handlers to catch the exceptions. This function is only available\r
  on IA-32 and X64.\r
\r
  If StartBit is greater than 63, then ASSERT().\r
  If EndBit is greater than 63, then ASSERT().\r
  If EndBit is less than or equal to StartBit, then ASSERT().\r
\r
  @param  Index     The 32-bit MSR index to read.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..63.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..63.\r
\r
  @return The value written back to the MSR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmMsrBitFieldRead64 (\r
  IN      UINT32                    Index,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit\r
  )\r
{\r
  return BitFieldRead64 (AsmReadMsr64 (Index), StartBit, EndBit);\r
}\r
\r
/**\r
  Writes a bit field to an MSR.\r
\r
  Writes Value to a bit field in a 64-bit MSR. The bit field is specified by\r
  the StartBit and the EndBit. All other bits in the destination MSR are\r
  preserved. The MSR written is returned. Extra left bits in Value are\r
  stripped. The caller must either guarantee that Index and the data written is\r
  valid, or the caller must set up exception handlers to catch the exceptions.\r
  This function is only available on IA-32 and X64.\r
\r
  If StartBit is greater than 63, then ASSERT().\r
  If EndBit is greater than 63, then ASSERT().\r
  If EndBit is less than or equal to StartBit, then ASSERT().\r
\r
  @param  Index     The 32-bit MSR index to write.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..63.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..63.\r
  @param  Value     New value of the bit field.\r
\r
  @return The value written back to the MSR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmMsrBitFieldWrite64 (\r
  IN      UINT32                    Index,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT64                    Value\r
  )\r
{\r
  return AsmWriteMsr64 (\r
           Index,\r
           BitFieldWrite64 (AsmReadMsr64 (Index), StartBit, EndBit, Value)\r
           );\r
}\r
\r
/**\r
  Reads a bit field in a 64-bit MSR, performs a bitwise inclusive OR, and\r
  writes the result back to the bit field in the 64-bit MSR.\r
\r
  Reads the 64-bit MSR specified by Index, performs a bitwise inclusive OR\r
  between the read result and the value specified by OrData, and writes the\r
  result to the 64-bit MSR specified by Index. The value written to the MSR is\r
  returned. Extra left bits in OrData are stripped. The caller must either\r
  guarantee that Index and the data written is valid, or the caller must set up\r
  exception handlers to catch the exceptions. This function is only available\r
  on IA-32 and X64.\r
\r
  If StartBit is greater than 63, then ASSERT().\r
  If EndBit is greater than 63, then ASSERT().\r
  If EndBit is less than or equal to StartBit, then ASSERT().\r
\r
  @param  Index     The 32-bit MSR index to write.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..63.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..63.\r
  @param  OrData    The value to OR with the read value from the bit field.\r
\r
  @return The value written back to the MSR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmMsrBitFieldOr64 (\r
  IN      UINT32                    Index,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT64                    OrData\r
  )\r
{\r
  return AsmWriteMsr64 (\r
           Index,\r
           BitFieldOr64 (AsmReadMsr64 (Index), StartBit, EndBit, OrData)\r
           );\r
}\r
\r
/**\r
  Reads a bit field in a 64-bit MSR, performs a bitwise AND, and writes the\r
  result back to the bit field in the 64-bit MSR.\r
\r
  Reads the 64-bit MSR specified by Index, performs a bitwise AND between the\r
  read result and the value specified by AndData, and writes the result to the\r
  64-bit MSR specified by Index. The value written to the MSR is returned.\r
  Extra left bits in AndData are stripped. The caller must either guarantee\r
  that Index and the data written is valid, or the caller must set up exception\r
  handlers to catch the exceptions. This function is only available on IA-32\r
  and X64.\r
\r
  If StartBit is greater than 63, then ASSERT().\r
  If EndBit is greater than 63, then ASSERT().\r
  If EndBit is less than or equal to StartBit, then ASSERT().\r
\r
  @param  Index     The 32-bit MSR index to write.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..63.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..63.\r
  @param  AndData   The value to AND with the read value from the bit field.\r
\r
  @return The value written back to the MSR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmMsrBitFieldAnd64 (\r
  IN      UINT32                    Index,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT64                    AndData\r
  )\r
{\r
  return AsmWriteMsr64 (\r
           Index,\r
           BitFieldAnd64 (AsmReadMsr64 (Index), StartBit, EndBit, AndData)\r
           );\r
}\r
\r
/**\r
  Reads a bit field in a 64-bit MSR, performs a bitwise AND followed by a\r
  bitwise inclusive OR, and writes the result back to the bit field in the\r
  64-bit MSR.\r
\r
  Reads the 64-bit MSR specified by Index, performs a bitwise AND followed by\r
  a bitwise inclusive OR between the read result and the value specified by\r
  AndData, and writes the result to the 64-bit MSR specified by Index. The\r
  value written to the MSR is returned. Extra left bits in both AndData and\r
  OrData are stripped. The caller must either guarantee that Index and the data\r
  written is valid, or the caller must set up exception handlers to catch the\r
  exceptions. This function is only available on IA-32 and X64.\r
\r
  If StartBit is greater than 63, then ASSERT().\r
  If EndBit is greater than 63, then ASSERT().\r
  If EndBit is less than or equal to StartBit, then ASSERT().\r
\r
  @param  Index     The 32-bit MSR index to write.\r
  @param  StartBit  The ordinal of the least significant bit in the bit field.\r
                    Range 0..63.\r
  @param  EndBit    The ordinal of the most significant bit in the bit field.\r
                    Range 0..63.\r
  @param  AndData   The value to AND with the read value from the bit field.\r
  @param  OrData    The value to OR with the result of the AND operation.\r
\r
  @return The value written back to the MSR.\r
\r
**/\r
UINT64\r
EFIAPI\r
AsmMsrBitFieldAndThenOr64 (\r
  IN      UINT32                    Index,\r
  IN      UINTN                     StartBit,\r
  IN      UINTN                     EndBit,\r
  IN      UINT64                    AndData,\r
  IN      UINT64                    OrData\r
  )\r
{\r
  return AsmWriteMsr64 (\r
           Index,\r
           BitFieldAndThenOr64 (\r
             AsmReadMsr64 (Index),\r
             StartBit,\r
             EndBit,\r
             AndData,\r
             OrData\r
             )\r
           );\r
}\r
\r
//\r
// Base Library CPU Functions\r
//\r
\r
/**\r
  Retrieves the current CPU interrupt state.\r
\r
  Retrieves the current CPU interrupt state. Returns TRUE is interrupts are\r
  currently enabled. Otherwise returns FALSE.\r
\r
  @retval TRUE  CPU interrupts are enabled.\r
  @retval FALSE CPU interrupts are disabled.\r
\r
**/\r
BOOLEAN\r
EFIAPI\r
GetInterruptState (\r
  VOID\r
  )\r
{\r
  IA32_EFLAGS32                     EFlags;\r
\r
  EFlags.UintN = AsmReadEflags ();\r
  return (BOOLEAN)(EFlags.Bits.IF == 1);\r
}\r
\r
//\r
// Ia32 and x64 specific functions\r
//\r
\r
/**\r
  Reads the current Global Descriptor Table Register(GDTR) descriptor.\r
\r
  Reads and returns the current GDTR descriptor and returns it in Gdtr. This\r
  function is only available on IA-32 and X64.\r
\r
  If Gdtr is NULL, then ASSERT().\r
\r
  @param  Gdtr  Pointer to a GDTR descriptor.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmReadGdtr (\r
  OUT     IA32_DESCRIPTOR           *Gdtr\r
  )\r
{\r
  ASSERT (Gdtr != NULL);\r
  InternalX86ReadGdtr (Gdtr);\r
}\r
\r
/**\r
  Writes the current Global Descriptor Table Register (GDTR) descriptor.\r
\r
  Writes and the current GDTR descriptor specified by Gdtr. This function is\r
  only available on IA-32 and X64.\r
\r
  If Gdtr is NULL, then ASSERT().\r
\r
  @param  Gdtr  Pointer to a GDTR descriptor.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmWriteGdtr (\r
  IN      CONST IA32_DESCRIPTOR     *Gdtr\r
  )\r
{\r
  ASSERT (Gdtr != NULL);\r
  InternalX86WriteGdtr (Gdtr);\r
}\r
\r
/**\r
  Reads the current Interrupt Descriptor Table Register(GDTR) descriptor.\r
\r
  Reads and returns the current IDTR descriptor and returns it in Idtr. This\r
  function is only available on IA-32 and X64.\r
\r
  If Idtr is NULL, then ASSERT().\r
\r
  @param  Idtr  Pointer to a IDTR descriptor.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmReadIdtr (\r
  OUT     IA32_DESCRIPTOR           *Idtr\r
  )\r
{\r
  ASSERT (Idtr != NULL);\r
  InternalX86ReadIdtr (Idtr);\r
}\r
\r
/**\r
  Writes the current Interrupt Descriptor Table Register(GDTR) descriptor.\r
\r
  Writes the current IDTR descriptor and returns it in Idtr. This function is\r
  only available on IA-32 and X64.\r
\r
  If Idtr is NULL, then ASSERT().\r
\r
  @param  Idtr  Pointer to a IDTR descriptor.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmWriteIdtr (\r
  IN      CONST IA32_DESCRIPTOR     *Idtr\r
  )\r
{\r
  ASSERT (Idtr != NULL);\r
  InternalX86WriteIdtr (Idtr);\r
}\r
\r
/**\r
  Save the current floating point/SSE/SSE2 context to a buffer.\r
\r
  Saves the current floating point/SSE/SSE2 state to the buffer specified by\r
  Buffer. Buffer must be aligned on a 16-byte boundary. This function is only\r
  available on IA-32 and X64.\r
\r
  If Buffer is NULL, then ASSERT().\r
  If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r
\r
  @param  Buffer  Pointer to a buffer to save the floating point/SSE/SSE2 context.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmFxSave (\r
  OUT     IA32_FX_BUFFER            *Buffer\r
  )\r
{\r
  ASSERT (Buffer != NULL);\r
  ASSERT (((UINTN)Buffer & 0xf) == 0);\r
  InternalX86FxSave (Buffer);\r
}\r
\r
/**\r
  Restores the current floating point/SSE/SSE2 context from a buffer.\r
\r
  Restores the current floating point/SSE/SSE2 state from the buffer specified\r
  by Buffer. Buffer must be aligned on a 16-byte boundary. This function is\r
  only available on IA-32 and X64.\r
\r
  If Buffer is NULL, then ASSERT().\r
  If Buffer is not aligned on a 16-byte boundary, then ASSERT().\r
  If Buffer was not saved with AsmFxSave(), then ASSERT().\r
\r
  @param  Buffer  Pointer to a buffer to save the floating point/SSE/SSE2 context.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmFxRestore (\r
  IN CONST IA32_FX_BUFFER  *Buffer\r
  )\r
{\r
  ASSERT (Buffer != NULL);\r
  ASSERT (((UINTN)Buffer & 0xf) == 0);\r
  InternalX86FxRestore (Buffer);\r
}\r
\r
/**\r
  Enables the 32-bit paging mode on the CPU.\r
\r
  Enables the 32-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r
  must be properly initialized prior to calling this service. This function\r
  assumes the current execution mode is 32-bit protected mode. This function is\r
  only available on IA-32. After the 32-bit paging mode is enabled, control is\r
  transferred to the function specified by EntryPoint using the new stack\r
  specified by NewStack and passing in the parameters specified by Context1 and\r
  Context2. Context1 and Context2 are optional and may be NULL. The function\r
  EntryPoint must never return.\r
\r
  If the current execution mode is not 32-bit protected mode, then ASSERT().\r
  If EntryPoint is NULL, then ASSERT().\r
  If NewStack is NULL, then ASSERT().\r
\r
  There are a number of constraints that must be followed before calling this\r
  function:\r
  1)  Interrupts must be disabled.\r
  2)  The caller must be in 32-bit protected mode with flat descriptors. This\r
      means all descriptors must have a base of 0 and a limit of 4GB.\r
  3)  CR0 and CR4 must be compatible with 32-bit protected mode with flat\r
      descriptors.\r
  4)  CR3 must point to valid page tables that will be used once the transition\r
      is complete, and those page tables must guarantee that the pages for this\r
      function and the stack are identity mapped.\r
\r
  @param  EntryPoint  A pointer to function to call with the new stack after\r
                      paging is enabled.\r
  @param  Context1    A pointer to the context to pass into the EntryPoint\r
                      function as the first parameter after paging is enabled.\r
  @param  Context2    A pointer to the context to pass into the EntryPoint\r
                      function as the second parameter after paging is enabled.\r
  @param  NewStack    A pointer to the new stack to use for the EntryPoint\r
                      function after paging is enabled.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmEnablePaging32 (\r
  IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,\r
  IN      VOID                      *Context1,  OPTIONAL\r
  IN      VOID                      *Context2,  OPTIONAL\r
  IN      VOID                      *NewStack\r
  )\r
{\r
  ASSERT (EntryPoint != NULL);\r
  ASSERT (NewStack != NULL);\r
  InternalX86EnablePaging32 (EntryPoint, Context1, Context2, NewStack);\r
}\r
\r
/**\r
  Disables the 32-bit paging mode on the CPU.\r
\r
  Disables the 32-bit paging mode on the CPU and returns to 32-bit protected\r
  mode. This function assumes the current execution mode is 32-paged protected\r
  mode. This function is only available on IA-32. After the 32-bit paging mode\r
  is disabled, control is transferred to the function specified by EntryPoint\r
  using the new stack specified by NewStack and passing in the parameters\r
  specified by Context1 and Context2. Context1 and Context2 are optional and\r
  may be NULL. The function EntryPoint must never return.\r
\r
  If the current execution mode is not 32-bit paged mode, then ASSERT().\r
  If EntryPoint is NULL, then ASSERT().\r
  If NewStack is NULL, then ASSERT().\r
\r
  There are a number of constraints that must be followed before calling this\r
  function:\r
  1)  Interrupts must be disabled.\r
  2)  The caller must be in 32-bit paged mode.\r
  3)  CR0, CR3, and CR4 must be compatible with 32-bit paged mode.\r
  4)  CR3 must point to valid page tables that guarantee that the pages for\r
      this function and the stack are identity mapped.\r
\r
  @param  EntryPoint  A pointer to function to call with the new stack after\r
                      paging is disabled.\r
  @param  Context1    A pointer to the context to pass into the EntryPoint\r
                      function as the first parameter after paging is disabled.\r
  @param  Context2    A pointer to the context to pass into the EntryPoint\r
                      function as the second parameter after paging is\r
                      disabled.\r
  @param  NewStack    A pointer to the new stack to use for the EntryPoint\r
                      function after paging is disabled.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmDisablePaging32 (\r
  IN      SWITCH_STACK_ENTRY_POINT  EntryPoint,\r
  IN      VOID                      *Context1,  OPTIONAL\r
  IN      VOID                      *Context2,  OPTIONAL\r
  IN      VOID                      *NewStack\r
  )\r
{\r
  ASSERT (EntryPoint != NULL);\r
  ASSERT (NewStack != NULL);\r
  InternalX86DisablePaging32 (EntryPoint, Context1, Context2, NewStack);\r
}\r
\r
/**\r
  Enables the 64-bit paging mode on the CPU.\r
\r
  Enables the 64-bit paging mode on the CPU. CR0, CR3, CR4, and the page tables\r
  must be properly initialized prior to calling this service. This function\r
  assumes the current execution mode is 32-bit protected mode with flat\r
  descriptors. This function is only available on IA-32. After the 64-bit\r
  paging mode is enabled, control is transferred to the function specified by\r
  EntryPoint using the new stack specified by NewStack and passing in the\r
  parameters specified by Context1 and Context2. Context1 and Context2 are\r
  optional and may be 0. The function EntryPoint must never return.\r
\r
  If the current execution mode is not 32-bit protected mode with flat\r
  descriptors, then ASSERT().\r
  If EntryPoint is 0, then ASSERT().\r
  If NewStack is 0, then ASSERT().\r
\r
  @param  Cs          The 16-bit selector to load in the CS before EntryPoint\r
                      is called. The descriptor in the GDT that this selector\r
                      references must be setup for long mode.\r
  @param  EntryPoint  The 64-bit virtual address of the function to call with\r
                      the new stack after paging is enabled.\r
  @param  Context1    The 64-bit virtual address of the context to pass into\r
                      the EntryPoint function as the first parameter after\r
                      paging is enabled.\r
  @param  Context2    The 64-bit virtual address of the context to pass into\r
                      the EntryPoint function as the second parameter after\r
                      paging is enabled.\r
  @param  NewStack    The 64-bit virtual address of the new stack to use for\r
                      the EntryPoint function after paging is enabled.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmEnablePaging64 (\r
  IN      UINT16                    Cs,\r
  IN      UINT64                    EntryPoint,\r
  IN      UINT64                    Context1,  OPTIONAL\r
  IN      UINT64                    Context2,  OPTIONAL\r
  IN      UINT64                    NewStack\r
  )\r
{\r
  ASSERT (EntryPoint != 0);\r
  ASSERT (NewStack != 0);\r
  InternalX86EnablePaging64 (Cs, EntryPoint, Context1, Context2, NewStack);\r
}\r
\r
/**\r
  Disables the 64-bit paging mode on the CPU.\r
\r
  Disables the 64-bit paging mode on the CPU and returns to 32-bit protected\r
  mode. This function assumes the current execution mode is 64-paging mode.\r
  This function is only available on X64. After the 64-bit paging mode is\r
  disabled, control is transferred to the function specified by EntryPoint\r
  using the new stack specified by NewStack and passing in the parameters\r
  specified by Context1 and Context2. Context1 and Context2 are optional and\r
  may be 0. The function EntryPoint must never return.\r
\r
  If the current execution mode is not 64-bit paged mode, then ASSERT().\r
  If EntryPoint is 0, then ASSERT().\r
  If NewStack is 0, then ASSERT().\r
\r
  @param  Cs          The 16-bit selector to load in the CS before EntryPoint\r
                      is called. The descriptor in the GDT that this selector\r
                      references must be setup for 32-bit protected mode.\r
  @param  EntryPoint  The 64-bit virtual address of the function to call with\r
                      the new stack after paging is disabled.\r
  @param  Context1    The 64-bit virtual address of the context to pass into\r
                      the EntryPoint function as the first parameter after\r
                      paging is disabled.\r
  @param  Context2    The 64-bit virtual address of the context to pass into\r
                      the EntryPoint function as the second parameter after\r
                      paging is disabled.\r
  @param  NewStack    The 64-bit virtual address of the new stack to use for\r
                      the EntryPoint function after paging is disabled.\r
\r
**/\r
VOID\r
EFIAPI\r
AsmDisablePaging64 (\r
  IN      UINT16                    Cs,\r
  IN      UINT32                    EntryPoint,\r
  IN      UINT32                    Context1,  OPTIONAL\r
  IN      UINT32                    Context2,  OPTIONAL\r
  IN      UINT32                    NewStack\r
  )\r
{\r
  ASSERT (EntryPoint != 0);\r
  ASSERT (NewStack != 0);\r
  InternalX86DisablePaging64 (Cs, EntryPoint, Context1, Context2, NewStack);\r
}\r
\r
//\r
// x86 version of MemoryFence()\r
//\r
\r
/**\r
  Used to serialize load and store operations.\r
\r
  All loads and stores that proceed calls to this function are guaranteed to be\r
  globally visible when this function returns.\r
\r
**/\r
VOID\r
EFIAPI\r
MemoryFence (\r
  VOID\r
  )\r
{\r
}\r