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ArmPkg/ArmDisassemblerLib: fix check for MSR instruction
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c5ecf6c1 1;------------------------------------------------------------------------------\r
2;\r
085c3968
HT
3; Copyright (c) 2006, Intel Corporation. All rights reserved.<BR>\r
4; This program and the accompanying materials\r
c5ecf6c1 5; are licensed and made available under the terms and conditions of the BSD License\r
6; which accompanies this distribution. The full text of the license may be found at\r
2fc59a00 7; http://opensource.org/licenses/bsd-license.php.\r
c5ecf6c1 8;\r
9; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
10; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
11;\r
12; Module Name:\r
13;\r
14; SetMem32.asm\r
15;\r
16; Abstract:\r
17;\r
18; SetMem32 function\r
19;\r
20; Notes:\r
21;\r
22;------------------------------------------------------------------------------\r
23\r
24 .code\r
25\r
26;------------------------------------------------------------------------------\r
27; VOID *\r
28; InternalMemSetMem32 (\r
29; IN VOID *Buffer,\r
30; IN UINTN Count,\r
31; IN UINT32 Value\r
32; )\r
33;------------------------------------------------------------------------------\r
34InternalMemSetMem32 PROC\r
35 DB 49h, 0fh, 6eh, 0c0h ; movd mm0, r8 (Value)\r
36 mov rax, rcx ; rax <- Buffer\r
37 xchg rcx, rdx ; rcx <- Count rdx <- Buffer\r
38 shr rcx, 1 ; rcx <- # of qwords to set\r
39 jz @SetDwords\r
40 DB 0fh, 70h, 0C0h, 44h ; pshufw mm0, mm0, 44h\r
41@@:\r
42 DB 0fh, 0e7h, 02h ; movntq [rdx], mm0\r
43 lea rdx, [rdx + 8] ; use "lea" to avoid flag changes\r
44 loop @B\r
45 mfence\r
46@SetDwords:\r
47 jnc @F\r
48 DB 0fh, 7eh, 02h ; movd [rdx], mm0\r
49@@:\r
50 ret\r
51InternalMemSetMem32 ENDP\r
52\r
53 END\r