projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| a37f6605 AB |
1 | ;------------------------------------------------------------------------------\r |
| 2 | ;\r | |
| 3 | ; Copyright (c) 2016, Linaro Ltd. All rights reserved.<BR>\r | |
| 4 | ;\r | |
| 9344f092 | 5 | ; SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| a37f6605 AB |
6 | ;\r |
| 7 | ;------------------------------------------------------------------------------\r | |
| 8 | \r | |
| 9 | EXPORT InternalMemZeroMem\r | |
| 10 | EXPORT InternalMemSetMem\r | |
| 11 | EXPORT InternalMemSetMem16\r | |
| 12 | EXPORT InternalMemSetMem32\r | |
| 13 | EXPORT InternalMemSetMem64\r | |
| 14 | \r | |
| 15 | AREA SetMem, CODE, READONLY, CODEALIGN, ALIGN=5\r | |
| 16 | THUMB\r | |
| 17 | \r | |
| 8b4ca351 AB |
18 | InternalMemSetMem16\r |
| 19 | uxth r2, r2\r | |
| 20 | lsl r1, r1, #1\r | |
| 21 | orr r2, r2, r2, lsl #16\r | |
| 22 | b B0\r | |
| 23 | \r | |
| 24 | InternalMemSetMem32\r | |
| 25 | lsl r1, r1, #2\r | |
| 26 | b B0\r | |
| 27 | \r | |
| 28 | InternalMemSetMem64\r | |
| 29 | lsl r1, r1, #3\r | |
| 30 | b B1\r | |
| a37f6605 | 31 | \r |
| 8b4ca351 | 32 | ALIGN 32\r |
| a37f6605 AB |
33 | InternalMemSetMem\r |
| 34 | uxtb r2, r2\r | |
| 35 | orr r2, r2, r2, lsl #8\r | |
| 8b4ca351 AB |
36 | orr r2, r2, r2, lsl #16\r |
| 37 | b B0\r | |
| a37f6605 | 38 | \r |
| 8b4ca351 AB |
39 | InternalMemZeroMem\r |
| 40 | movs r2, #0\r | |
| 41 | B0\r | |
| a37f6605 AB |
42 | mov r3, r2\r |
| 43 | \r | |
| 8b4ca351 | 44 | B1\r |
| a37f6605 AB |
45 | push {r4, lr}\r |
| 46 | cmp r1, #16 ; fewer than 16 bytes of input?\r | |
| 47 | add r1, r1, r0 ; r1 := dst + length\r | |
| 48 | add lr, r0, #16\r | |
| 49 | blt L2\r | |
| 50 | bic lr, lr, #15 ; align output pointer\r | |
| 51 | \r | |
| 52 | str r2, [r0] ; potentially unaligned store of 4 bytes\r | |
| 53 | str r3, [r0, #4] ; potentially unaligned store of 4 bytes\r | |
| 54 | str r2, [r0, #8] ; potentially unaligned store of 4 bytes\r | |
| 55 | str r3, [r0, #12] ; potentially unaligned store of 4 bytes\r | |
| 56 | beq L1\r | |
| 57 | \r | |
| 58 | L0\r | |
| 59 | add lr, lr, #16 ; advance the output pointer by 16 bytes\r | |
| 60 | subs r4, r1, lr ; past the output?\r | |
| 61 | blt L3 ; break out of the loop\r | |
| 62 | strd r2, r3, [lr, #-16] ; aligned store of 16 bytes\r | |
| 63 | strd r2, r3, [lr, #-8]\r | |
| 64 | bne L0 ; goto beginning of loop\r | |
| 65 | L1\r | |
| 66 | pop {r4, pc}\r | |
| 67 | \r | |
| 68 | L2\r | |
| 69 | subs r4, r1, lr\r | |
| 70 | L3\r | |
| 71 | adds r4, r4, #16\r | |
| 72 | subs r1, r1, #8\r | |
| 73 | cmp r4, #4 ; between 4 and 15 bytes?\r | |
| 74 | blt L4\r | |
| 75 | cmp r4, #8 ; between 8 and 15 bytes?\r | |
| 76 | str r2, [lr, #-16] ; overlapping store of 4 + (4 + 4) + 4 bytes\r | |
| 77 | itt gt\r | |
| 78 | strgt r3, [lr, #-12]\r | |
| 79 | strgt r2, [r1]\r | |
| 80 | str r3, [r1, #4]\r | |
| 81 | pop {r4, pc}\r | |
| 82 | \r | |
| 83 | L4\r | |
| 84 | cmp r4, #2 ; 2 or 3 bytes?\r | |
| 85 | strb r2, [lr, #-16] ; store 1 byte\r | |
| 86 | it ge\r | |
| 87 | strhge r2, [r1, #6] ; store 2 bytes\r | |
| 88 | pop {r4, pc}\r | |
| 89 | \r | |
| 90 | END\r |