projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| c48abbed SQ |
1 | /** @file\r |
| 2 | Null implementation of SmBusLib class library.\r | |
| 3 | \r | |
| 9095d37b | 4 | Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>\r |
| 9344f092 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| c48abbed SQ |
6 | \r |
| 7 | **/\r | |
| 8 | \r | |
| 9 | #include <Base.h>\r | |
| 10 | #include <Library/SmbusLib.h>\r | |
| 11 | #include <Library/DebugLib.h>\r | |
| 12 | \r | |
| 13 | /**\r | |
| 14 | Executes an SMBUS quick read command.\r | |
| 15 | \r | |
| 16 | Executes an SMBUS quick read command on the SMBUS device specified by SmBusAddress.\r | |
| 17 | Only the SMBUS slave address field of SmBusAddress is required.\r | |
| 18 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 19 | If PEC is set in SmBusAddress, then ASSERT().\r | |
| 20 | If Command in SmBusAddress is not zero, then ASSERT().\r | |
| 21 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 22 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 23 | \r | |
| 24 | @param SmBusAddress Address that encodes the SMBUS Slave Address,\r | |
| 25 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
| 26 | @param Status Return status for the executed command.\r | |
| 27 | This is an optional parameter and may be NULL.\r | |
| 28 | RETURN_SUCCESS The SMBUS command was executed.\r | |
| 29 | RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r | |
| 30 | RETURN_DEVICE_ERROR The request was not completed because a failure\r | |
| 31 | reflected in the Host Status Register bit. Device errors are a result\r | |
| 32 | of a transaction collision, illegal command field, unclaimed cycle\r | |
| 33 | (host initiated), or bus errors (collisions).\r | |
| 34 | RETURN_UNSUPPORTED The SMBus operation is not supported.\r | |
| 35 | \r | |
| 36 | **/\r | |
| 37 | VOID\r | |
| 38 | EFIAPI\r | |
| 39 | SmBusQuickRead (\r | |
| 2f88bd3a MK |
40 | IN UINTN SmBusAddress,\r |
| 41 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| c48abbed SQ |
42 | )\r |
| 43 | {\r | |
| 44 | ASSERT (!SMBUS_LIB_PEC (SmBusAddress));\r | |
| 45 | ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);\r | |
| 46 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 47 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r | |
| 48 | if (Status != NULL) {\r | |
| 49 | *Status = RETURN_UNSUPPORTED;\r | |
| 50 | }\r | |
| 51 | }\r | |
| 52 | \r | |
| 53 | /**\r | |
| 54 | Executes an SMBUS quick write command.\r | |
| 55 | \r | |
| 56 | Executes an SMBUS quick write command on the SMBUS device specified by SmBusAddress.\r | |
| 57 | Only the SMBUS slave address field of SmBusAddress is required.\r | |
| 58 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 59 | If PEC is set in SmBusAddress, then ASSERT().\r | |
| 60 | If Command in SmBusAddress is not zero, then ASSERT().\r | |
| 61 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 62 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 63 | \r | |
| 64 | @param SmBusAddress Address that encodes the SMBUS Slave Address,\r | |
| 65 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
| 66 | @param Status Return status for the executed command.\r | |
| 67 | This is an optional parameter and may be NULL.\r | |
| 68 | RETURN_SUCCESS The SMBUS command was executed.\r | |
| 69 | RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r | |
| 70 | RETURN_DEVICE_ERROR The request was not completed because a failure\r | |
| 71 | reflected in the Host Status Register bit. Device errors are a result\r | |
| 72 | of a transaction collision, illegal command field, unclaimed cycle\r | |
| 73 | (host initiated), or bus errors (collisions).\r | |
| 74 | RETURN_UNSUPPORTED The SMBus operation is not supported.\r | |
| 75 | \r | |
| 76 | **/\r | |
| 77 | VOID\r | |
| 78 | EFIAPI\r | |
| 79 | SmBusQuickWrite (\r | |
| 2f88bd3a MK |
80 | IN UINTN SmBusAddress,\r |
| 81 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| c48abbed SQ |
82 | )\r |
| 83 | {\r | |
| 84 | ASSERT (!SMBUS_LIB_PEC (SmBusAddress));\r | |
| 85 | ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);\r | |
| 86 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 87 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r | |
| 88 | if (Status != NULL) {\r | |
| 89 | *Status = RETURN_UNSUPPORTED;\r | |
| 90 | }\r | |
| 91 | }\r | |
| 92 | \r | |
| 93 | /**\r | |
| 94 | Executes an SMBUS receive byte command.\r | |
| 95 | \r | |
| 96 | Executes an SMBUS receive byte command on the SMBUS device specified by SmBusAddress.\r | |
| 97 | Only the SMBUS slave address field of SmBusAddress is required.\r | |
| 98 | The byte received from the SMBUS is returned.\r | |
| 99 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 100 | If Command in SmBusAddress is not zero, then ASSERT().\r | |
| 101 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 102 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 103 | \r | |
| 104 | @param SmBusAddress Address that encodes the SMBUS Slave Address,\r | |
| 105 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
| 106 | @param Status Return status for the executed command.\r | |
| 107 | This is an optional parameter and may be NULL.\r | |
| 108 | RETURN_SUCCESS The SMBUS command was executed.\r | |
| 109 | RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r | |
| 110 | RETURN_DEVICE_ERROR The request was not completed because a failure\r | |
| 111 | reflected in the Host Status Register bit. Device errors are a result\r | |
| 112 | of a transaction collision, illegal command field, unclaimed cycle\r | |
| 113 | (host initiated), or bus errors (collisions).\r | |
| 114 | RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect)\r | |
| 115 | RETURN_UNSUPPORTED The SMBus operation is not supported.\r | |
| 116 | \r | |
| 117 | @return The byte received from the SMBUS.\r | |
| 118 | \r | |
| 119 | **/\r | |
| 120 | UINT8\r | |
| 121 | EFIAPI\r | |
| 122 | SmBusReceiveByte (\r | |
| 123 | IN UINTN SmBusAddress,\r | |
| 124 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 125 | )\r | |
| 126 | {\r | |
| 127 | ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);\r | |
| 128 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 129 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r | |
| 130 | if (Status != NULL) {\r | |
| 131 | *Status = RETURN_UNSUPPORTED;\r | |
| 132 | }\r | |
| 2f88bd3a | 133 | \r |
| c48abbed SQ |
134 | return 0;\r |
| 135 | }\r | |
| 136 | \r | |
| 137 | /**\r | |
| 138 | Executes an SMBUS send byte command.\r | |
| 139 | \r | |
| 140 | Executes an SMBUS send byte command on the SMBUS device specified by SmBusAddress.\r | |
| 141 | The byte specified by Value is sent.\r | |
| 142 | Only the SMBUS slave address field of SmBusAddress is required. Value is returned.\r | |
| 143 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 144 | If Command in SmBusAddress is not zero, then ASSERT().\r | |
| 145 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 146 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 147 | \r | |
| 148 | @param SmBusAddress Address that encodes the SMBUS Slave Address,\r | |
| 149 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
| 150 | @param Value The 8-bit value to send.\r | |
| 151 | @param Status Return status for the executed command.\r | |
| 152 | This is an optional parameter and may be NULL.\r | |
| 153 | RETURN_SUCCESS The SMBUS command was executed.\r | |
| 154 | RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r | |
| 155 | RETURN_DEVICE_ERROR The request was not completed because a failure\r | |
| 156 | reflected in the Host Status Register bit. Device errors are a result\r | |
| 157 | of a transaction collision, illegal command field, unclaimed cycle\r | |
| 158 | (host initiated), or bus errors (collisions).\r | |
| 159 | RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect)\r | |
| 160 | RETURN_UNSUPPORTED The SMBus operation is not supported.\r | |
| 161 | \r | |
| 162 | @return The parameter of Value.\r | |
| 163 | \r | |
| 164 | **/\r | |
| 165 | UINT8\r | |
| 166 | EFIAPI\r | |
| 167 | SmBusSendByte (\r | |
| 168 | IN UINTN SmBusAddress,\r | |
| 169 | IN UINT8 Value,\r | |
| 170 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 171 | )\r | |
| 172 | {\r | |
| 173 | ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);\r | |
| 174 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 175 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r | |
| 176 | if (Status != NULL) {\r | |
| 177 | *Status = RETURN_UNSUPPORTED;\r | |
| 178 | }\r | |
| 2f88bd3a | 179 | \r |
| c48abbed SQ |
180 | return 0;\r |
| 181 | }\r | |
| 182 | \r | |
| 183 | /**\r | |
| 184 | Executes an SMBUS read data byte command.\r | |
| 185 | \r | |
| 186 | Executes an SMBUS read data byte command on the SMBUS device specified by SmBusAddress.\r | |
| 187 | Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r | |
| 188 | The 8-bit value read from the SMBUS is returned.\r | |
| 189 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 190 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 191 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 192 | \r | |
| 193 | @param SmBusAddress Address that encodes the SMBUS Slave Address,\r | |
| 194 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
| 195 | @param Status Return status for the executed command.\r | |
| 196 | This is an optional parameter and may be NULL.\r | |
| 197 | RETURN_SUCCESS The SMBUS command was executed.\r | |
| 198 | RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r | |
| 199 | RETURN_DEVICE_ERROR The request was not completed because a failure\r | |
| 200 | reflected in the Host Status Register bit. Device errors are a result\r | |
| 201 | of a transaction collision, illegal command field, unclaimed cycle\r | |
| 202 | (host initiated), or bus errors (collisions).\r | |
| 203 | RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect)\r | |
| 204 | RETURN_UNSUPPORTED The SMBus operation is not supported.\r | |
| 205 | \r | |
| 206 | @return The byte read from the SMBUS.\r | |
| 207 | \r | |
| 208 | **/\r | |
| 209 | UINT8\r | |
| 210 | EFIAPI\r | |
| 211 | SmBusReadDataByte (\r | |
| 212 | IN UINTN SmBusAddress,\r | |
| 213 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 214 | )\r | |
| 215 | {\r | |
| 216 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 217 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r | |
| 218 | if (Status != NULL) {\r | |
| 219 | *Status = RETURN_UNSUPPORTED;\r | |
| 220 | }\r | |
| 2f88bd3a | 221 | \r |
| c48abbed SQ |
222 | return 0;\r |
| 223 | }\r | |
| 224 | \r | |
| 225 | /**\r | |
| 226 | Executes an SMBUS write data byte command.\r | |
| 227 | \r | |
| 228 | Executes an SMBUS write data byte command on the SMBUS device specified by SmBusAddress.\r | |
| 229 | The 8-bit value specified by Value is written.\r | |
| 230 | Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r | |
| 231 | Value is returned.\r | |
| 232 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 233 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 234 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 235 | \r | |
| 236 | @param SmBusAddress Address that encodes the SMBUS Slave Address,\r | |
| 237 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
| 238 | @param Value The 8-bit value to write.\r | |
| 239 | @param Status Return status for the executed command.\r | |
| 240 | This is an optional parameter and may be NULL.\r | |
| 241 | RETURN_SUCCESS The SMBUS command was executed.\r | |
| 242 | RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r | |
| 243 | RETURN_DEVICE_ERROR The request was not completed because a failure\r | |
| 244 | reflected in the Host Status Register bit. Device errors are a result\r | |
| 245 | of a transaction collision, illegal command field, unclaimed cycle\r | |
| 246 | (host initiated), or bus errors (collisions).\r | |
| 247 | RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect)\r | |
| 248 | RETURN_UNSUPPORTED The SMBus operation is not supported.\r | |
| 249 | \r | |
| 250 | @return The parameter of Value.\r | |
| 251 | \r | |
| 252 | **/\r | |
| 253 | UINT8\r | |
| 254 | EFIAPI\r | |
| 255 | SmBusWriteDataByte (\r | |
| 256 | IN UINTN SmBusAddress,\r | |
| 257 | IN UINT8 Value,\r | |
| 258 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 259 | )\r | |
| 260 | {\r | |
| 261 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 262 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r | |
| 263 | if (Status != NULL) {\r | |
| 264 | *Status = RETURN_UNSUPPORTED;\r | |
| 265 | }\r | |
| 2f88bd3a | 266 | \r |
| c48abbed SQ |
267 | return 0;\r |
| 268 | }\r | |
| 269 | \r | |
| 270 | /**\r | |
| 271 | Executes an SMBUS read data word command.\r | |
| 272 | \r | |
| 273 | Executes an SMBUS read data word command on the SMBUS device specified by SmBusAddress.\r | |
| 274 | Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r | |
| 275 | The 16-bit value read from the SMBUS is returned.\r | |
| 276 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 277 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 278 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 9095d37b | 279 | \r |
| c48abbed SQ |
280 | @param SmBusAddress Address that encodes the SMBUS Slave Address,\r |
| 281 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
| 282 | @param Status Return status for the executed command.\r | |
| 283 | This is an optional parameter and may be NULL.\r | |
| 284 | RETURN_SUCCESS The SMBUS command was executed.\r | |
| 285 | RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r | |
| 286 | RETURN_DEVICE_ERROR The request was not completed because a failure\r | |
| 287 | reflected in the Host Status Register bit. Device errors are a result\r | |
| 288 | of a transaction collision, illegal command field, unclaimed cycle\r | |
| 289 | (host initiated), or bus errors (collisions).\r | |
| 290 | RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect)\r | |
| 291 | RETURN_UNSUPPORTED The SMBus operation is not supported.\r | |
| 292 | \r | |
| 293 | @return The byte read from the SMBUS.\r | |
| 294 | \r | |
| 295 | **/\r | |
| 296 | UINT16\r | |
| 297 | EFIAPI\r | |
| 298 | SmBusReadDataWord (\r | |
| 299 | IN UINTN SmBusAddress,\r | |
| 300 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 301 | )\r | |
| 302 | {\r | |
| 303 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 304 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r | |
| 305 | if (Status != NULL) {\r | |
| 306 | *Status = RETURN_UNSUPPORTED;\r | |
| 307 | }\r | |
| 2f88bd3a | 308 | \r |
| c48abbed SQ |
309 | return 0;\r |
| 310 | }\r | |
| 311 | \r | |
| 312 | /**\r | |
| 313 | Executes an SMBUS write data word command.\r | |
| 314 | \r | |
| 315 | Executes an SMBUS write data word command on the SMBUS device specified by SmBusAddress.\r | |
| 316 | The 16-bit value specified by Value is written.\r | |
| 317 | Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r | |
| 318 | Value is returned.\r | |
| 319 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 320 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 321 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 322 | \r | |
| 323 | @param SmBusAddress Address that encodes the SMBUS Slave Address,\r | |
| 324 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
| 325 | @param Value The 16-bit value to write.\r | |
| 326 | @param Status Return status for the executed command.\r | |
| 327 | This is an optional parameter and may be NULL.\r | |
| 328 | RETURN_SUCCESS The SMBUS command was executed.\r | |
| 329 | RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r | |
| 330 | RETURN_DEVICE_ERROR The request was not completed because a failure\r | |
| 331 | reflected in the Host Status Register bit. Device errors are a result\r | |
| 332 | of a transaction collision, illegal command field, unclaimed cycle\r | |
| 333 | (host initiated), or bus errors (collisions).\r | |
| 334 | RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect)\r | |
| 335 | RETURN_UNSUPPORTED The SMBus operation is not supported.\r | |
| 336 | \r | |
| 337 | @return The parameter of Value.\r | |
| 338 | \r | |
| 339 | **/\r | |
| 340 | UINT16\r | |
| 341 | EFIAPI\r | |
| 342 | SmBusWriteDataWord (\r | |
| 343 | IN UINTN SmBusAddress,\r | |
| 344 | IN UINT16 Value,\r | |
| 345 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 346 | )\r | |
| 347 | {\r | |
| 348 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 349 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r | |
| 350 | if (Status != NULL) {\r | |
| 351 | *Status = RETURN_UNSUPPORTED;\r | |
| 352 | }\r | |
| 2f88bd3a | 353 | \r |
| c48abbed SQ |
354 | return 0;\r |
| 355 | }\r | |
| 356 | \r | |
| 357 | /**\r | |
| 358 | Executes an SMBUS process call command.\r | |
| 359 | \r | |
| 360 | Executes an SMBUS process call command on the SMBUS device specified by SmBusAddress.\r | |
| 361 | The 16-bit value specified by Value is written.\r | |
| 362 | Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r | |
| 363 | The 16-bit value returned by the process call command is returned.\r | |
| 364 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 365 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 366 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 367 | \r | |
| 368 | @param SmBusAddress Address that encodes the SMBUS Slave Address,\r | |
| 369 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
| 370 | @param Value The 16-bit value to write.\r | |
| 371 | @param Status Return status for the executed command.\r | |
| 372 | This is an optional parameter and may be NULL.\r | |
| 373 | RETURN_SUCCESS The SMBUS command was executed.\r | |
| 374 | RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r | |
| 375 | RETURN_DEVICE_ERROR The request was not completed because a failure\r | |
| 376 | reflected in the Host Status Register bit. Device errors are a result\r | |
| 377 | of a transaction collision, illegal command field, unclaimed cycle\r | |
| 378 | (host initiated), or bus errors (collisions).\r | |
| 379 | RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect)\r | |
| 380 | RETURN_UNSUPPORTED The SMBus operation is not supported.\r | |
| 381 | \r | |
| 382 | @return The 16-bit value returned by the process call command.\r | |
| 383 | \r | |
| 384 | **/\r | |
| 385 | UINT16\r | |
| 386 | EFIAPI\r | |
| 387 | SmBusProcessCall (\r | |
| 388 | IN UINTN SmBusAddress,\r | |
| 389 | IN UINT16 Value,\r | |
| 390 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 391 | )\r | |
| 392 | {\r | |
| 393 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 394 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r | |
| 395 | if (Status != NULL) {\r | |
| 396 | *Status = RETURN_UNSUPPORTED;\r | |
| 397 | }\r | |
| 2f88bd3a | 398 | \r |
| c48abbed SQ |
399 | return 0;\r |
| 400 | }\r | |
| 401 | \r | |
| 402 | /**\r | |
| 403 | Executes an SMBUS read block command.\r | |
| 404 | \r | |
| 405 | Executes an SMBUS read block command on the SMBUS device specified by SmBusAddress.\r | |
| 406 | Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r | |
| 407 | Bytes are read from the SMBUS and stored in Buffer.\r | |
| 408 | The number of bytes read is returned, and will never return a value larger than 32-bytes.\r | |
| 409 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 410 | It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.\r | |
| 411 | SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.\r | |
| 412 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 413 | If Buffer is NULL, then ASSERT().\r | |
| 414 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 415 | \r | |
| 416 | @param SmBusAddress Address that encodes the SMBUS Slave Address,\r | |
| 417 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
| 418 | @param Buffer Pointer to the buffer to store the bytes read from the SMBUS.\r | |
| 419 | @param Status Return status for the executed command.\r | |
| 420 | This is an optional parameter and may be NULL.\r | |
| 421 | RETURN_SUCCESS The SMBUS command was executed.\r | |
| 422 | RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r | |
| 423 | RETURN_DEVICE_ERROR The request was not completed because a failure\r | |
| 424 | reflected in the Host Status Register bit. Device errors are a result\r | |
| 425 | of a transaction collision, illegal command field, unclaimed cycle\r | |
| 426 | (host initiated), or bus errors (collisions).\r | |
| 427 | RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect)\r | |
| 428 | RETURN_UNSUPPORTED The SMBus operation is not supported.\r | |
| 429 | \r | |
| 430 | @return The number of bytes read.\r | |
| 431 | \r | |
| 432 | **/\r | |
| 433 | UINTN\r | |
| 434 | EFIAPI\r | |
| 435 | SmBusReadBlock (\r | |
| 436 | IN UINTN SmBusAddress,\r | |
| 437 | OUT VOID *Buffer,\r | |
| 438 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 439 | )\r | |
| 440 | {\r | |
| 441 | ASSERT (Buffer != NULL);\r | |
| 442 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 443 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r | |
| 444 | if (Status != NULL) {\r | |
| 445 | *Status = RETURN_UNSUPPORTED;\r | |
| 446 | }\r | |
| 2f88bd3a | 447 | \r |
| c48abbed SQ |
448 | return 0;\r |
| 449 | }\r | |
| 450 | \r | |
| 451 | /**\r | |
| 452 | Executes an SMBUS write block command.\r | |
| 453 | \r | |
| 454 | Executes an SMBUS write block command on the SMBUS device specified by SmBusAddress.\r | |
| 455 | The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.\r | |
| 456 | Bytes are written to the SMBUS from Buffer.\r | |
| 457 | The number of bytes written is returned, and will never return a value larger than 32-bytes.\r | |
| 9095d37b | 458 | If Status is not NULL, then the status of the executed command is returned in Status.\r |
| c48abbed SQ |
459 | If Length in SmBusAddress is zero or greater than 32, then ASSERT().\r |
| 460 | If Buffer is NULL, then ASSERT().\r | |
| 461 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 462 | \r | |
| 463 | @param SmBusAddress Address that encodes the SMBUS Slave Address,\r | |
| 464 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
| 465 | @param Buffer Pointer to the buffer to store the bytes read from the SMBUS.\r | |
| 466 | @param Status Return status for the executed command.\r | |
| 467 | This is an optional parameter and may be NULL.\r | |
| 468 | RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r | |
| 469 | RETURN_DEVICE_ERROR The request was not completed because a failure\r | |
| 470 | reflected in the Host Status Register bit. Device errors are a result\r | |
| 471 | of a transaction collision, illegal command field, unclaimed cycle\r | |
| 472 | (host initiated), or bus errors (collisions).\r | |
| 473 | RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect)\r | |
| 474 | RETURN_UNSUPPORTED The SMBus operation is not supported.\r | |
| 475 | \r | |
| 476 | @return The number of bytes written.\r | |
| 477 | \r | |
| 478 | **/\r | |
| 479 | UINTN\r | |
| 480 | EFIAPI\r | |
| 481 | SmBusWriteBlock (\r | |
| 482 | IN UINTN SmBusAddress,\r | |
| 483 | OUT VOID *Buffer,\r | |
| 484 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 485 | )\r | |
| 486 | {\r | |
| 487 | ASSERT (Buffer != NULL);\r | |
| 488 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) >= 1);\r | |
| 489 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) <= 32);\r | |
| 490 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r | |
| 491 | if (Status != NULL) {\r | |
| 492 | *Status = RETURN_UNSUPPORTED;\r | |
| 493 | }\r | |
| 2f88bd3a | 494 | \r |
| c48abbed SQ |
495 | return 0;\r |
| 496 | }\r | |
| 497 | \r | |
| 498 | /**\r | |
| 499 | Executes an SMBUS block process call command.\r | |
| 500 | \r | |
| 501 | Executes an SMBUS block process call command on the SMBUS device specified by SmBusAddress.\r | |
| 502 | The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.\r | |
| 503 | Bytes are written to the SMBUS from WriteBuffer. Bytes are then read from the SMBUS into ReadBuffer.\r | |
| 504 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 505 | It is the caller's responsibility to make sure ReadBuffer is large enough for the total number of bytes read.\r | |
| 506 | SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.\r | |
| 507 | If Length in SmBusAddress is zero or greater than 32, then ASSERT().\r | |
| 508 | If WriteBuffer is NULL, then ASSERT().\r | |
| 509 | If ReadBuffer is NULL, then ASSERT().\r | |
| 510 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 511 | \r | |
| 512 | @param SmBusAddress Address that encodes the SMBUS Slave Address,\r | |
| 513 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
| 514 | @param WriteBuffer Pointer to the buffer of bytes to write to the SMBUS.\r | |
| 515 | @param ReadBuffer Pointer to the buffer of bytes to read from the SMBUS.\r | |
| 516 | @param Status Return status for the executed command.\r | |
| 517 | This is an optional parameter and may be NULL.\r | |
| 518 | RETURN_TIMEOUT A timeout occurred while executing the SMBUS command.\r | |
| 519 | RETURN_DEVICE_ERROR The request was not completed because a failure\r | |
| 520 | reflected in the Host Status Register bit. Device errors are a result\r | |
| 521 | of a transaction collision, illegal command field, unclaimed cycle\r | |
| 522 | (host initiated), or bus errors (collisions).\r | |
| 523 | RETURN_CRC_ERROR The checksum is not correct (PEC is incorrect)\r | |
| 524 | RETURN_UNSUPPORTED The SMBus operation is not supported.\r | |
| 525 | \r | |
| 526 | @return The number of bytes written.\r | |
| 527 | \r | |
| 528 | **/\r | |
| 529 | UINTN\r | |
| 530 | EFIAPI\r | |
| 531 | SmBusBlockProcessCall (\r | |
| 532 | IN UINTN SmBusAddress,\r | |
| 533 | IN VOID *WriteBuffer,\r | |
| 534 | OUT VOID *ReadBuffer,\r | |
| 535 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 536 | )\r | |
| 537 | {\r | |
| 538 | ASSERT (WriteBuffer != NULL);\r | |
| 539 | ASSERT (ReadBuffer != NULL);\r | |
| 540 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) >= 1);\r | |
| 541 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) <= 32);\r | |
| 542 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r | |
| 543 | if (Status != NULL) {\r | |
| 544 | *Status = RETURN_UNSUPPORTED;\r | |
| 545 | }\r | |
| 2f88bd3a | 546 | \r |
| c48abbed SQ |
547 | return 0;\r |
| 548 | }\r |