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add EFIAPI for those constructor funcitons declaration
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878ddf1f 1/** @file\r
2 I/O Library.\r
3\r
4 Copyright (c) 2006, Intel Corporation<BR>\r
5 All rights reserved. This program and the accompanying materials\r
6 are licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
9\r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13 Module Name: IoLib.c\r
14\r
15**/\r
16\r
19b362e8 17//\r
18// Globle varible to cache pointer to CpuIo protocol.\r
19//\r
20STATIC EFI_CPU_IO_PROTOCOL *mCpuIo = NULL;\r
878ddf1f 21\r
19b362e8 22/**\r
23 The constructor function caches the pointer to CpuIo protocol.\r
a8e756da 24\r
19b362e8 25 The constructor function locates CpuIo protocol from protocol database.\r
a8e756da 26 It will ASSERT() if that operation fails and it will always return EFI_SUCCESS.\r
19b362e8 27\r
28 @param ImageHandle The firmware allocated handle for the EFI image.\r
29 @param SystemTable A pointer to the EFI System Table.\r
a8e756da 30\r
19b362e8 31 @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.\r
32\r
33**/\r
878ddf1f 34EFI_STATUS\r
a8e756da 35EFIAPI\r
878ddf1f 36IoLibConstructor (\r
37 IN EFI_HANDLE ImageHandle,\r
38 IN EFI_SYSTEM_TABLE *SystemTable\r
39 )\r
40{\r
41 EFI_STATUS Status;\r
42\r
19b362e8 43 Status = gBS->LocateProtocol (&gEfiCpuIoProtocolGuid, NULL, (VOID**) &mCpuIo);\r
878ddf1f 44 ASSERT_EFI_ERROR (Status);\r
19b362e8 45\r
878ddf1f 46 return Status;\r
47}\r
48\r
19b362e8 49/**\r
50 Reads registers in the EFI CPU I/O space.\r
51\r
52 Reads the I/O port specified by Port with registers width specified by Width.\r
53 The read value is returned. If such operations are not supported, then ASSERT().\r
54 This function must guarantee that all I/O read and write operations are serialized.\r
55\r
56 @param Port The base address of the I/O operation.\r
a8e756da 57 The caller is responsible for aligning the Address if required.\r
19b362e8 58 @param Width The width of the I/O operation.\r
a8e756da 59\r
19b362e8 60 @return Data read from registers in the EFI CPU I/O space.\r
61\r
62**/\r
878ddf1f 63UINT64\r
64EFIAPI\r
65IoReadWorker (\r
66 IN UINTN Port,\r
67 IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r
68 )\r
69{\r
19b362e8 70 EFI_STATUS Status;\r
878ddf1f 71 UINT64 Data;\r
72\r
19b362e8 73 Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);\r
74 ASSERT_EFI_ERROR (Status);\r
75\r
878ddf1f 76 return Data;\r
77}\r
78\r
19b362e8 79/**\r
80 Writes registers in the EFI CPU I/O space.\r
81\r
82 Writes the I/O port specified by Port with registers width and value specified by Width\r
83 and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r
84 This function must guarantee that all I/O read and write operations are serialized.\r
85\r
86 @param Port The base address of the I/O operation.\r
a8e756da 87 The caller is responsible for aligning the Address if required.\r
19b362e8 88 @param Width The width of the I/O operation.\r
89 @param Data The value to write to the I/O port.\r
a8e756da 90\r
19b362e8 91 @return The paramter of Data.\r
92\r
93**/\r
878ddf1f 94UINT64\r
95EFIAPI\r
96IoWriteWorker (\r
97 IN UINTN Port,\r
98 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
99 IN UINT64 Data\r
100 )\r
101{\r
19b362e8 102 EFI_STATUS Status;\r
103\r
104 Status = mCpuIo->Io.Write (mCpuIo, Width, Port, 1, &Data);\r
105 ASSERT_EFI_ERROR (Status);\r
106\r
878ddf1f 107 return Data;\r
108}\r
109\r
19b362e8 110/**\r
a8e756da 111 Reads memory-mapped registers in the EFI system memory space.\r
19b362e8 112\r
113 Reads the MMIO registers specified by Address with registers width specified by Width.\r
114 The read value is returned. If such operations are not supported, then ASSERT().\r
115 This function must guarantee that all MMIO read and write operations are serialized.\r
116\r
117 @param Address The MMIO register to read.\r
a8e756da 118 The caller is responsible for aligning the Address if required.\r
19b362e8 119 @param Width The width of the I/O operation.\r
a8e756da 120\r
19b362e8 121 @return Data read from registers in the EFI system memory space.\r
122\r
123**/\r
878ddf1f 124UINT64\r
125EFIAPI\r
126MmioReadWorker (\r
127 IN UINTN Address,\r
128 IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r
129 )\r
130{\r
19b362e8 131 EFI_STATUS Status;\r
878ddf1f 132 UINT64 Data;\r
133\r
19b362e8 134 Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data);\r
135 ASSERT_EFI_ERROR (Status);\r
136\r
878ddf1f 137 return Data;\r
138}\r
139\r
19b362e8 140/**\r
a8e756da 141 Writes memory-mapped registers in the EFI system memory space.\r
19b362e8 142\r
143 Writes the MMIO registers specified by Address with registers width and value specified by Width\r
144 and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r
145 This function must guarantee that all MMIO read and write operations are serialized.\r
146\r
147 @param Address The MMIO register to read.\r
a8e756da 148 The caller is responsible for aligning the Address if required.\r
19b362e8 149 @param Width The width of the I/O operation.\r
a8e756da 150\r
19b362e8 151 @return Data read from registers in the EFI system memory space.\r
152\r
153**/\r
878ddf1f 154UINT64\r
155EFIAPI\r
156MmioWriteWorker (\r
157 IN UINTN Address,\r
158 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
159 IN UINT64 Data\r
160 )\r
161{\r
19b362e8 162 EFI_STATUS Status;\r
163\r
164 Status = mCpuIo->Mem.Write (mCpuIo, Width, Address, 1, &Data);\r
165 ASSERT_EFI_ERROR (Status);\r
166\r
878ddf1f 167 return Data;\r
168}\r
169\r
170/**\r
171 Reads an 8-bit I/O port.\r
172\r
173 Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.\r
174 This function must guarantee that all I/O read and write operations are\r
175 serialized.\r
176\r
177 If 8-bit I/O port operations are not supported, then ASSERT().\r
178\r
179 @param Port The I/O port to read.\r
180\r
181 @return The value read.\r
182\r
183**/\r
184UINT8\r
185EFIAPI\r
186IoRead8 (\r
187 IN UINTN Port\r
188 )\r
189{\r
190 return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8);\r
191}\r
192\r
193/**\r
194 Writes an 8-bit I/O port.\r
195\r
196 Writes the 8-bit I/O port specified by Port with the value specified by Value\r
197 and returns Value. This function must guarantee that all I/O read and write\r
198 operations are serialized.\r
199\r
200 If 8-bit I/O port operations are not supported, then ASSERT().\r
201\r
202 @param Port The I/O port to write.\r
203 @param Value The value to write to the I/O port.\r
204\r
205 @return The value written the I/O port.\r
206\r
207**/\r
208UINT8\r
209EFIAPI\r
210IoWrite8 (\r
211 IN UINTN Port,\r
212 IN UINT8 Value\r
213 )\r
214{\r
215 return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value);\r
216}\r
217\r
218/**\r
219 Reads a 16-bit I/O port.\r
220\r
221 Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.\r
222 This function must guarantee that all I/O read and write operations are\r
223 serialized.\r
224\r
225 If 16-bit I/O port operations are not supported, then ASSERT().\r
226\r
227 @param Port The I/O port to read.\r
228\r
229 @return The value read.\r
230\r
231**/\r
232UINT16\r
233EFIAPI\r
234IoRead16 (\r
235 IN UINTN Port\r
236 )\r
237{\r
19b362e8 238 //\r
239 // Make sure Port is aligned on a 16-bit boundary.\r
240 //\r
241 ASSERT ((Port & 1) == 0);\r
878ddf1f 242 return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);\r
243}\r
244\r
245/**\r
246 Writes a 16-bit I/O port.\r
247\r
248 Writes the 16-bit I/O port specified by Port with the value specified by Value\r
249 and returns Value. This function must guarantee that all I/O read and write\r
250 operations are serialized.\r
251\r
252 If 16-bit I/O port operations are not supported, then ASSERT().\r
253\r
254 @param Port The I/O port to write.\r
255 @param Value The value to write to the I/O port.\r
256\r
257 @return The value written the I/O port.\r
258\r
259**/\r
260UINT16\r
261EFIAPI\r
262IoWrite16 (\r
263 IN UINTN Port,\r
264 IN UINT16 Value\r
265 )\r
266{\r
19b362e8 267 //\r
268 // Make sure Port is aligned on a 16-bit boundary.\r
269 //\r
270 ASSERT ((Port & 1) == 0);\r
878ddf1f 271 return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);\r
272}\r
273\r
274/**\r
275 Reads a 32-bit I/O port.\r
276\r
277 Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r
278 This function must guarantee that all I/O read and write operations are\r
279 serialized.\r
280\r
281 If 32-bit I/O port operations are not supported, then ASSERT().\r
282\r
283 @param Port The I/O port to read.\r
284\r
285 @return The value read.\r
286\r
287**/\r
288UINT32\r
289EFIAPI\r
290IoRead32 (\r
291 IN UINTN Port\r
292 )\r
293{\r
19b362e8 294 //\r
295 // Make sure Port is aligned on a 32-bit boundary.\r
296 //\r
297 ASSERT ((Port & 3) == 0);\r
878ddf1f 298 return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);\r
299}\r
300\r
301/**\r
302 Writes a 32-bit I/O port.\r
303\r
304 Writes the 32-bit I/O port specified by Port with the value specified by Value\r
305 and returns Value. This function must guarantee that all I/O read and write\r
306 operations are serialized.\r
307\r
308 If 32-bit I/O port operations are not supported, then ASSERT().\r
309\r
310 @param Port The I/O port to write.\r
311 @param Value The value to write to the I/O port.\r
312\r
313 @return The value written the I/O port.\r
314\r
315**/\r
316UINT32\r
317EFIAPI\r
318IoWrite32 (\r
319 IN UINTN Port,\r
320 IN UINT32 Value\r
321 )\r
322{\r
19b362e8 323 //\r
324 // Make sure Port is aligned on a 32-bit boundary.\r
325 //\r
326 ASSERT ((Port & 3) == 0);\r
878ddf1f 327 return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);\r
328}\r
329\r
330/**\r
331 Reads a 64-bit I/O port.\r
332\r
333 Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.\r
334 This function must guarantee that all I/O read and write operations are\r
335 serialized.\r
336\r
337 If 64-bit I/O port operations are not supported, then ASSERT().\r
338\r
339 @param Port The I/O port to read.\r
340\r
341 @return The value read.\r
342\r
343**/\r
344UINT64\r
345EFIAPI\r
346IoRead64 (\r
347 IN UINTN Port\r
348 )\r
349{\r
19b362e8 350 //\r
351 // Make sure Port is aligned on a 64-bit boundary.\r
352 //\r
353 ASSERT ((Port & 7) == 0);\r
878ddf1f 354 return IoReadWorker (Port, EfiCpuIoWidthUint64);\r
355}\r
356\r
357/**\r
358 Writes a 64-bit I/O port.\r
359\r
360 Writes the 64-bit I/O port specified by Port with the value specified by Value\r
361 and returns Value. This function must guarantee that all I/O read and write\r
362 operations are serialized.\r
363\r
364 If 64-bit I/O port operations are not supported, then ASSERT().\r
365\r
366 @param Port The I/O port to write.\r
367 @param Value The value to write to the I/O port.\r
368\r
369 @return The value written the I/O port.\r
370\r
371**/\r
372UINT64\r
373EFIAPI\r
374IoWrite64 (\r
375 IN UINTN Port,\r
376 IN UINT64 Value\r
377 )\r
378{\r
19b362e8 379 //\r
380 // Make sure Port is aligned on a 64-bit boundary.\r
381 //\r
382 ASSERT ((Port & 7) == 0);\r
878ddf1f 383 return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);\r
384}\r
385\r
386/**\r
387 Reads an 8-bit MMIO register.\r
388\r
389 Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r
390 returned. This function must guarantee that all MMIO read and write\r
391 operations are serialized.\r
392\r
393 If 8-bit MMIO register operations are not supported, then ASSERT().\r
394\r
395 @param Address The MMIO register to read.\r
396\r
397 @return The value read.\r
398\r
399**/\r
400UINT8\r
401EFIAPI\r
402MmioRead8 (\r
403 IN UINTN Address\r
404 )\r
405{\r
406 return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8);\r
407}\r
408\r
409/**\r
410 Writes an 8-bit MMIO register.\r
411\r
412 Writes the 8-bit MMIO register specified by Address with the value specified\r
413 by Value and returns Value. This function must guarantee that all MMIO read\r
414 and write operations are serialized.\r
415\r
416 If 8-bit MMIO register operations are not supported, then ASSERT().\r
417\r
418 @param Address The MMIO register to write.\r
419 @param Value The value to write to the MMIO register.\r
420\r
421**/\r
422UINT8\r
423EFIAPI\r
424MmioWrite8 (\r
425 IN UINTN Address,\r
426 IN UINT8 Value\r
427 )\r
428{\r
429 return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value);\r
430}\r
431\r
432/**\r
433 Reads a 16-bit MMIO register.\r
434\r
435 Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r
436 returned. This function must guarantee that all MMIO read and write\r
437 operations are serialized.\r
438\r
439 If 16-bit MMIO register operations are not supported, then ASSERT().\r
440\r
441 @param Address The MMIO register to read.\r
442\r
443 @return The value read.\r
444\r
445**/\r
446UINT16\r
447EFIAPI\r
448MmioRead16 (\r
449 IN UINTN Address\r
450 )\r
451{\r
19b362e8 452 //\r
453 // Make sure Address is aligned on a 16-bit boundary.\r
454 //\r
455 ASSERT ((Address & 1) == 0);\r
878ddf1f 456 return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);\r
457}\r
458\r
459/**\r
460 Writes a 16-bit MMIO register.\r
461\r
462 Writes the 16-bit MMIO register specified by Address with the value specified\r
463 by Value and returns Value. This function must guarantee that all MMIO read\r
464 and write operations are serialized.\r
465\r
466 If 16-bit MMIO register operations are not supported, then ASSERT().\r
467\r
468 @param Address The MMIO register to write.\r
469 @param Value The value to write to the MMIO register.\r
470\r
471**/\r
472UINT16\r
473EFIAPI\r
474MmioWrite16 (\r
475 IN UINTN Address,\r
476 IN UINT16 Value\r
477 )\r
478{\r
19b362e8 479 //\r
480 // Make sure Address is aligned on a 16-bit boundary.\r
481 //\r
482 ASSERT ((Address & 1) == 0);\r
878ddf1f 483 return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);\r
484}\r
485\r
486/**\r
487 Reads a 32-bit MMIO register.\r
488\r
489 Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r
490 returned. This function must guarantee that all MMIO read and write\r
491 operations are serialized.\r
492\r
493 If 32-bit MMIO register operations are not supported, then ASSERT().\r
494\r
495 @param Address The MMIO register to read.\r
496\r
497 @return The value read.\r
498\r
499**/\r
500UINT32\r
501EFIAPI\r
502MmioRead32 (\r
503 IN UINTN Address\r
504 )\r
505{\r
19b362e8 506 //\r
507 // Make sure Address is aligned on a 32-bit boundary.\r
508 //\r
509 ASSERT ((Address & 3) == 0);\r
878ddf1f 510 return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);\r
511}\r
512\r
513/**\r
514 Writes a 32-bit MMIO register.\r
515\r
516 Writes the 32-bit MMIO register specified by Address with the value specified\r
517 by Value and returns Value. This function must guarantee that all MMIO read\r
518 and write operations are serialized.\r
519\r
520 If 32-bit MMIO register operations are not supported, then ASSERT().\r
521\r
522 @param Address The MMIO register to write.\r
523 @param Value The value to write to the MMIO register.\r
524\r
525**/\r
526UINT32\r
527EFIAPI\r
528MmioWrite32 (\r
529 IN UINTN Address,\r
530 IN UINT32 Value\r
531 )\r
532{\r
19b362e8 533 //\r
534 // Make sure Address is aligned on a 32-bit boundary.\r
535 //\r
536 ASSERT ((Address & 3) == 0);\r
878ddf1f 537 return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);\r
538}\r
539\r
540/**\r
541 Reads a 64-bit MMIO register.\r
542\r
543 Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r
544 returned. This function must guarantee that all MMIO read and write\r
545 operations are serialized.\r
546\r
547 If 64-bit MMIO register operations are not supported, then ASSERT().\r
548\r
549 @param Address The MMIO register to read.\r
550\r
551 @return The value read.\r
552\r
553**/\r
554UINT64\r
555EFIAPI\r
556MmioRead64 (\r
557 IN UINTN Address\r
558 )\r
559{\r
19b362e8 560 //\r
561 // Make sure Address is aligned on a 64-bit boundary.\r
562 //\r
563 ASSERT ((Address & 7) == 0);\r
878ddf1f 564 return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);\r
565}\r
566\r
567/**\r
568 Writes a 64-bit MMIO register.\r
569\r
570 Writes the 64-bit MMIO register specified by Address with the value specified\r
571 by Value and returns Value. This function must guarantee that all MMIO read\r
572 and write operations are serialized.\r
573\r
574 If 64-bit MMIO register operations are not supported, then ASSERT().\r
575\r
576 @param Address The MMIO register to write.\r
577 @param Value The value to write to the MMIO register.\r
578\r
579**/\r
580UINT64\r
581EFIAPI\r
582MmioWrite64 (\r
583 IN UINTN Address,\r
584 IN UINT64 Value\r
585 )\r
586{\r
19b362e8 587 //\r
588 // Make sure Address is aligned on a 64-bit boundary.\r
589 //\r
590 ASSERT ((Address & 7) == 0);\r
878ddf1f 591 return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);\r
592}\r