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ba9f8351 | 1 | /** @file\r |
2 | Internal include file of DXE CPU IO2 Library.\r | |
9095d37b LG |
3 | \r |
4 | Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>\r | |
61e1deec LD |
5 | Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r |
6 | \r | |
9344f092 | 7 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
ba9f8351 | 8 | \r |
9 | **/\r | |
10 | \r | |
11 | #ifndef _DXE_CPUIO2_LIB_INTERNAL_H_\r | |
12 | #define _DXE_CPUIO2_LIB_INTERNAL_H_\r | |
13 | \r | |
14 | #include <PiDxe.h>\r | |
15 | \r | |
16 | #include <Protocol/CpuIo2.h>\r | |
17 | \r | |
18 | #include <Library/IoLib.h>\r | |
19 | #include <Library/UefiBootServicesTableLib.h>\r | |
20 | #include <Library/DebugLib.h>\r | |
21 | #include <Library/BaseLib.h>\r | |
22 | \r | |
ba9f8351 | 23 | /**\r |
24 | Reads registers in the EFI CPU I/O space.\r | |
25 | \r | |
26 | Reads the I/O port specified by Port with registers width specified by Width.\r | |
61e1deec LD |
27 | The read value is returned.\r |
28 | \r | |
ba9f8351 | 29 | This function must guarantee that all I/O read and write operations are serialized.\r |
61e1deec | 30 | If such operations are not supported, then ASSERT().\r |
ba9f8351 | 31 | \r |
32 | @param Port The base address of the I/O operation.\r | |
33 | The caller is responsible for aligning the Address if required.\r | |
34 | @param Width The width of the I/O operation.\r | |
35 | \r | |
36 | @return Data read from registers in the EFI CPU I/O space.\r | |
37 | \r | |
38 | **/\r | |
39 | UINT64\r | |
40 | EFIAPI\r | |
41 | IoReadWorker (\r | |
61e1deec LD |
42 | IN UINTN Port,\r |
43 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r | |
ba9f8351 | 44 | );\r |
45 | \r | |
46 | /**\r | |
47 | Writes registers in the EFI CPU I/O space.\r | |
48 | \r | |
49 | Writes the I/O port specified by Port with registers width and value specified by Width\r | |
61e1deec LD |
50 | and Data respectively. Data is returned.\r |
51 | \r | |
ba9f8351 | 52 | This function must guarantee that all I/O read and write operations are serialized.\r |
61e1deec | 53 | If such operations are not supported, then ASSERT().\r |
ba9f8351 | 54 | \r |
55 | @param Port The base address of the I/O operation.\r | |
56 | The caller is responsible for aligning the Address if required.\r | |
57 | @param Width The width of the I/O operation.\r | |
58 | @param Data The value to write to the I/O port.\r | |
59 | \r | |
00b7cc0f | 60 | @return The parameter of Data.\r |
ba9f8351 | 61 | \r |
62 | **/\r | |
63 | UINT64\r | |
64 | EFIAPI\r | |
65 | IoWriteWorker (\r | |
61e1deec LD |
66 | IN UINTN Port,\r |
67 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
68 | IN UINT64 Data\r | |
69 | );\r | |
70 | \r | |
71 | /**\r | |
72 | Reads registers in the EFI CPU I/O space.\r | |
73 | \r | |
74 | Reads the I/O port specified by Port with registers width specified by Width.\r | |
75 | The port is read Count times, and the read data is stored in the provided Buffer.\r | |
76 | \r | |
77 | This function must guarantee that all I/O read and write operations are serialized.\r | |
78 | If such operations are not supported, then ASSERT().\r | |
79 | \r | |
80 | @param Port The base address of the I/O operation.\r | |
81 | The caller is responsible for aligning the Address if required.\r | |
82 | @param Width The width of the I/O operation.\r | |
83 | @param Count The number of times to read I/O port.\r | |
84 | @param Buffer The buffer to store the read data into.\r | |
85 | \r | |
86 | **/\r | |
87 | VOID\r | |
88 | EFIAPI\r | |
89 | IoReadFifoWorker (\r | |
90 | IN UINTN Port,\r | |
91 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
92 | IN UINTN Count,\r | |
93 | IN VOID *Buffer\r | |
94 | );\r | |
95 | \r | |
96 | /**\r | |
97 | Writes registers in the EFI CPU I/O space.\r | |
98 | \r | |
99 | Writes the I/O port specified by Port with registers width specified by Width.\r | |
100 | The port is written Count times, and the write data is retrieved from the provided Buffer.\r | |
101 | \r | |
102 | This function must guarantee that all I/O read and write operations are serialized.\r | |
103 | If such operations are not supported, then ASSERT().\r | |
104 | \r | |
105 | @param Port The base address of the I/O operation.\r | |
106 | The caller is responsible for aligning the Address if required.\r | |
107 | @param Width The width of the I/O operation.\r | |
108 | @param Count The number of times to write I/O port.\r | |
109 | @param Buffer The buffer to store the read data into.\r | |
110 | \r | |
111 | **/\r | |
112 | VOID\r | |
113 | EFIAPI\r | |
114 | IoWriteFifoWorker (\r | |
115 | IN UINTN Port,\r | |
116 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
117 | IN UINTN Count,\r | |
118 | IN VOID *Buffer\r | |
ba9f8351 | 119 | );\r |
120 | \r | |
121 | /**\r | |
122 | Reads memory-mapped registers in the EFI system memory space.\r | |
123 | \r | |
124 | Reads the MMIO registers specified by Address with registers width specified by Width.\r | |
125 | The read value is returned. If such operations are not supported, then ASSERT().\r | |
126 | This function must guarantee that all MMIO read and write operations are serialized.\r | |
127 | \r | |
128 | @param Address The MMIO register to read.\r | |
129 | The caller is responsible for aligning the Address if required.\r | |
130 | @param Width The width of the I/O operation.\r | |
131 | \r | |
132 | @return Data read from registers in the EFI system memory space.\r | |
133 | \r | |
134 | **/\r | |
135 | UINT64\r | |
136 | EFIAPI\r | |
137 | MmioReadWorker (\r | |
2f88bd3a MK |
138 | IN UINTN Address,\r |
139 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r | |
ba9f8351 | 140 | );\r |
141 | \r | |
142 | /**\r | |
143 | Writes memory-mapped registers in the EFI system memory space.\r | |
144 | \r | |
145 | Writes the MMIO registers specified by Address with registers width and value specified by Width\r | |
146 | and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r | |
147 | This function must guarantee that all MMIO read and write operations are serialized.\r | |
148 | \r | |
149 | @param Address The MMIO register to read.\r | |
150 | The caller is responsible for aligning the Address if required.\r | |
151 | @param Width The width of the I/O operation.\r | |
152 | @param Data The value to write to the I/O port.\r | |
9095d37b | 153 | \r |
ba9f8351 | 154 | @return Data read from registers in the EFI system memory space.\r |
155 | \r | |
156 | **/\r | |
157 | UINT64\r | |
158 | EFIAPI\r | |
159 | MmioWriteWorker (\r | |
2f88bd3a MK |
160 | IN UINTN Address,\r |
161 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
162 | IN UINT64 Data\r | |
ba9f8351 | 163 | );\r |
164 | \r | |
165 | #endif\r |