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ba9f8351 | 1 | /** @file\r |
2 | I/O Library instance based on EFI_CPU_IO2_PROTOCOL.\r | |
9095d37b LG |
3 | \r |
4 | Copyright (c) 2010 - 2018, Intel Corporation. All rights reserved.<BR>\r | |
61e1deec LD |
5 | Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r |
6 | \r | |
9344f092 | 7 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
ba9f8351 | 8 | \r |
9 | **/\r | |
10 | \r | |
11 | #include "DxeCpuIo2LibInternal.h"\r | |
12 | \r | |
13 | //\r | |
c1d8b697 | 14 | // Global variable to cache pointer to CpuIo2 protocol.\r |
ba9f8351 | 15 | //\r |
16 | EFI_CPU_IO2_PROTOCOL *mCpuIo = NULL;\r | |
17 | \r | |
18 | /**\r | |
19 | The constructor function caches the pointer to CpuIo2 protocol.\r | |
20 | \r | |
21 | The constructor function locates CpuIo2 protocol from protocol database.\r | |
22 | It will ASSERT() if that operation fails and it will always return EFI_SUCCESS.\r | |
23 | \r | |
24 | @param ImageHandle The firmware allocated handle for the EFI image.\r | |
25 | @param SystemTable A pointer to the EFI System Table.\r | |
26 | \r | |
27 | @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.\r | |
28 | \r | |
29 | **/\r | |
30 | EFI_STATUS\r | |
31 | EFIAPI\r | |
32 | IoLibConstructor (\r | |
33 | IN EFI_HANDLE ImageHandle,\r | |
34 | IN EFI_SYSTEM_TABLE *SystemTable\r | |
35 | )\r | |
36 | {\r | |
37 | EFI_STATUS Status;\r | |
38 | \r | |
39 | Status = gBS->LocateProtocol (&gEfiCpuIo2ProtocolGuid, NULL, (VOID **) &mCpuIo);\r | |
40 | ASSERT_EFI_ERROR (Status);\r | |
41 | \r | |
42 | return Status;\r | |
43 | }\r | |
44 | \r | |
45 | /**\r | |
46 | Reads registers in the EFI CPU I/O space.\r | |
47 | \r | |
48 | Reads the I/O port specified by Port with registers width specified by Width.\r | |
61e1deec LD |
49 | The read value is returned.\r |
50 | \r | |
ba9f8351 | 51 | This function must guarantee that all I/O read and write operations are serialized.\r |
61e1deec | 52 | If such operations are not supported, then ASSERT().\r |
ba9f8351 | 53 | \r |
54 | @param Port The base address of the I/O operation.\r | |
55 | The caller is responsible for aligning the Address if required.\r | |
56 | @param Width The width of the I/O operation.\r | |
57 | \r | |
58 | @return Data read from registers in the EFI CPU I/O space.\r | |
59 | \r | |
60 | **/\r | |
61 | UINT64\r | |
62 | EFIAPI\r | |
63 | IoReadWorker (\r | |
64 | IN UINTN Port,\r | |
65 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r | |
66 | )\r | |
67 | {\r | |
61e1deec LD |
68 | EFI_STATUS Status;\r |
69 | UINT64 Data;\r | |
ba9f8351 | 70 | \r |
71 | Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);\r | |
72 | ASSERT_EFI_ERROR (Status);\r | |
73 | \r | |
74 | return Data;\r | |
75 | }\r | |
76 | \r | |
77 | /**\r | |
78 | Writes registers in the EFI CPU I/O space.\r | |
79 | \r | |
80 | Writes the I/O port specified by Port with registers width and value specified by Width\r | |
61e1deec LD |
81 | and Data respectively. Data is returned.\r |
82 | \r | |
ba9f8351 | 83 | This function must guarantee that all I/O read and write operations are serialized.\r |
61e1deec | 84 | If such operations are not supported, then ASSERT().\r |
ba9f8351 | 85 | \r |
86 | @param Port The base address of the I/O operation.\r | |
87 | The caller is responsible for aligning the Address if required.\r | |
88 | @param Width The width of the I/O operation.\r | |
89 | @param Data The value to write to the I/O port.\r | |
90 | \r | |
a750b4ae | 91 | @return The parameter of Data.\r |
ba9f8351 | 92 | \r |
93 | **/\r | |
94 | UINT64\r | |
95 | EFIAPI\r | |
96 | IoWriteWorker (\r | |
97 | IN UINTN Port,\r | |
98 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
99 | IN UINT64 Data\r | |
100 | )\r | |
101 | {\r | |
102 | EFI_STATUS Status;\r | |
103 | \r | |
104 | Status = mCpuIo->Io.Write (mCpuIo, Width, Port, 1, &Data);\r | |
105 | ASSERT_EFI_ERROR (Status);\r | |
106 | \r | |
107 | return Data;\r | |
108 | }\r | |
109 | \r | |
61e1deec LD |
110 | /**\r |
111 | Reads registers in the EFI CPU I/O space.\r | |
112 | \r | |
113 | Reads the I/O port specified by Port with registers width specified by Width.\r | |
114 | The port is read Count times, and the read data is stored in the provided Buffer.\r | |
115 | \r | |
116 | This function must guarantee that all I/O read and write operations are serialized.\r | |
117 | If such operations are not supported, then ASSERT().\r | |
118 | \r | |
119 | @param Port The base address of the I/O operation.\r | |
120 | The caller is responsible for aligning the Address if required.\r | |
121 | @param Width The width of the I/O operation.\r | |
122 | @param Count The number of times to read I/O port.\r | |
123 | @param Buffer The buffer to store the read data into.\r | |
124 | \r | |
125 | **/\r | |
126 | VOID\r | |
127 | EFIAPI\r | |
128 | IoReadFifoWorker (\r | |
129 | IN UINTN Port,\r | |
130 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
131 | IN UINTN Count,\r | |
132 | IN VOID *Buffer\r | |
133 | )\r | |
134 | {\r | |
135 | EFI_STATUS Status;\r | |
136 | \r | |
137 | Status = mCpuIo->Io.Read (mCpuIo, Width, Port, Count, Buffer);\r | |
138 | ASSERT_EFI_ERROR (Status);\r | |
139 | }\r | |
140 | \r | |
141 | /**\r | |
142 | Writes registers in the EFI CPU I/O space.\r | |
143 | \r | |
144 | Writes the I/O port specified by Port with registers width specified by Width.\r | |
145 | The port is written Count times, and the write data is retrieved from the provided Buffer.\r | |
146 | \r | |
147 | This function must guarantee that all I/O read and write operations are serialized.\r | |
148 | If such operations are not supported, then ASSERT().\r | |
149 | \r | |
150 | @param Port The base address of the I/O operation.\r | |
151 | The caller is responsible for aligning the Address if required.\r | |
152 | @param Width The width of the I/O operation.\r | |
153 | @param Count The number of times to write I/O port.\r | |
154 | @param Buffer The buffer to store the read data into.\r | |
155 | \r | |
156 | **/\r | |
157 | VOID\r | |
158 | EFIAPI\r | |
159 | IoWriteFifoWorker (\r | |
160 | IN UINTN Port,\r | |
161 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
162 | IN UINTN Count,\r | |
163 | IN VOID *Buffer\r | |
164 | )\r | |
165 | {\r | |
166 | EFI_STATUS Status;\r | |
167 | \r | |
168 | Status = mCpuIo->Io.Write (mCpuIo, Width, Port, Count, Buffer);\r | |
169 | ASSERT_EFI_ERROR (Status);\r | |
170 | }\r | |
171 | \r | |
ba9f8351 | 172 | /**\r |
173 | Reads memory-mapped registers in the EFI system memory space.\r | |
174 | \r | |
175 | Reads the MMIO registers specified by Address with registers width specified by Width.\r | |
176 | The read value is returned. If such operations are not supported, then ASSERT().\r | |
177 | This function must guarantee that all MMIO read and write operations are serialized.\r | |
178 | \r | |
179 | @param Address The MMIO register to read.\r | |
180 | The caller is responsible for aligning the Address if required.\r | |
181 | @param Width The width of the I/O operation.\r | |
182 | \r | |
183 | @return Data read from registers in the EFI system memory space.\r | |
184 | \r | |
185 | **/\r | |
186 | UINT64\r | |
187 | EFIAPI\r | |
188 | MmioReadWorker (\r | |
189 | IN UINTN Address,\r | |
190 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r | |
191 | )\r | |
192 | {\r | |
193 | EFI_STATUS Status;\r | |
194 | UINT64 Data;\r | |
195 | \r | |
196 | Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data);\r | |
197 | ASSERT_EFI_ERROR (Status);\r | |
198 | \r | |
199 | return Data;\r | |
200 | }\r | |
201 | \r | |
202 | /**\r | |
203 | Writes memory-mapped registers in the EFI system memory space.\r | |
204 | \r | |
205 | Writes the MMIO registers specified by Address with registers width and value specified by Width\r | |
206 | and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r | |
207 | This function must guarantee that all MMIO read and write operations are serialized.\r | |
208 | \r | |
209 | @param Address The MMIO register to read.\r | |
210 | The caller is responsible for aligning the Address if required.\r | |
211 | @param Width The width of the I/O operation.\r | |
212 | @param Data The value to write to the I/O port.\r | |
9095d37b | 213 | \r |
ba9f8351 | 214 | @return Data read from registers in the EFI system memory space.\r |
215 | \r | |
216 | **/\r | |
217 | UINT64\r | |
218 | EFIAPI\r | |
219 | MmioWriteWorker (\r | |
220 | IN UINTN Address,\r | |
221 | IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r | |
222 | IN UINT64 Data\r | |
223 | )\r | |
224 | {\r | |
225 | EFI_STATUS Status;\r | |
226 | \r | |
227 | Status = mCpuIo->Mem.Write (mCpuIo, Width, Address, 1, &Data);\r | |
228 | ASSERT_EFI_ERROR (Status);\r | |
229 | \r | |
230 | return Data;\r | |
231 | }\r | |
232 | \r | |
233 | /**\r | |
234 | Reads an 8-bit I/O port.\r | |
235 | \r | |
236 | Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.\r | |
237 | This function must guarantee that all I/O read and write operations are\r | |
238 | serialized.\r | |
239 | \r | |
240 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
241 | \r | |
242 | @param Port The I/O port to read.\r | |
243 | \r | |
244 | @return The value read.\r | |
245 | \r | |
246 | **/\r | |
247 | UINT8\r | |
248 | EFIAPI\r | |
249 | IoRead8 (\r | |
250 | IN UINTN Port\r | |
251 | )\r | |
252 | {\r | |
253 | return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8);\r | |
254 | }\r | |
255 | \r | |
256 | /**\r | |
257 | Writes an 8-bit I/O port.\r | |
258 | \r | |
259 | Writes the 8-bit I/O port specified by Port with the value specified by Value\r | |
260 | and returns Value. This function must guarantee that all I/O read and write\r | |
261 | operations are serialized.\r | |
262 | \r | |
263 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
264 | \r | |
265 | @param Port The I/O port to write.\r | |
266 | @param Value The value to write to the I/O port.\r | |
267 | \r | |
268 | @return The value written the I/O port.\r | |
269 | \r | |
270 | **/\r | |
271 | UINT8\r | |
272 | EFIAPI\r | |
273 | IoWrite8 (\r | |
274 | IN UINTN Port,\r | |
275 | IN UINT8 Value\r | |
276 | )\r | |
277 | {\r | |
278 | return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value);\r | |
279 | }\r | |
280 | \r | |
281 | /**\r | |
282 | Reads a 16-bit I/O port.\r | |
283 | \r | |
284 | Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.\r | |
285 | This function must guarantee that all I/O read and write operations are\r | |
286 | serialized.\r | |
287 | \r | |
288 | If Port is not aligned on a 16-bit boundary, then ASSERT().\r | |
9095d37b | 289 | \r |
ba9f8351 | 290 | If 16-bit I/O port operations are not supported, then ASSERT().\r |
291 | \r | |
292 | @param Port The I/O port to read.\r | |
293 | \r | |
294 | @return The value read.\r | |
295 | \r | |
296 | **/\r | |
297 | UINT16\r | |
298 | EFIAPI\r | |
299 | IoRead16 (\r | |
300 | IN UINTN Port\r | |
301 | )\r | |
302 | {\r | |
303 | //\r | |
304 | // Make sure Port is aligned on a 16-bit boundary.\r | |
305 | //\r | |
306 | ASSERT ((Port & 1) == 0);\r | |
307 | return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);\r | |
308 | }\r | |
309 | \r | |
310 | /**\r | |
311 | Writes a 16-bit I/O port.\r | |
312 | \r | |
313 | Writes the 16-bit I/O port specified by Port with the value specified by Value\r | |
314 | and returns Value. This function must guarantee that all I/O read and write\r | |
315 | operations are serialized.\r | |
316 | \r | |
317 | If Port is not aligned on a 16-bit boundary, then ASSERT().\r | |
318 | \r | |
319 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
320 | \r | |
321 | @param Port The I/O port to write.\r | |
322 | @param Value The value to write to the I/O port.\r | |
323 | \r | |
324 | @return The value written the I/O port.\r | |
325 | \r | |
326 | **/\r | |
327 | UINT16\r | |
328 | EFIAPI\r | |
329 | IoWrite16 (\r | |
330 | IN UINTN Port,\r | |
331 | IN UINT16 Value\r | |
332 | )\r | |
333 | {\r | |
334 | //\r | |
335 | // Make sure Port is aligned on a 16-bit boundary.\r | |
336 | //\r | |
337 | ASSERT ((Port & 1) == 0);\r | |
338 | return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);\r | |
339 | }\r | |
340 | \r | |
341 | /**\r | |
342 | Reads a 32-bit I/O port.\r | |
343 | \r | |
344 | Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r | |
345 | This function must guarantee that all I/O read and write operations are\r | |
346 | serialized.\r | |
9095d37b | 347 | \r |
ba9f8351 | 348 | If Port is not aligned on a 32-bit boundary, then ASSERT().\r |
349 | \r | |
350 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
351 | \r | |
352 | @param Port The I/O port to read.\r | |
353 | \r | |
354 | @return The value read.\r | |
355 | \r | |
356 | **/\r | |
357 | UINT32\r | |
358 | EFIAPI\r | |
359 | IoRead32 (\r | |
360 | IN UINTN Port\r | |
361 | )\r | |
362 | {\r | |
363 | //\r | |
364 | // Make sure Port is aligned on a 32-bit boundary.\r | |
365 | //\r | |
366 | ASSERT ((Port & 3) == 0);\r | |
367 | return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);\r | |
368 | }\r | |
369 | \r | |
370 | /**\r | |
371 | Writes a 32-bit I/O port.\r | |
372 | \r | |
373 | Writes the 32-bit I/O port specified by Port with the value specified by Value\r | |
374 | and returns Value. This function must guarantee that all I/O read and write\r | |
375 | operations are serialized.\r | |
376 | \r | |
377 | If Port is not aligned on a 32-bit boundary, then ASSERT().\r | |
378 | \r | |
379 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
380 | \r | |
381 | @param Port The I/O port to write.\r | |
382 | @param Value The value to write to the I/O port.\r | |
383 | \r | |
384 | @return The value written the I/O port.\r | |
385 | \r | |
386 | **/\r | |
387 | UINT32\r | |
388 | EFIAPI\r | |
389 | IoWrite32 (\r | |
390 | IN UINTN Port,\r | |
391 | IN UINT32 Value\r | |
392 | )\r | |
393 | {\r | |
394 | //\r | |
395 | // Make sure Port is aligned on a 32-bit boundary.\r | |
396 | //\r | |
397 | ASSERT ((Port & 3) == 0);\r | |
398 | return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);\r | |
399 | }\r | |
400 | \r | |
401 | /**\r | |
402 | Reads a 64-bit I/O port.\r | |
403 | \r | |
404 | Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.\r | |
405 | This function must guarantee that all I/O read and write operations are\r | |
406 | serialized.\r | |
407 | \r | |
408 | If Port is not aligned on a 64-bit boundary, then ASSERT().\r | |
409 | \r | |
410 | If 64-bit I/O port operations are not supported, then ASSERT().\r | |
411 | \r | |
412 | @param Port The I/O port to read.\r | |
413 | \r | |
414 | @return The value read.\r | |
415 | \r | |
416 | **/\r | |
417 | UINT64\r | |
418 | EFIAPI\r | |
419 | IoRead64 (\r | |
420 | IN UINTN Port\r | |
421 | )\r | |
422 | {\r | |
423 | //\r | |
424 | // Make sure Port is aligned on a 64-bit boundary.\r | |
425 | //\r | |
426 | ASSERT ((Port & 7) == 0);\r | |
427 | return IoReadWorker (Port, EfiCpuIoWidthUint64);\r | |
428 | }\r | |
429 | \r | |
430 | /**\r | |
431 | Writes a 64-bit I/O port.\r | |
432 | \r | |
433 | Writes the 64-bit I/O port specified by Port with the value specified by Value\r | |
434 | and returns Value. This function must guarantee that all I/O read and write\r | |
435 | operations are serialized.\r | |
436 | \r | |
437 | If Port is not aligned on a 64-bit boundary, then ASSERT().\r | |
9095d37b | 438 | \r |
ba9f8351 | 439 | If 64-bit I/O port operations are not supported, then ASSERT().\r |
440 | \r | |
441 | @param Port The I/O port to write.\r | |
442 | @param Value The value to write to the I/O port.\r | |
443 | \r | |
444 | @return The value written the I/O port.\r | |
445 | \r | |
446 | **/\r | |
447 | UINT64\r | |
448 | EFIAPI\r | |
449 | IoWrite64 (\r | |
450 | IN UINTN Port,\r | |
451 | IN UINT64 Value\r | |
452 | )\r | |
453 | {\r | |
454 | //\r | |
455 | // Make sure Port is aligned on a 64-bit boundary.\r | |
456 | //\r | |
457 | ASSERT ((Port & 7) == 0);\r | |
458 | return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);\r | |
459 | }\r | |
460 | \r | |
61e1deec LD |
461 | /**\r |
462 | Reads an 8-bit I/O port fifo into a block of memory.\r | |
463 | \r | |
464 | Reads the 8-bit I/O fifo port specified by Port.\r | |
465 | The port is read Count times, and the read data is\r | |
466 | stored in the provided Buffer.\r | |
467 | \r | |
468 | This function must guarantee that all I/O read and write operations are\r | |
469 | serialized.\r | |
470 | \r | |
471 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
472 | \r | |
473 | @param Port The I/O port to read.\r | |
474 | @param Count The number of times to read I/O port.\r | |
475 | @param Buffer The buffer to store the read data into.\r | |
476 | \r | |
477 | **/\r | |
478 | VOID\r | |
479 | EFIAPI\r | |
480 | IoReadFifo8 (\r | |
481 | IN UINTN Port,\r | |
482 | IN UINTN Count,\r | |
483 | OUT VOID *Buffer\r | |
484 | )\r | |
485 | {\r | |
486 | IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);\r | |
487 | }\r | |
488 | \r | |
489 | /**\r | |
490 | Writes a block of memory into an 8-bit I/O port fifo.\r | |
491 | \r | |
492 | Writes the 8-bit I/O fifo port specified by Port.\r | |
493 | The port is written Count times, and the write data is\r | |
494 | retrieved from the provided Buffer.\r | |
495 | \r | |
496 | This function must guarantee that all I/O write and write operations are\r | |
497 | serialized.\r | |
498 | \r | |
499 | If 8-bit I/O port operations are not supported, then ASSERT().\r | |
500 | \r | |
501 | @param Port The I/O port to write.\r | |
502 | @param Count The number of times to write I/O port.\r | |
503 | @param Buffer The buffer to retrieve the write data from.\r | |
504 | \r | |
505 | **/\r | |
506 | VOID\r | |
507 | EFIAPI\r | |
508 | IoWriteFifo8 (\r | |
509 | IN UINTN Port,\r | |
510 | IN UINTN Count,\r | |
511 | IN VOID *Buffer\r | |
512 | )\r | |
513 | {\r | |
514 | IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);\r | |
515 | }\r | |
516 | \r | |
517 | /**\r | |
518 | Reads a 16-bit I/O port fifo into a block of memory.\r | |
519 | \r | |
520 | Reads the 16-bit I/O fifo port specified by Port.\r | |
521 | The port is read Count times, and the read data is\r | |
522 | stored in the provided Buffer.\r | |
523 | \r | |
524 | This function must guarantee that all I/O read and write operations are\r | |
525 | serialized.\r | |
526 | \r | |
527 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
528 | \r | |
529 | @param Port The I/O port to read.\r | |
530 | @param Count The number of times to read I/O port.\r | |
531 | @param Buffer The buffer to store the read data into.\r | |
532 | \r | |
533 | **/\r | |
534 | VOID\r | |
535 | EFIAPI\r | |
536 | IoReadFifo16 (\r | |
537 | IN UINTN Port,\r | |
538 | IN UINTN Count,\r | |
539 | OUT VOID *Buffer\r | |
540 | )\r | |
541 | {\r | |
542 | //\r | |
543 | // Make sure Port is aligned on a 16-bit boundary.\r | |
544 | //\r | |
545 | ASSERT ((Port & 1) == 0);\r | |
546 | IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);\r | |
547 | }\r | |
548 | \r | |
549 | /**\r | |
550 | Writes a block of memory into a 16-bit I/O port fifo.\r | |
551 | \r | |
552 | Writes the 16-bit I/O fifo port specified by Port.\r | |
553 | The port is written Count times, and the write data is\r | |
554 | retrieved from the provided Buffer.\r | |
555 | \r | |
556 | This function must guarantee that all I/O write and write operations are\r | |
557 | serialized.\r | |
558 | \r | |
559 | If 16-bit I/O port operations are not supported, then ASSERT().\r | |
560 | \r | |
561 | @param Port The I/O port to write.\r | |
562 | @param Count The number of times to write I/O port.\r | |
563 | @param Buffer The buffer to retrieve the write data from.\r | |
564 | \r | |
565 | **/\r | |
566 | VOID\r | |
567 | EFIAPI\r | |
568 | IoWriteFifo16 (\r | |
569 | IN UINTN Port,\r | |
570 | IN UINTN Count,\r | |
571 | IN VOID *Buffer\r | |
572 | )\r | |
573 | {\r | |
574 | //\r | |
575 | // Make sure Port is aligned on a 16-bit boundary.\r | |
576 | //\r | |
577 | ASSERT ((Port & 1) == 0);\r | |
578 | IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);\r | |
579 | }\r | |
580 | \r | |
581 | /**\r | |
582 | Reads a 32-bit I/O port fifo into a block of memory.\r | |
583 | \r | |
584 | Reads the 32-bit I/O fifo port specified by Port.\r | |
585 | The port is read Count times, and the read data is\r | |
586 | stored in the provided Buffer.\r | |
587 | \r | |
588 | This function must guarantee that all I/O read and write operations are\r | |
589 | serialized.\r | |
590 | \r | |
591 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
592 | \r | |
593 | @param Port The I/O port to read.\r | |
594 | @param Count The number of times to read I/O port.\r | |
595 | @param Buffer The buffer to store the read data into.\r | |
596 | \r | |
597 | **/\r | |
598 | VOID\r | |
599 | EFIAPI\r | |
600 | IoReadFifo32 (\r | |
601 | IN UINTN Port,\r | |
602 | IN UINTN Count,\r | |
603 | OUT VOID *Buffer\r | |
604 | )\r | |
605 | {\r | |
606 | //\r | |
607 | // Make sure Port is aligned on a 32-bit boundary.\r | |
608 | //\r | |
609 | ASSERT ((Port & 3) == 0);\r | |
610 | IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);\r | |
611 | }\r | |
612 | \r | |
613 | /**\r | |
614 | Writes a block of memory into a 32-bit I/O port fifo.\r | |
615 | \r | |
616 | Writes the 32-bit I/O fifo port specified by Port.\r | |
617 | The port is written Count times, and the write data is\r | |
618 | retrieved from the provided Buffer.\r | |
619 | \r | |
620 | This function must guarantee that all I/O write and write operations are\r | |
621 | serialized.\r | |
622 | \r | |
623 | If 32-bit I/O port operations are not supported, then ASSERT().\r | |
624 | \r | |
625 | @param Port The I/O port to write.\r | |
626 | @param Count The number of times to write I/O port.\r | |
627 | @param Buffer The buffer to retrieve the write data from.\r | |
628 | \r | |
629 | **/\r | |
630 | VOID\r | |
631 | EFIAPI\r | |
632 | IoWriteFifo32 (\r | |
633 | IN UINTN Port,\r | |
634 | IN UINTN Count,\r | |
635 | IN VOID *Buffer\r | |
636 | )\r | |
637 | {\r | |
638 | //\r | |
639 | // Make sure Port is aligned on a 32-bit boundary.\r | |
640 | //\r | |
641 | ASSERT ((Port & 3) == 0);\r | |
642 | IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);\r | |
643 | }\r | |
644 | \r | |
ba9f8351 | 645 | /**\r |
646 | Reads an 8-bit MMIO register.\r | |
647 | \r | |
648 | Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r | |
649 | returned. This function must guarantee that all MMIO read and write\r | |
650 | operations are serialized.\r | |
651 | \r | |
652 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
653 | \r | |
654 | @param Address The MMIO register to read.\r | |
655 | \r | |
656 | @return The value read.\r | |
657 | \r | |
658 | **/\r | |
659 | UINT8\r | |
660 | EFIAPI\r | |
661 | MmioRead8 (\r | |
662 | IN UINTN Address\r | |
663 | )\r | |
664 | {\r | |
665 | return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8);\r | |
666 | }\r | |
667 | \r | |
668 | /**\r | |
669 | Writes an 8-bit MMIO register.\r | |
670 | \r | |
671 | Writes the 8-bit MMIO register specified by Address with the value specified\r | |
672 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
673 | and write operations are serialized.\r | |
674 | \r | |
675 | If 8-bit MMIO register operations are not supported, then ASSERT().\r | |
676 | \r | |
677 | @param Address The MMIO register to write.\r | |
678 | @param Value The value to write to the MMIO register.\r | |
679 | \r | |
680 | **/\r | |
681 | UINT8\r | |
682 | EFIAPI\r | |
683 | MmioWrite8 (\r | |
684 | IN UINTN Address,\r | |
685 | IN UINT8 Value\r | |
686 | )\r | |
687 | {\r | |
688 | return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value);\r | |
689 | }\r | |
690 | \r | |
691 | /**\r | |
692 | Reads a 16-bit MMIO register.\r | |
693 | \r | |
694 | Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r | |
695 | returned. This function must guarantee that all MMIO read and write\r | |
696 | operations are serialized.\r | |
697 | \r | |
698 | If Address is not aligned on a 16-bit boundary, then ASSERT().\r | |
9095d37b | 699 | \r |
ba9f8351 | 700 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
701 | \r | |
702 | @param Address The MMIO register to read.\r | |
703 | \r | |
704 | @return The value read.\r | |
705 | \r | |
706 | **/\r | |
707 | UINT16\r | |
708 | EFIAPI\r | |
709 | MmioRead16 (\r | |
710 | IN UINTN Address\r | |
711 | )\r | |
712 | {\r | |
713 | //\r | |
714 | // Make sure Address is aligned on a 16-bit boundary.\r | |
715 | //\r | |
716 | ASSERT ((Address & 1) == 0);\r | |
717 | return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);\r | |
718 | }\r | |
719 | \r | |
720 | /**\r | |
721 | Writes a 16-bit MMIO register.\r | |
722 | \r | |
723 | Writes the 16-bit MMIO register specified by Address with the value specified\r | |
724 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
725 | and write operations are serialized.\r | |
726 | \r | |
727 | If Address is not aligned on a 16-bit boundary, then ASSERT().\r | |
9095d37b | 728 | \r |
ba9f8351 | 729 | If 16-bit MMIO register operations are not supported, then ASSERT().\r |
730 | \r | |
731 | @param Address The MMIO register to write.\r | |
732 | @param Value The value to write to the MMIO register.\r | |
733 | \r | |
734 | **/\r | |
735 | UINT16\r | |
736 | EFIAPI\r | |
737 | MmioWrite16 (\r | |
738 | IN UINTN Address,\r | |
739 | IN UINT16 Value\r | |
740 | )\r | |
741 | {\r | |
742 | //\r | |
743 | // Make sure Address is aligned on a 16-bit boundary.\r | |
744 | //\r | |
745 | ASSERT ((Address & 1) == 0);\r | |
746 | return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);\r | |
747 | }\r | |
748 | \r | |
749 | /**\r | |
750 | Reads a 32-bit MMIO register.\r | |
751 | \r | |
752 | Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r | |
753 | returned. This function must guarantee that all MMIO read and write\r | |
754 | operations are serialized.\r | |
755 | \r | |
756 | If Address is not aligned on a 32-bit boundary, then ASSERT().\r | |
9095d37b | 757 | \r |
ba9f8351 | 758 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
759 | \r | |
760 | @param Address The MMIO register to read.\r | |
761 | \r | |
762 | @return The value read.\r | |
763 | \r | |
764 | **/\r | |
765 | UINT32\r | |
766 | EFIAPI\r | |
767 | MmioRead32 (\r | |
768 | IN UINTN Address\r | |
769 | )\r | |
770 | {\r | |
771 | //\r | |
772 | // Make sure Address is aligned on a 32-bit boundary.\r | |
773 | //\r | |
774 | ASSERT ((Address & 3) == 0);\r | |
775 | return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);\r | |
776 | }\r | |
777 | \r | |
778 | /**\r | |
779 | Writes a 32-bit MMIO register.\r | |
780 | \r | |
781 | Writes the 32-bit MMIO register specified by Address with the value specified\r | |
782 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
783 | and write operations are serialized.\r | |
784 | \r | |
785 | If Address is not aligned on a 32-bit boundary, then ASSERT().\r | |
9095d37b | 786 | \r |
ba9f8351 | 787 | If 32-bit MMIO register operations are not supported, then ASSERT().\r |
788 | \r | |
789 | @param Address The MMIO register to write.\r | |
790 | @param Value The value to write to the MMIO register.\r | |
791 | \r | |
792 | **/\r | |
793 | UINT32\r | |
794 | EFIAPI\r | |
795 | MmioWrite32 (\r | |
796 | IN UINTN Address,\r | |
797 | IN UINT32 Value\r | |
798 | )\r | |
799 | {\r | |
800 | //\r | |
801 | // Make sure Address is aligned on a 32-bit boundary.\r | |
802 | //\r | |
803 | ASSERT ((Address & 3) == 0);\r | |
804 | return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);\r | |
805 | }\r | |
806 | \r | |
807 | /**\r | |
808 | Reads a 64-bit MMIO register.\r | |
809 | \r | |
810 | Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r | |
811 | returned. This function must guarantee that all MMIO read and write\r | |
812 | operations are serialized.\r | |
813 | \r | |
814 | If Address is not aligned on a 64-bit boundary, then ASSERT().\r | |
9095d37b | 815 | \r |
ba9f8351 | 816 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
817 | \r | |
818 | @param Address The MMIO register to read.\r | |
819 | \r | |
820 | @return The value read.\r | |
821 | \r | |
822 | **/\r | |
823 | UINT64\r | |
824 | EFIAPI\r | |
825 | MmioRead64 (\r | |
826 | IN UINTN Address\r | |
827 | )\r | |
828 | {\r | |
829 | //\r | |
830 | // Make sure Address is aligned on a 64-bit boundary.\r | |
831 | //\r | |
832 | ASSERT ((Address & 7) == 0);\r | |
833 | return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);\r | |
834 | }\r | |
835 | \r | |
836 | /**\r | |
837 | Writes a 64-bit MMIO register.\r | |
838 | \r | |
839 | Writes the 64-bit MMIO register specified by Address with the value specified\r | |
840 | by Value and returns Value. This function must guarantee that all MMIO read\r | |
841 | and write operations are serialized.\r | |
842 | \r | |
843 | If Address is not aligned on a 64-bit boundary, then ASSERT().\r | |
9095d37b | 844 | \r |
ba9f8351 | 845 | If 64-bit MMIO register operations are not supported, then ASSERT().\r |
846 | \r | |
847 | @param Address The MMIO register to write.\r | |
848 | @param Value The value to write to the MMIO register.\r | |
849 | \r | |
850 | **/\r | |
851 | UINT64\r | |
852 | EFIAPI\r | |
853 | MmioWrite64 (\r | |
854 | IN UINTN Address,\r | |
855 | IN UINT64 Value\r | |
856 | )\r | |
857 | {\r | |
858 | //\r | |
859 | // Make sure Address is aligned on a 64-bit boundary.\r | |
860 | //\r | |
861 | ASSERT ((Address & 7) == 0);\r | |
862 | return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);\r | |
863 | }\r |