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863be5d0 1/** @file\r
2 I/O Library basic function implementation and worker functions.\r
3\r
9095d37b 4 Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
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5 Copyright (c) 2017, AMD Incorporated. All rights reserved.<BR>\r
6\r
863be5d0 7 This program and the accompanying materials\r
8 are licensed and made available under the terms and conditions of the BSD License\r
9 which accompanies this distribution. The full text of the license may be found at\r
10 http://opensource.org/licenses/bsd-license.php.\r
11\r
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
14\r
15**/\r
16\r
17#include "DxeIoLibEsalInternal.h"\r
18\r
19/**\r
20 Reads registers in the EFI CPU I/O space.\r
21\r
22 Reads the I/O port specified by Port with registers width specified by Width.\r
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23 The read value is returned.\r
24\r
863be5d0 25 This function must guarantee that all I/O read and write operations are serialized.\r
8553d217 26 If such operations are not supported, then ASSERT().\r
863be5d0 27\r
28 @param Port The base address of the I/O operation.\r
29 The caller is responsible for aligning the Address if required.\r
30 @param Width The width of the I/O operation.\r
31\r
32 @return Data read from registers in the EFI CPU I/O space.\r
33\r
34**/\r
35UINT64\r
36EFIAPI\r
37IoReadWorker (\r
38 IN UINTN Port,\r
39 IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r
40 )\r
41{\r
42 SAL_RETURN_REGS ReturnReg;\r
43 UINT64 Data;\r
44\r
18ad26da
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45 Data = 0;\r
46\r
863be5d0 47 ReturnReg = EsalCall (\r
48 EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,\r
49 EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,\r
9095d37b
LG
50 IoReadFunctionId,\r
51 (UINT64)Width,\r
52 Port,\r
53 1,\r
54 (UINT64)&Data,\r
55 0,\r
56 0,\r
863be5d0 57 0\r
58 );\r
59 ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);\r
60 return Data;\r
61}\r
62\r
63/**\r
64 Writes registers in the EFI CPU I/O space.\r
65\r
66 Writes the I/O port specified by Port with registers width and value specified by Width\r
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67 and Data respectively. Data is returned.\r
68\r
863be5d0 69 This function must guarantee that all I/O read and write operations are serialized.\r
8553d217 70 If such operations are not supported, then ASSERT().\r
863be5d0 71\r
72 @param Port The base address of the I/O operation.\r
73 The caller is responsible for aligning the Address if required.\r
74 @param Width The width of the I/O operation.\r
75 @param Data The value to write to the I/O port.\r
76\r
a750b4ae 77 @return The parameter of Data.\r
863be5d0 78\r
79**/\r
80UINT64\r
81EFIAPI\r
82IoWriteWorker (\r
83 IN UINTN Port,\r
84 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
85 IN UINT64 Data\r
86 )\r
87{\r
88 SAL_RETURN_REGS ReturnReg;\r
89\r
90 ReturnReg = EsalCall (\r
91 EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,\r
92 EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,\r
9095d37b
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93 IoWriteFunctionId,\r
94 (UINT64)Width,\r
95 Port,\r
96 1,\r
97 (UINT64)&Data,\r
98 0,\r
99 0,\r
863be5d0 100 0\r
101 );\r
102 ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);\r
103 return Data;\r
104}\r
105\r
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106/**\r
107 Reads registers in the EFI CPU I/O space.\r
108\r
109 Reads the I/O port specified by Port with registers width specified by Width.\r
110 The port is read Count times, and the read data is stored in the provided Buffer.\r
111\r
112 This function must guarantee that all I/O read and write operations are serialized.\r
113 If such operations are not supported, then ASSERT().\r
114\r
115 @param Port The base address of the I/O operation.\r
116 The caller is responsible for aligning the Address if required.\r
117 @param Width The width of the I/O operation.\r
118 @param Count The number of times to read I/O port.\r
119 @param Buffer The buffer to store the read data into.\r
120\r
121**/\r
122VOID\r
123EFIAPI\r
124IoReadFifoWorker (\r
125 IN UINTN Port,\r
126 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
127 IN UINTN Count,\r
128 IN VOID *Buffer\r
129 )\r
130{\r
131 SAL_RETURN_REGS ReturnReg;\r
132\r
133 ReturnReg = EsalCall (\r
134 EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,\r
135 EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,\r
9095d37b
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136 IoReadFunctionId,\r
137 (UINT64)Width,\r
138 Port,\r
139 Count,\r
140 (UINT64)Buffer,\r
141 0,\r
142 0,\r
8553d217
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143 0\r
144 );\r
145 ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);\r
146}\r
147\r
148/**\r
149 Writes registers in the EFI CPU I/O space.\r
150\r
151 Writes the I/O port specified by Port with registers width specified by Width.\r
152 The port is written Count times, and the write data is retrieved from the provided Buffer.\r
153\r
154 This function must guarantee that all I/O read and write operations are serialized.\r
155 If such operations are not supported, then ASSERT().\r
156\r
157 @param Port The base address of the I/O operation.\r
158 The caller is responsible for aligning the Address if required.\r
159 @param Width The width of the I/O operation.\r
160 @param Count The number of times to write I/O port.\r
161 @param Buffer The buffer to store the read data into.\r
162\r
163**/\r
164VOID\r
165EFIAPI\r
166IoWriteFifoWorker (\r
167 IN UINTN Port,\r
168 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
169 IN UINTN Count,\r
170 IN VOID *Buffer\r
171 )\r
172{\r
173 SAL_RETURN_REGS ReturnReg;\r
174\r
175 ReturnReg = EsalCall (\r
176 EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,\r
177 EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,\r
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178 IoWriteFunctionId,\r
179 (UINT64)Width,\r
180 Port,\r
181 Count,\r
182 (UINT64)Buffer,\r
183 0,\r
184 0,\r
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185 0\r
186 );\r
187 ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);\r
188}\r
189\r
863be5d0 190/**\r
191 Reads memory-mapped registers in the EFI system memory space.\r
192\r
193 Reads the MMIO registers specified by Address with registers width specified by Width.\r
194 The read value is returned. If such operations are not supported, then ASSERT().\r
195 This function must guarantee that all MMIO read and write operations are serialized.\r
196\r
197 @param Address The MMIO register to read.\r
198 The caller is responsible for aligning the Address if required.\r
199 @param Width The width of the I/O operation.\r
200\r
201 @return Data read from registers in the EFI system memory space.\r
202\r
203**/\r
204UINT64\r
205EFIAPI\r
206MmioReadWorker (\r
207 IN UINTN Address,\r
208 IN EFI_CPU_IO_PROTOCOL_WIDTH Width\r
209 )\r
210{\r
211 SAL_RETURN_REGS ReturnReg;\r
212 UINT64 Data;\r
213\r
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214 Data = 0;\r
215\r
863be5d0 216 ReturnReg = EsalCall (\r
217 EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,\r
218 EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,\r
9095d37b
LG
219 MemReadFunctionId,\r
220 (UINT64)Width,\r
221 Address,\r
222 1,\r
223 (UINT64)&Data,\r
224 0,\r
225 0,\r
863be5d0 226 0\r
227 );\r
228 ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);\r
229 return Data;\r
230}\r
231\r
232/**\r
233 Writes memory-mapped registers in the EFI system memory space.\r
234\r
235 Writes the MMIO registers specified by Address with registers width and value specified by Width\r
236 and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r
237 This function must guarantee that all MMIO read and write operations are serialized.\r
238\r
239 @param Address The MMIO register to read.\r
240 The caller is responsible for aligning the Address if required.\r
241 @param Width The width of the I/O operation.\r
242 @param Data The value to write to memory-mapped registers\r
243\r
244 @return Data read from registers in the EFI system memory space.\r
245\r
246**/\r
247UINT64\r
248EFIAPI\r
249MmioWriteWorker (\r
250 IN UINTN Address,\r
251 IN EFI_CPU_IO_PROTOCOL_WIDTH Width,\r
252 IN UINT64 Data\r
253 )\r
254{\r
255 SAL_RETURN_REGS ReturnReg;\r
256\r
257 ReturnReg = EsalCall (\r
258 EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_LO,\r
259 EFI_EXTENDED_SAL_BASE_IO_SERVICES_PROTOCOL_GUID_HI,\r
9095d37b
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260 MemWriteFunctionId,\r
261 (UINT64)Width,\r
262 Address,\r
263 1,\r
264 (UINT64)&Data,\r
265 0,\r
266 0,\r
863be5d0 267 0\r
268 );\r
269 ASSERT (ReturnReg.Status == EFI_SAL_SUCCESS);\r
270 return Data;\r
271}\r
272\r
273/**\r
274 Reads an 8-bit I/O port.\r
275\r
276 Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.\r
277 This function must guarantee that all I/O read and write operations are\r
278 serialized.\r
279\r
280 If 8-bit I/O port operations are not supported, then ASSERT().\r
281\r
282 @param Port The I/O port to read.\r
283\r
284 @return The value read.\r
285\r
286**/\r
287UINT8\r
288EFIAPI\r
289IoRead8 (\r
290 IN UINTN Port\r
291 )\r
292{\r
293 return (UINT8)IoReadWorker (Port, EfiCpuIoWidthUint8);\r
294}\r
295\r
296/**\r
297 Writes an 8-bit I/O port.\r
298\r
299 Writes the 8-bit I/O port specified by Port with the value specified by Value\r
300 and returns Value. This function must guarantee that all I/O read and write\r
301 operations are serialized.\r
302\r
303 If 8-bit I/O port operations are not supported, then ASSERT().\r
304\r
305 @param Port The I/O port to write.\r
306 @param Value The value to write to the I/O port.\r
307\r
308 @return The value written the I/O port.\r
309\r
310**/\r
311UINT8\r
312EFIAPI\r
313IoWrite8 (\r
314 IN UINTN Port,\r
315 IN UINT8 Value\r
316 )\r
317{\r
318 return (UINT8)IoWriteWorker (Port, EfiCpuIoWidthUint8, Value);\r
319}\r
320\r
321/**\r
322 Reads a 16-bit I/O port.\r
323\r
324 Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.\r
325 This function must guarantee that all I/O read and write operations are\r
326 serialized.\r
327\r
328 If 16-bit I/O port operations are not supported, then ASSERT().\r
329\r
330 @param Port The I/O port to read.\r
331\r
332 @return The value read.\r
333\r
334**/\r
335UINT16\r
336EFIAPI\r
337IoRead16 (\r
338 IN UINTN Port\r
339 )\r
340{\r
341 //\r
342 // Make sure Port is aligned on a 16-bit boundary.\r
343 //\r
344 ASSERT ((Port & 1) == 0);\r
345 return (UINT16)IoReadWorker (Port, EfiCpuIoWidthUint16);\r
346}\r
347\r
348/**\r
349 Writes a 16-bit I/O port.\r
350\r
351 Writes the 16-bit I/O port specified by Port with the value specified by Value\r
352 and returns Value. This function must guarantee that all I/O read and write\r
353 operations are serialized.\r
354\r
355 If 16-bit I/O port operations are not supported, then ASSERT().\r
356\r
357 @param Port The I/O port to write.\r
358 @param Value The value to write to the I/O port.\r
359\r
360 @return The value written the I/O port.\r
361\r
362**/\r
363UINT16\r
364EFIAPI\r
365IoWrite16 (\r
366 IN UINTN Port,\r
367 IN UINT16 Value\r
368 )\r
369{\r
370 //\r
371 // Make sure Port is aligned on a 16-bit boundary.\r
372 //\r
373 ASSERT ((Port & 1) == 0);\r
374 return (UINT16)IoWriteWorker (Port, EfiCpuIoWidthUint16, Value);\r
375}\r
376\r
377/**\r
378 Reads a 32-bit I/O port.\r
379\r
380 Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r
381 This function must guarantee that all I/O read and write operations are\r
382 serialized.\r
383\r
384 If 32-bit I/O port operations are not supported, then ASSERT().\r
385\r
386 @param Port The I/O port to read.\r
387\r
388 @return The value read.\r
389\r
390**/\r
391UINT32\r
392EFIAPI\r
393IoRead32 (\r
394 IN UINTN Port\r
395 )\r
396{\r
397 //\r
398 // Make sure Port is aligned on a 32-bit boundary.\r
399 //\r
400 ASSERT ((Port & 3) == 0);\r
401 return (UINT32)IoReadWorker (Port, EfiCpuIoWidthUint32);\r
402}\r
403\r
404/**\r
405 Writes a 32-bit I/O port.\r
406\r
407 Writes the 32-bit I/O port specified by Port with the value specified by Value\r
408 and returns Value. This function must guarantee that all I/O read and write\r
409 operations are serialized.\r
410\r
411 If 32-bit I/O port operations are not supported, then ASSERT().\r
412\r
413 @param Port The I/O port to write.\r
414 @param Value The value to write to the I/O port.\r
415\r
416 @return The value written the I/O port.\r
417\r
418**/\r
419UINT32\r
420EFIAPI\r
421IoWrite32 (\r
422 IN UINTN Port,\r
423 IN UINT32 Value\r
424 )\r
425{\r
426 //\r
427 // Make sure Port is aligned on a 32-bit boundary.\r
428 //\r
429 ASSERT ((Port & 3) == 0);\r
430 return (UINT32)IoWriteWorker (Port, EfiCpuIoWidthUint32, Value);\r
431}\r
432\r
433/**\r
434 Reads a 64-bit I/O port.\r
435\r
436 Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.\r
437 This function must guarantee that all I/O read and write operations are\r
438 serialized.\r
439\r
440 If 64-bit I/O port operations are not supported, then ASSERT().\r
441\r
442 @param Port The I/O port to read.\r
443\r
444 @return The value read.\r
445\r
446**/\r
447UINT64\r
448EFIAPI\r
449IoRead64 (\r
450 IN UINTN Port\r
451 )\r
452{\r
453 //\r
454 // Make sure Port is aligned on a 64-bit boundary.\r
455 //\r
456 ASSERT ((Port & 7) == 0);\r
457 return IoReadWorker (Port, EfiCpuIoWidthUint64);\r
458}\r
459\r
460/**\r
461 Writes a 64-bit I/O port.\r
462\r
463 Writes the 64-bit I/O port specified by Port with the value specified by Value\r
464 and returns Value. This function must guarantee that all I/O read and write\r
465 operations are serialized.\r
466\r
467 If 64-bit I/O port operations are not supported, then ASSERT().\r
468\r
469 @param Port The I/O port to write.\r
470 @param Value The value to write to the I/O port.\r
471\r
472 @return The value written the I/O port.\r
473\r
474**/\r
475UINT64\r
476EFIAPI\r
477IoWrite64 (\r
478 IN UINTN Port,\r
479 IN UINT64 Value\r
480 )\r
481{\r
482 //\r
483 // Make sure Port is aligned on a 64-bit boundary.\r
484 //\r
485 ASSERT ((Port & 7) == 0);\r
486 return IoWriteWorker (Port, EfiCpuIoWidthUint64, Value);\r
487}\r
488\r
8553d217
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489/**\r
490 Reads an 8-bit I/O port fifo into a block of memory.\r
491\r
492 Reads the 8-bit I/O fifo port specified by Port.\r
493 The port is read Count times, and the read data is\r
494 stored in the provided Buffer.\r
495\r
496 This function must guarantee that all I/O read and write operations are\r
497 serialized.\r
498\r
499 If 8-bit I/O port operations are not supported, then ASSERT().\r
500\r
501 @param Port The I/O port to read.\r
502 @param Count The number of times to read I/O port.\r
503 @param Buffer The buffer to store the read data into.\r
504\r
505**/\r
506VOID\r
507EFIAPI\r
508IoReadFifo8 (\r
509 IN UINTN Port,\r
510 IN UINTN Count,\r
511 OUT VOID *Buffer\r
512 )\r
513{\r
514 IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);\r
515}\r
516\r
517/**\r
518 Writes a block of memory into an 8-bit I/O port fifo.\r
519\r
520 Writes the 8-bit I/O fifo port specified by Port.\r
521 The port is written Count times, and the write data is\r
522 retrieved from the provided Buffer.\r
523\r
524 This function must guarantee that all I/O write and write operations are\r
525 serialized.\r
526\r
527 If 8-bit I/O port operations are not supported, then ASSERT().\r
528\r
529 @param Port The I/O port to write.\r
530 @param Count The number of times to write I/O port.\r
531 @param Buffer The buffer to retrieve the write data from.\r
532\r
533**/\r
534VOID\r
535EFIAPI\r
536IoWriteFifo8 (\r
537 IN UINTN Port,\r
538 IN UINTN Count,\r
539 IN VOID *Buffer\r
540 )\r
541{\r
542 IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint8, Count, Buffer);\r
543}\r
544\r
545/**\r
546 Reads a 16-bit I/O port fifo into a block of memory.\r
547\r
548 Reads the 16-bit I/O fifo port specified by Port.\r
549 The port is read Count times, and the read data is\r
550 stored in the provided Buffer.\r
551\r
552 This function must guarantee that all I/O read and write operations are\r
553 serialized.\r
554\r
555 If 16-bit I/O port operations are not supported, then ASSERT().\r
556\r
557 @param Port The I/O port to read.\r
558 @param Count The number of times to read I/O port.\r
559 @param Buffer The buffer to store the read data into.\r
560\r
561**/\r
562VOID\r
563EFIAPI\r
564IoReadFifo16 (\r
565 IN UINTN Port,\r
566 IN UINTN Count,\r
567 OUT VOID *Buffer\r
568 )\r
569{\r
570 //\r
571 // Make sure Port is aligned on a 16-bit boundary.\r
572 //\r
573 ASSERT ((Port & 1) == 0);\r
574 IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);\r
575}\r
576\r
577/**\r
578 Writes a block of memory into a 16-bit I/O port fifo.\r
579\r
580 Writes the 16-bit I/O fifo port specified by Port.\r
581 The port is written Count times, and the write data is\r
582 retrieved from the provided Buffer.\r
583\r
584 This function must guarantee that all I/O write and write operations are\r
585 serialized.\r
586\r
587 If 16-bit I/O port operations are not supported, then ASSERT().\r
588\r
589 @param Port The I/O port to write.\r
590 @param Count The number of times to write I/O port.\r
591 @param Buffer The buffer to retrieve the write data from.\r
592\r
593**/\r
594VOID\r
595EFIAPI\r
596IoWriteFifo16 (\r
597 IN UINTN Port,\r
598 IN UINTN Count,\r
599 IN VOID *Buffer\r
600 )\r
601{\r
602 //\r
603 // Make sure Port is aligned on a 16-bit boundary.\r
604 //\r
605 ASSERT ((Port & 1) == 0);\r
606 IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint16, Count, Buffer);\r
607}\r
608\r
609/**\r
610 Reads a 32-bit I/O port fifo into a block of memory.\r
611\r
612 Reads the 32-bit I/O fifo port specified by Port.\r
613 The port is read Count times, and the read data is\r
614 stored in the provided Buffer.\r
615\r
616 This function must guarantee that all I/O read and write operations are\r
617 serialized.\r
618\r
619 If 32-bit I/O port operations are not supported, then ASSERT().\r
620\r
621 @param Port The I/O port to read.\r
622 @param Count The number of times to read I/O port.\r
623 @param Buffer The buffer to store the read data into.\r
624\r
625**/\r
626VOID\r
627EFIAPI\r
628IoReadFifo32 (\r
629 IN UINTN Port,\r
630 IN UINTN Count,\r
631 OUT VOID *Buffer\r
632 )\r
633{\r
634 //\r
635 // Make sure Port is aligned on a 32-bit boundary.\r
636 //\r
637 ASSERT ((Port & 3) == 0);\r
638 IoReadFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);\r
639}\r
640\r
641/**\r
642 Writes a block of memory into a 32-bit I/O port fifo.\r
643\r
644 Writes the 32-bit I/O fifo port specified by Port.\r
645 The port is written Count times, and the write data is\r
646 retrieved from the provided Buffer.\r
647\r
648 This function must guarantee that all I/O write and write operations are\r
649 serialized.\r
650\r
651 If 32-bit I/O port operations are not supported, then ASSERT().\r
652\r
653 @param Port The I/O port to write.\r
654 @param Count The number of times to write I/O port.\r
655 @param Buffer The buffer to retrieve the write data from.\r
656\r
657**/\r
658VOID\r
659EFIAPI\r
660IoWriteFifo32 (\r
661 IN UINTN Port,\r
662 IN UINTN Count,\r
663 IN VOID *Buffer\r
664 )\r
665{\r
666 //\r
667 // Make sure Port is aligned on a 32-bit boundary.\r
668 //\r
669 ASSERT ((Port & 3) == 0);\r
670 IoWriteFifoWorker (Port, EfiCpuIoWidthFifoUint32, Count, Buffer);\r
671}\r
672\r
863be5d0 673/**\r
674 Reads an 8-bit MMIO register.\r
675\r
676 Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r
677 returned. This function must guarantee that all MMIO read and write\r
678 operations are serialized.\r
679\r
680 If 8-bit MMIO register operations are not supported, then ASSERT().\r
681\r
682 @param Address The MMIO register to read.\r
683\r
684 @return The value read.\r
685\r
686**/\r
687UINT8\r
688EFIAPI\r
689MmioRead8 (\r
690 IN UINTN Address\r
691 )\r
692{\r
693 return (UINT8)MmioReadWorker (Address, EfiCpuIoWidthUint8);\r
694}\r
695\r
696/**\r
697 Writes an 8-bit MMIO register.\r
698\r
699 Writes the 8-bit MMIO register specified by Address with the value specified\r
700 by Value and returns Value. This function must guarantee that all MMIO read\r
701 and write operations are serialized.\r
702\r
703 If 8-bit MMIO register operations are not supported, then ASSERT().\r
704\r
705 @param Address The MMIO register to write.\r
706 @param Value The value to write to the MMIO register.\r
707\r
708**/\r
709UINT8\r
710EFIAPI\r
711MmioWrite8 (\r
712 IN UINTN Address,\r
713 IN UINT8 Value\r
714 )\r
715{\r
716 return (UINT8)MmioWriteWorker (Address, EfiCpuIoWidthUint8, Value);\r
717}\r
718\r
719/**\r
720 Reads a 16-bit MMIO register.\r
721\r
722 Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r
723 returned. This function must guarantee that all MMIO read and write\r
724 operations are serialized.\r
725\r
726 If 16-bit MMIO register operations are not supported, then ASSERT().\r
727\r
728 @param Address The MMIO register to read.\r
729\r
730 @return The value read.\r
731\r
732**/\r
733UINT16\r
734EFIAPI\r
735MmioRead16 (\r
736 IN UINTN Address\r
737 )\r
738{\r
739 //\r
740 // Make sure Address is aligned on a 16-bit boundary.\r
741 //\r
742 ASSERT ((Address & 1) == 0);\r
743 return (UINT16)MmioReadWorker (Address, EfiCpuIoWidthUint16);\r
744}\r
745\r
746/**\r
747 Writes a 16-bit MMIO register.\r
748\r
749 Writes the 16-bit MMIO register specified by Address with the value specified\r
750 by Value and returns Value. This function must guarantee that all MMIO read\r
751 and write operations are serialized.\r
752\r
753 If 16-bit MMIO register operations are not supported, then ASSERT().\r
754\r
755 @param Address The MMIO register to write.\r
756 @param Value The value to write to the MMIO register.\r
757\r
758**/\r
759UINT16\r
760EFIAPI\r
761MmioWrite16 (\r
762 IN UINTN Address,\r
763 IN UINT16 Value\r
764 )\r
765{\r
766 //\r
767 // Make sure Address is aligned on a 16-bit boundary.\r
768 //\r
769 ASSERT ((Address & 1) == 0);\r
770 return (UINT16)MmioWriteWorker (Address, EfiCpuIoWidthUint16, Value);\r
771}\r
772\r
773/**\r
774 Reads a 32-bit MMIO register.\r
775\r
776 Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r
777 returned. This function must guarantee that all MMIO read and write\r
778 operations are serialized.\r
779\r
780 If 32-bit MMIO register operations are not supported, then ASSERT().\r
781\r
782 @param Address The MMIO register to read.\r
783\r
784 @return The value read.\r
785\r
786**/\r
787UINT32\r
788EFIAPI\r
789MmioRead32 (\r
790 IN UINTN Address\r
791 )\r
792{\r
793 //\r
794 // Make sure Address is aligned on a 32-bit boundary.\r
795 //\r
796 ASSERT ((Address & 3) == 0);\r
797 return (UINT32)MmioReadWorker (Address, EfiCpuIoWidthUint32);\r
798}\r
799\r
800/**\r
801 Writes a 32-bit MMIO register.\r
802\r
803 Writes the 32-bit MMIO register specified by Address with the value specified\r
804 by Value and returns Value. This function must guarantee that all MMIO read\r
805 and write operations are serialized.\r
806\r
807 If 32-bit MMIO register operations are not supported, then ASSERT().\r
808\r
809 @param Address The MMIO register to write.\r
810 @param Value The value to write to the MMIO register.\r
811\r
812**/\r
813UINT32\r
814EFIAPI\r
815MmioWrite32 (\r
816 IN UINTN Address,\r
817 IN UINT32 Value\r
818 )\r
819{\r
820 //\r
821 // Make sure Address is aligned on a 32-bit boundary.\r
822 //\r
823 ASSERT ((Address & 3) == 0);\r
824 return (UINT32)MmioWriteWorker (Address, EfiCpuIoWidthUint32, Value);\r
825}\r
826\r
827/**\r
828 Reads a 64-bit MMIO register.\r
829\r
830 Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r
831 returned. This function must guarantee that all MMIO read and write\r
832 operations are serialized.\r
833\r
834 If 64-bit MMIO register operations are not supported, then ASSERT().\r
835\r
836 @param Address The MMIO register to read.\r
837\r
838 @return The value read.\r
839\r
840**/\r
841UINT64\r
842EFIAPI\r
843MmioRead64 (\r
844 IN UINTN Address\r
845 )\r
846{\r
847 //\r
848 // Make sure Address is aligned on a 64-bit boundary.\r
849 //\r
850 ASSERT ((Address & 7) == 0);\r
851 return (UINT64)MmioReadWorker (Address, EfiCpuIoWidthUint64);\r
852}\r
853\r
854/**\r
855 Writes a 64-bit MMIO register.\r
856\r
857 Writes the 64-bit MMIO register specified by Address with the value specified\r
858 by Value and returns Value. This function must guarantee that all MMIO read\r
859 and write operations are serialized.\r
860\r
861 If 64-bit MMIO register operations are not supported, then ASSERT().\r
862\r
863 @param Address The MMIO register to write.\r
864 @param Value The value to write to the MMIO register.\r
865\r
866**/\r
867UINT64\r
868EFIAPI\r
869MmioWrite64 (\r
870 IN UINTN Address,\r
871 IN UINT64 Value\r
872 )\r
873{\r
874 //\r
875 // Make sure Address is aligned on a 64-bit boundary.\r
876 //\r
877 ASSERT ((Address & 7) == 0);\r
878 return (UINT64)MmioWriteWorker (Address, EfiCpuIoWidthUint64, Value);\r
879}\r