projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| dd51a993 | 1 | /** @file\r |
| 484c7785 | 2 | Implementation of SmBusLib class library for DXE phase.\r |
| dd51a993 | 3 | \r |
| 9095d37b | 4 | Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r |
| 9344f092 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| dd51a993 | 6 | \r |
| 7 | \r | |
| dd51a993 | 8 | **/\r |
| 9 | \r | |
| 10 | #include "InternalSmbusLib.h"\r | |
| 11 | \r | |
| 12 | /**\r | |
| 13 | Executes an SMBUS quick read command.\r | |
| 14 | \r | |
| 15 | Executes an SMBUS quick read command on the SMBUS device specified by SmBusAddress.\r | |
| 16 | Only the SMBUS slave address field of SmBusAddress is required.\r | |
| 17 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 18 | If PEC is set in SmBusAddress, then ASSERT().\r | |
| 19 | If Command in SmBusAddress is not zero, then ASSERT().\r | |
| 20 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 21 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 22 | \r | |
| 2fc59a00 | 23 | @param SmBusAddress The address that encodes the SMBUS Slave Address,\r |
| 71871514 | 24 | SMBUS Command, SMBUS Data Length, and PEC.\r |
| 25 | @param Status Return status for the executed command.\r | |
| 26 | This is an optional parameter and may be NULL.\r | |
| 58380e9c | 27 | RETURN_SUCCESS: The SMBUS command was executed.\r |
| 9095d37b LG |
28 | RETURN_TIMEOUT: A timeout occurred while executing the\r |
| 29 | SMBUS command.\r | |
| 30 | RETURN_DEVICE_ERROR: The request was not\r | |
| 31 | completed because a failure reflected in the Host Status\r | |
| 32 | Register bit. Device errors are a result of a transaction\r | |
| 33 | collision, illegal command field, unclaimed cycle (host\r | |
| 34 | initiated), or bus errors (collisions).\r | |
| 58380e9c | 35 | RETURN_UNSUPPORTED: The SMBus operation is not supported.\r |
| dd51a993 | 36 | \r |
| 37 | **/\r | |
| 38 | VOID\r | |
| 39 | EFIAPI\r | |
| 40 | SmBusQuickRead (\r | |
| 2f88bd3a MK |
41 | IN UINTN SmBusAddress,\r |
| 42 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| dd51a993 | 43 | )\r |
| 44 | {\r | |
| 45 | ASSERT (!SMBUS_LIB_PEC (SmBusAddress));\r | |
| 46 | ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);\r | |
| 47 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 2d8debe7 | 48 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
| dd51a993 | 49 | \r |
| 50 | InternalSmBusExec (EfiSmbusQuickRead, SmBusAddress, 0, NULL, Status);\r | |
| 51 | }\r | |
| 52 | \r | |
| 53 | /**\r | |
| 54 | Executes an SMBUS quick write command.\r | |
| 55 | \r | |
| 56 | Executes an SMBUS quick write command on the SMBUS device specified by SmBusAddress.\r | |
| 57 | Only the SMBUS slave address field of SmBusAddress is required.\r | |
| 58 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 59 | If PEC is set in SmBusAddress, then ASSERT().\r | |
| 60 | If Command in SmBusAddress is not zero, then ASSERT().\r | |
| 61 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 62 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 63 | \r | |
| 2fc59a00 | 64 | @param SmBusAddress The address that encodes the SMBUS Slave Address,\r |
| 71871514 | 65 | SMBUS Command, SMBUS Data Length, and PEC.\r |
| 66 | @param Status Return status for the executed command.\r | |
| 67 | This is an optional parameter and may be NULL.\r | |
| 58380e9c | 68 | RETURN_SUCCESS: The SMBUS command was executed.\r |
| 9095d37b | 69 | RETURN_TIMEOUT: A timeout occurred while executing the\r |
| 58380e9c | 70 | SMBUS command.\r |
| 9095d37b LG |
71 | RETURN_DEVICE_ERROR: The request was not completed because\r |
| 72 | a failure reflected in the Host Status Register bit.\r | |
| 73 | Device errors are a result of a transaction collision,\r | |
| 74 | illegal command field, unclaimed cycle (host initiated),\r | |
| 58380e9c | 75 | or bus errors (collisions).\r |
| 76 | RETURN_UNSUPPORTED: The SMBus operation is not supported.\r | |
| dd51a993 | 77 | \r |
| 78 | **/\r | |
| 79 | VOID\r | |
| 80 | EFIAPI\r | |
| 81 | SmBusQuickWrite (\r | |
| 2f88bd3a MK |
82 | IN UINTN SmBusAddress,\r |
| 83 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| dd51a993 | 84 | )\r |
| 85 | {\r | |
| 86 | ASSERT (!SMBUS_LIB_PEC (SmBusAddress));\r | |
| 87 | ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);\r | |
| 88 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 2d8debe7 | 89 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
| dd51a993 | 90 | \r |
| 91 | InternalSmBusExec (EfiSmbusQuickWrite, SmBusAddress, 0, NULL, Status);\r | |
| 92 | }\r | |
| 93 | \r | |
| 94 | /**\r | |
| 95 | Executes an SMBUS receive byte command.\r | |
| 96 | \r | |
| 97 | Executes an SMBUS receive byte command on the SMBUS device specified by SmBusAddress.\r | |
| 98 | Only the SMBUS slave address field of SmBusAddress is required.\r | |
| 99 | The byte received from the SMBUS is returned.\r | |
| 100 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 101 | If Command in SmBusAddress is not zero, then ASSERT().\r | |
| 102 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 103 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 104 | \r | |
| 2fc59a00 | 105 | @param SmBusAddress The address that encodes the SMBUS Slave Address,\r |
| 71871514 | 106 | SMBUS Command, SMBUS Data Length, and PEC.\r |
| 107 | @param Status Return status for the executed command.\r | |
| 108 | This is an optional parameter and may be NULL.\r | |
| 58380e9c | 109 | RETURN_SUCCESS: The SMBUS command was executed.\r |
| 9095d37b | 110 | RETURN_TIMEOUT: A timeout occurred while executing the\r |
| 58380e9c | 111 | SMBUS command.\r |
| 9095d37b | 112 | RETURN_DEVICE_ERROR: The request was not completed because\r |
| 58380e9c | 113 | a failure reflected in the Host Status Register bit. Device\r |
| 9095d37b LG |
114 | errors are a result of a transaction collision, illegal\r |
| 115 | command field, unclaimed cycle(host initiated), or bus\r | |
| 58380e9c | 116 | errors (collisions).\r |
| 117 | RETURN_CRC_ERROR: The checksum is not correct. (PEC is incorrect.)\r | |
| 118 | RETURN_UNSUPPORTED: The SMBus operation is not supported.\r | |
| dd51a993 | 119 | \r |
| 120 | @return The byte received from the SMBUS.\r | |
| 121 | \r | |
| 122 | **/\r | |
| 123 | UINT8\r | |
| 124 | EFIAPI\r | |
| 125 | SmBusReceiveByte (\r | |
| 126 | IN UINTN SmBusAddress,\r | |
| 127 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 128 | )\r | |
| 129 | {\r | |
| 2f88bd3a | 130 | UINT8 Byte;\r |
| dd51a993 | 131 | \r |
| 132 | ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);\r | |
| 133 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 2d8debe7 | 134 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
| dd51a993 | 135 | \r |
| 136 | InternalSmBusExec (EfiSmbusReceiveByte, SmBusAddress, 1, &Byte, Status);\r | |
| 137 | \r | |
| 138 | return Byte;\r | |
| 139 | }\r | |
| 140 | \r | |
| 141 | /**\r | |
| 142 | Executes an SMBUS send byte command.\r | |
| 143 | \r | |
| 144 | Executes an SMBUS send byte command on the SMBUS device specified by SmBusAddress.\r | |
| 145 | The byte specified by Value is sent.\r | |
| 146 | Only the SMBUS slave address field of SmBusAddress is required. Value is returned.\r | |
| 147 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 148 | If Command in SmBusAddress is not zero, then ASSERT().\r | |
| 149 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 150 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 151 | \r | |
| 2fc59a00 | 152 | @param SmBusAddress The address that encodes the SMBUS Slave Address,\r |
| 71871514 | 153 | SMBUS Command, SMBUS Data Length, and PEC.\r |
| 154 | @param Value The 8-bit value to send.\r | |
| 155 | @param Status Return status for the executed command.\r | |
| 156 | This is an optional parameter and may be NULL.\r | |
| 58380e9c | 157 | RETURN_SUCCESS: The SMBUS command was executed.\r |
| 9095d37b | 158 | RETURN_TIMEOUT: A timeout occurred while executing the\r |
| 58380e9c | 159 | SMBUS command.\r |
| 160 | RETURN_DEVICE_ERROR: The request was not completed because\r | |
| 9095d37b LG |
161 | a failure reflected in the Host Status Register bit. Device\r |
| 162 | errors are a result of a transaction collision, illegal\r | |
| 163 | command field, unclaimed cycle(host initiated), or bus\r | |
| 58380e9c | 164 | errors (collisions).\r |
| 165 | RETURN_CRC_ERROR: The checksum is not correct (PEC is incorrect)\r | |
| 166 | RETURN_UNSUPPORTED: The SMBus operation is not supported.\r | |
| dd51a993 | 167 | \r |
| 168 | @return The parameter of Value.\r | |
| 169 | \r | |
| 170 | **/\r | |
| 171 | UINT8\r | |
| 172 | EFIAPI\r | |
| 173 | SmBusSendByte (\r | |
| 174 | IN UINTN SmBusAddress,\r | |
| 175 | IN UINT8 Value,\r | |
| 176 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 177 | )\r | |
| 178 | {\r | |
| 2f88bd3a | 179 | UINT8 Byte;\r |
| dd51a993 | 180 | \r |
| 181 | ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);\r | |
| 182 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 2d8debe7 | 183 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
| dd51a993 | 184 | \r |
| 2f88bd3a | 185 | Byte = Value;\r |
| dd51a993 | 186 | InternalSmBusExec (EfiSmbusSendByte, SmBusAddress, 1, &Byte, Status);\r |
| 187 | \r | |
| 188 | return Value;\r | |
| 189 | }\r | |
| 190 | \r | |
| 191 | /**\r | |
| 192 | Executes an SMBUS read data byte command.\r | |
| 193 | \r | |
| 194 | Executes an SMBUS read data byte command on the SMBUS device specified by SmBusAddress.\r | |
| 195 | Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r | |
| 196 | The 8-bit value read from the SMBUS is returned.\r | |
| 197 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 198 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 199 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 200 | \r | |
| 58380e9c | 201 | @param SmBusAddress The address that encodes the SMBUS Slave Address,\r |
| 202 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
| 71871514 | 203 | @param Status Return status for the executed command.\r |
| 204 | This is an optional parameter and may be NULL.\r | |
| 58380e9c | 205 | RETURN_SUCCESS: The SMBUS command was executed.\r |
| 9095d37b | 206 | RETURN_TIMEOUT: A timeout occurred while executing the\r |
| 58380e9c | 207 | SMBUS command.\r |
| 9095d37b LG |
208 | RETURN_DEVICE_ERROR: The request was not completed because\r |
| 209 | a failurereflected in the Host Status Register bit. Device\r | |
| 210 | errors are a result of a transaction collision, illegal\r | |
| 211 | command field, unclaimed cycle (host initiated), or bus\r | |
| 58380e9c | 212 | errors (collisions).\r |
| 213 | RETURN_CRC_ERROR: The checksum is not correct (PEC is incorrect)\r | |
| 214 | RETURN_UNSUPPORTED: The SMBus operation is not supported.\r | |
| dd51a993 | 215 | \r |
| 216 | @return The byte read from the SMBUS.\r | |
| 217 | \r | |
| 218 | **/\r | |
| 219 | UINT8\r | |
| 220 | EFIAPI\r | |
| 221 | SmBusReadDataByte (\r | |
| 222 | IN UINTN SmBusAddress,\r | |
| 223 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 224 | )\r | |
| 225 | {\r | |
| 2f88bd3a | 226 | UINT8 Byte;\r |
| dd51a993 | 227 | \r |
| 228 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 2d8debe7 | 229 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
| dd51a993 | 230 | \r |
| 231 | InternalSmBusExec (EfiSmbusReadByte, SmBusAddress, 1, &Byte, Status);\r | |
| bad46384 | 232 | \r |
| dd51a993 | 233 | return Byte;\r |
| 234 | }\r | |
| 235 | \r | |
| 236 | /**\r | |
| 237 | Executes an SMBUS write data byte command.\r | |
| 238 | \r | |
| 239 | Executes an SMBUS write data byte command on the SMBUS device specified by SmBusAddress.\r | |
| 240 | The 8-bit value specified by Value is written.\r | |
| 241 | Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r | |
| 242 | Value is returned.\r | |
| 243 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 244 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 245 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 246 | \r | |
| 2fc59a00 | 247 | @param SmBusAddress The address that encodes the SMBUS Slave Address,\r |
| 71871514 | 248 | SMBUS Command, SMBUS Data Length, and PEC.\r |
| 249 | @param Value The 8-bit value to write.\r | |
| 250 | @param Status Return status for the executed command.\r | |
| 251 | This is an optional parameter and may be NULL.\r | |
| 58380e9c | 252 | RETURN_SUCCESS: The SMBUS command was executed.\r |
| 9095d37b | 253 | RETURN_TIMEOUT: A timeout occurred while executing the\r |
| 58380e9c | 254 | SMBUS command.\r |
| 9095d37b LG |
255 | RETURN_DEVICE_ERROR: The request was not completed because\r |
| 256 | a failure reflected in the Host Status Register bit. Device\r | |
| 257 | errors are a result of a transaction collision, illegal\r | |
| 258 | command field, unclaimed cycle host initiated), or bus\r | |
| 58380e9c | 259 | errors (collisions).\r |
| 260 | RETURN_CRC_ERROR: The checksum is not correct. (PEC is incorrect.)\r | |
| 261 | RETURN_UNSUPPORTED: The SMBus operation is not supported.\r | |
| dd51a993 | 262 | \r |
| 263 | @return The parameter of Value.\r | |
| 264 | \r | |
| 265 | **/\r | |
| 266 | UINT8\r | |
| 267 | EFIAPI\r | |
| 268 | SmBusWriteDataByte (\r | |
| 269 | IN UINTN SmBusAddress,\r | |
| 270 | IN UINT8 Value,\r | |
| 271 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 272 | )\r | |
| 273 | {\r | |
| 2f88bd3a | 274 | UINT8 Byte;\r |
| dd51a993 | 275 | \r |
| 276 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 2d8debe7 | 277 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
| dd51a993 | 278 | \r |
| 279 | Byte = Value;\r | |
| 280 | InternalSmBusExec (EfiSmbusWriteByte, SmBusAddress, 1, &Byte, Status);\r | |
| bad46384 | 281 | \r |
| dd51a993 | 282 | return Value;\r |
| 283 | }\r | |
| 284 | \r | |
| 285 | /**\r | |
| 286 | Executes an SMBUS read data word command.\r | |
| 287 | \r | |
| 288 | Executes an SMBUS read data word command on the SMBUS device specified by SmBusAddress.\r | |
| 289 | Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r | |
| 290 | The 16-bit value read from the SMBUS is returned.\r | |
| 291 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 292 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 293 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 9095d37b | 294 | \r |
| 2fc59a00 | 295 | @param SmBusAddress The address that encodes the SMBUS Slave Address,\r |
| 71871514 | 296 | SMBUS Command, SMBUS Data Length, and PEC.\r |
| 297 | @param Status Return status for the executed command.\r | |
| 298 | This is an optional parameter and may be NULL.\r | |
| 58380e9c | 299 | RETURN_SUCCESS: The SMBUS command was executed.\r |
| 9095d37b | 300 | RETURN_TIMEOUT: A timeout occurred while executing the\r |
| 58380e9c | 301 | SMBUS command.\r |
| 9095d37b LG |
302 | RETURN_DEVICE_ERROR: The request was not completed because\r |
| 303 | a failure reflected in the Host Status Register bit.\r | |
| 304 | Device errors are a result of a transaction collision,\r | |
| 305 | illegal command field, unclaimed cycle (host initiated),\r | |
| 58380e9c | 306 | or bus errors (collisions).\r |
| 9095d37b | 307 | RETURN_CRC_ERROR: The checksum is not correct. (PEC is\r |
| 58380e9c | 308 | incorrect.)\r |
| 309 | RETURN_UNSUPPORTED: The SMBus operation is not supported.\r | |
| dd51a993 | 310 | \r |
| 311 | @return The byte read from the SMBUS.\r | |
| 312 | \r | |
| 313 | **/\r | |
| 314 | UINT16\r | |
| 315 | EFIAPI\r | |
| 316 | SmBusReadDataWord (\r | |
| 317 | IN UINTN SmBusAddress,\r | |
| 318 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 319 | )\r | |
| 320 | {\r | |
| 321 | UINT16 Word;\r | |
| 322 | \r | |
| 323 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 2d8debe7 | 324 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
| dd51a993 | 325 | \r |
| 326 | InternalSmBusExec (EfiSmbusReadWord, SmBusAddress, 2, &Word, Status);\r | |
| bad46384 | 327 | \r |
| dd51a993 | 328 | return Word;\r |
| 329 | }\r | |
| 330 | \r | |
| 331 | /**\r | |
| 332 | Executes an SMBUS write data word command.\r | |
| 333 | \r | |
| 334 | Executes an SMBUS write data word command on the SMBUS device specified by SmBusAddress.\r | |
| 335 | The 16-bit value specified by Value is written.\r | |
| 336 | Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r | |
| 337 | Value is returned.\r | |
| 338 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 339 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 340 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 341 | \r | |
| 2fc59a00 | 342 | @param SmBusAddress The address that encodes the SMBUS Slave Address,\r |
| 71871514 | 343 | SMBUS Command, SMBUS Data Length, and PEC.\r |
| 344 | @param Value The 16-bit value to write.\r | |
| 345 | @param Status Return status for the executed command.\r | |
| 346 | This is an optional parameter and may be NULL.\r | |
| 58380e9c | 347 | RETURN_SUCCESS: The SMBUS command was executed.\r |
| 9095d37b | 348 | RETURN_TIMEOUT: A timeout occurred while executing the SMBUS\r |
| 58380e9c | 349 | command.\r |
| 9095d37b LG |
350 | RETURN_DEVICE_ERROR: The request was not completed because\r |
| 351 | a failure reflected in the Host Status Register bit.\r | |
| 352 | Device errors are a result of a transaction collision,\r | |
| 353 | illegal command field, unclaimed cycle (host initiated),\r | |
| 58380e9c | 354 | or bus errors (collisions).\r |
| 9095d37b | 355 | RETURN_CRC_ERROR: The checksum is not correct.\r |
| 58380e9c | 356 | (PEC is incorrect.)\r |
| 357 | RETURN_UNSUPPORTED: The SMBus operation is not supported.\r | |
| dd51a993 | 358 | \r |
| 359 | @return The parameter of Value.\r | |
| 360 | \r | |
| 361 | **/\r | |
| 362 | UINT16\r | |
| 363 | EFIAPI\r | |
| 364 | SmBusWriteDataWord (\r | |
| 365 | IN UINTN SmBusAddress,\r | |
| 366 | IN UINT16 Value,\r | |
| 367 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 368 | )\r | |
| 369 | {\r | |
| 370 | UINT16 Word;\r | |
| 371 | \r | |
| 372 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 2d8debe7 | 373 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
| dd51a993 | 374 | \r |
| 375 | Word = Value;\r | |
| 376 | InternalSmBusExec (EfiSmbusWriteWord, SmBusAddress, 2, &Word, Status);\r | |
| 377 | \r | |
| 378 | return Value;\r | |
| 379 | }\r | |
| 380 | \r | |
| 381 | /**\r | |
| 382 | Executes an SMBUS process call command.\r | |
| 383 | \r | |
| 384 | Executes an SMBUS process call command on the SMBUS device specified by SmBusAddress.\r | |
| 385 | The 16-bit value specified by Value is written.\r | |
| 386 | Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r | |
| 387 | The 16-bit value returned by the process call command is returned.\r | |
| 388 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 389 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 390 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 391 | \r | |
| 2fc59a00 | 392 | @param SmBusAddress The address that encodes the SMBUS Slave Address,\r |
| 71871514 | 393 | SMBUS Command, SMBUS Data Length, and PEC.\r |
| 394 | @param Value The 16-bit value to write.\r | |
| 395 | @param Status Return status for the executed command.\r | |
| 396 | This is an optional parameter and may be NULL.\r | |
| 58380e9c | 397 | RETURN_SUCCESS: The SMBUS command was executed.\r |
| 9095d37b | 398 | RETURN_TIMEOUT: A timeout occurred while executing the\r |
| 58380e9c | 399 | SMBUS command.\r |
| 9095d37b LG |
400 | RETURN_DEVICE_ERROR: The request was not completed because\r |
| 401 | a failure reflected in the Host Status Register bit.\r | |
| 402 | Device errors are a result of a transaction collision,\r | |
| 403 | illegal command field, unclaimed cycle (host initiated),\r | |
| 58380e9c | 404 | or bus errors (collisions).\r |
| 9095d37b | 405 | RETURN_CRC_ERROR: The checksum is not correct. (PEC is\r |
| 58380e9c | 406 | incorrect.)\r |
| 407 | RETURN_UNSUPPORTED: The SMBus operation is not supported.\r | |
| dd51a993 | 408 | \r |
| 409 | @return The 16-bit value returned by the process call command.\r | |
| 410 | \r | |
| 411 | **/\r | |
| 412 | UINT16\r | |
| 413 | EFIAPI\r | |
| 414 | SmBusProcessCall (\r | |
| 415 | IN UINTN SmBusAddress,\r | |
| 416 | IN UINT16 Value,\r | |
| 417 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 418 | )\r | |
| 419 | {\r | |
| 420 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 2d8debe7 | 421 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
| dd51a993 | 422 | \r |
| 423 | InternalSmBusExec (EfiSmbusProcessCall, SmBusAddress, 2, &Value, Status);\r | |
| bad46384 | 424 | \r |
| dd51a993 | 425 | return Value;\r |
| 426 | }\r | |
| 427 | \r | |
| 428 | /**\r | |
| 429 | Executes an SMBUS read block command.\r | |
| 430 | \r | |
| 431 | Executes an SMBUS read block command on the SMBUS device specified by SmBusAddress.\r | |
| 432 | Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r | |
| 433 | Bytes are read from the SMBUS and stored in Buffer.\r | |
| 434 | The number of bytes read is returned, and will never return a value larger than 32-bytes.\r | |
| 435 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 436 | It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.\r | |
| 437 | SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.\r | |
| 438 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 439 | If Buffer is NULL, then ASSERT().\r | |
| 440 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 441 | \r | |
| 2fc59a00 | 442 | @param SmBusAddress The address that encodes the SMBUS Slave Address,\r |
| 71871514 | 443 | SMBUS Command, SMBUS Data Length, and PEC.\r |
| 9095d37b | 444 | @param Buffer The pointer to the buffer to store the bytes read from\r |
| 58380e9c | 445 | the SMBUS.\r |
| 71871514 | 446 | @param Status Return status for the executed command.\r |
| 447 | This is an optional parameter and may be NULL.\r | |
| 58380e9c | 448 | RETURN_SUCCESS: The SMBUS command was executed.\r |
| 9095d37b | 449 | RETURN_TIMEOUT: A timeout occurred while executing the SMBUS\r |
| 58380e9c | 450 | command.\r |
| 9095d37b LG |
451 | RETURN_DEVICE_ERROR: The request was not completed because\r |
| 452 | a failure reflected in the Host Status Register bit. Device\r | |
| 453 | errors are a result of a transaction collision, illegal\r | |
| 454 | command field, unclaimed cycle (host initiated), or bus\r | |
| 58380e9c | 455 | errors (collisions).\r |
| 9095d37b | 456 | RETURN_CRC_ERROR: The checksum is not correct. (PEC is\r |
| 58380e9c | 457 | incorrect.)\r |
| 458 | RETURN_UNSUPPORTED: The SMBus operation is not supported.\r | |
| dd51a993 | 459 | \r |
| 460 | @return The number of bytes read.\r | |
| 461 | \r | |
| 462 | **/\r | |
| 463 | UINTN\r | |
| 464 | EFIAPI\r | |
| 465 | SmBusReadBlock (\r | |
| 466 | IN UINTN SmBusAddress,\r | |
| 467 | OUT VOID *Buffer,\r | |
| 468 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 469 | )\r | |
| 470 | {\r | |
| 471 | ASSERT (Buffer != NULL);\r | |
| 472 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 2d8debe7 | 473 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
| dd51a993 | 474 | \r |
| 475 | return InternalSmBusExec (EfiSmbusReadBlock, SmBusAddress, 0x20, Buffer, Status);\r | |
| 476 | }\r | |
| 477 | \r | |
| 478 | /**\r | |
| 479 | Executes an SMBUS write block command.\r | |
| 480 | \r | |
| 481 | Executes an SMBUS write block command on the SMBUS device specified by SmBusAddress.\r | |
| 482 | The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.\r | |
| 483 | Bytes are written to the SMBUS from Buffer.\r | |
| 484 | The number of bytes written is returned, and will never return a value larger than 32-bytes.\r | |
| 9095d37b | 485 | If Status is not NULL, then the status of the executed command is returned in Status.\r |
| dd51a993 | 486 | If Length in SmBusAddress is zero or greater than 32, then ASSERT().\r |
| 487 | If Buffer is NULL, then ASSERT().\r | |
| 488 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 489 | \r | |
| 2fc59a00 | 490 | @param SmBusAddress The address that encodes the SMBUS Slave Address,\r |
| 71871514 | 491 | MBUS Command, SMBUS Data Length, and PEC.\r |
| 9095d37b | 492 | @param Buffer The pointer to the buffer to store the bytes read from\r |
| 58380e9c | 493 | the SMBUS.\r |
| 71871514 | 494 | @param Status Return status for the executed command.\r |
| 495 | This is an optional parameter and may be NULL.\r | |
| 9095d37b | 496 | RETURN_TIMEOUT: A timeout occurred while executing the\r |
| 58380e9c | 497 | SMBUS command.\r |
| 9095d37b LG |
498 | RETURN_DEVICE_ERROR: The request was not completed because\r |
| 499 | a failure reflected in the Host Status Register bit. Device\r | |
| 500 | errors are a result of a transaction collision, illegal\r | |
| 501 | command field, unclaimed cycle (host initiated), or bus\r | |
| 58380e9c | 502 | errors (collisions).\r |
| 9095d37b | 503 | RETURN_CRC_ERROR: The checksum is not correct. (PEC is\r |
| 58380e9c | 504 | incorrect.)\r |
| 505 | RETURN_UNSUPPORTED: The SMBus operation is not supported.\r | |
| dd51a993 | 506 | \r |
| 507 | @return The number of bytes written.\r | |
| 508 | \r | |
| 509 | **/\r | |
| 510 | UINTN\r | |
| 511 | EFIAPI\r | |
| 512 | SmBusWriteBlock (\r | |
| 513 | IN UINTN SmBusAddress,\r | |
| 514 | OUT VOID *Buffer,\r | |
| 515 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 516 | )\r | |
| 517 | {\r | |
| 518 | UINTN Length;\r | |
| 519 | \r | |
| 520 | ASSERT (Buffer != NULL);\r | |
| 521 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) >= 1);\r | |
| 522 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) <= 32);\r | |
| 2d8debe7 | 523 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
| dd51a993 | 524 | \r |
| 525 | Length = SMBUS_LIB_LENGTH (SmBusAddress);\r | |
| 526 | return InternalSmBusExec (EfiSmbusWriteBlock, SmBusAddress, Length, Buffer, Status);\r | |
| 527 | }\r | |
| 528 | \r | |
| 529 | /**\r | |
| 530 | Executes an SMBUS block process call command.\r | |
| 531 | \r | |
| 532 | Executes an SMBUS block process call command on the SMBUS device specified by SmBusAddress.\r | |
| 533 | The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.\r | |
| 534 | Bytes are written to the SMBUS from WriteBuffer. Bytes are then read from the SMBUS into ReadBuffer.\r | |
| 535 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 536 | It is the caller's responsibility to make sure ReadBuffer is large enough for the total number of bytes read.\r | |
| 537 | SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.\r | |
| 538 | If Length in SmBusAddress is zero or greater than 32, then ASSERT().\r | |
| 539 | If WriteBuffer is NULL, then ASSERT().\r | |
| 540 | If ReadBuffer is NULL, then ASSERT().\r | |
| 541 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 542 | \r | |
| 2fc59a00 | 543 | @param SmBusAddress The address that encodes the SMBUS Slave Address,\r |
| 71871514 | 544 | SMBUS Command, SMBUS Data Length, and PEC.\r |
| 2fc59a00 | 545 | @param WriteBuffer The pointer to the buffer of bytes to write to the SMBUS.\r |
| 546 | @param ReadBuffer The pointer to the buffer of bytes to read from the SMBUS.\r | |
| 71871514 | 547 | @param Status Return status for the executed command.\r |
| 548 | This is an optional parameter and may be NULL.\r | |
| 9095d37b | 549 | RETURN_TIMEOUT: A timeout occurred while executing the\r |
| 58380e9c | 550 | SMBUS command.\r |
| 9095d37b LG |
551 | RETURN_DEVICE_ERROR: The request was not completed because\r |
| 552 | a failure reflected in the Host Status Register bit. Device\r | |
| 553 | errors are a result of a transaction collision, illegal\r | |
| 554 | command field, unclaimed cycle (host initiated), or bus\r | |
| 58380e9c | 555 | errors (collisions).\r |
| 9095d37b | 556 | RETURN_CRC_ERROR: The checksum is not correct. (PEC is\r |
| 58380e9c | 557 | incorrect.)\r |
| 558 | RETURN_UNSUPPORTED: The SMBus operation is not supported.\r | |
| dd51a993 | 559 | \r |
| 560 | @return The number of bytes written.\r | |
| 561 | \r | |
| 562 | **/\r | |
| 563 | UINTN\r | |
| 564 | EFIAPI\r | |
| 565 | SmBusBlockProcessCall (\r | |
| 566 | IN UINTN SmBusAddress,\r | |
| 567 | IN VOID *WriteBuffer,\r | |
| 568 | OUT VOID *ReadBuffer,\r | |
| 569 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 570 | )\r | |
| 571 | {\r | |
| 2f88bd3a | 572 | UINTN Length;\r |
| dd51a993 | 573 | \r |
| 574 | ASSERT (WriteBuffer != NULL);\r | |
| 575 | ASSERT (ReadBuffer != NULL);\r | |
| 576 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) >= 1);\r | |
| 577 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) <= 32);\r | |
| 2d8debe7 | 578 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
| dd51a993 | 579 | \r |
| 580 | Length = SMBUS_LIB_LENGTH (SmBusAddress);\r | |
| 581 | //\r | |
| 582 | // Assuming that ReadBuffer is large enough to save another memory copy.\r | |
| 583 | //\r | |
| 584 | ReadBuffer = CopyMem (ReadBuffer, WriteBuffer, Length);\r | |
| 585 | return InternalSmBusExec (EfiSmbusBWBRProcessCall, SmBusAddress, Length, ReadBuffer, Status);\r | |
| 586 | }\r |