projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| dd51a993 | 1 | /** @file\r |
| 484c7785 | 2 | Implementation of SmBusLib class library for DXE phase.\r |
| dd51a993 | 3 | \r |
| 9095d37b | 4 | Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r |
| 19388d29 | 5 | This program and the accompanying materials\r |
| bad46384 | 6 | are licensed and made available under the terms and conditions of the BSD License\r |
| 7 | which accompanies this distribution. The full text of the license may be found at\r | |
| 58380e9c | 8 | http://opensource.org/licenses/bsd-license.php.\r |
| bad46384 | 9 | \r |
| 10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| dd51a993 | 12 | \r |
| 13 | \r | |
| dd51a993 | 14 | **/\r |
| 15 | \r | |
| 16 | #include "InternalSmbusLib.h"\r | |
| 17 | \r | |
| 18 | /**\r | |
| 19 | Executes an SMBUS quick read command.\r | |
| 20 | \r | |
| 21 | Executes an SMBUS quick read command on the SMBUS device specified by SmBusAddress.\r | |
| 22 | Only the SMBUS slave address field of SmBusAddress is required.\r | |
| 23 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 24 | If PEC is set in SmBusAddress, then ASSERT().\r | |
| 25 | If Command in SmBusAddress is not zero, then ASSERT().\r | |
| 26 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 27 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 28 | \r | |
| 2fc59a00 | 29 | @param SmBusAddress The address that encodes the SMBUS Slave Address,\r |
| 71871514 | 30 | SMBUS Command, SMBUS Data Length, and PEC.\r |
| 31 | @param Status Return status for the executed command.\r | |
| 32 | This is an optional parameter and may be NULL.\r | |
| 58380e9c | 33 | RETURN_SUCCESS: The SMBUS command was executed.\r |
| 9095d37b LG |
34 | RETURN_TIMEOUT: A timeout occurred while executing the\r |
| 35 | SMBUS command.\r | |
| 36 | RETURN_DEVICE_ERROR: The request was not\r | |
| 37 | completed because a failure reflected in the Host Status\r | |
| 38 | Register bit. Device errors are a result of a transaction\r | |
| 39 | collision, illegal command field, unclaimed cycle (host\r | |
| 40 | initiated), or bus errors (collisions).\r | |
| 58380e9c | 41 | RETURN_UNSUPPORTED: The SMBus operation is not supported.\r |
| dd51a993 | 42 | \r |
| 43 | **/\r | |
| 44 | VOID\r | |
| 45 | EFIAPI\r | |
| 46 | SmBusQuickRead (\r | |
| 47 | IN UINTN SmBusAddress,\r | |
| 48 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 49 | )\r | |
| 50 | {\r | |
| 51 | ASSERT (!SMBUS_LIB_PEC (SmBusAddress));\r | |
| 52 | ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);\r | |
| 53 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 2d8debe7 | 54 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
| dd51a993 | 55 | \r |
| 56 | InternalSmBusExec (EfiSmbusQuickRead, SmBusAddress, 0, NULL, Status);\r | |
| 57 | }\r | |
| 58 | \r | |
| 59 | /**\r | |
| 60 | Executes an SMBUS quick write command.\r | |
| 61 | \r | |
| 62 | Executes an SMBUS quick write command on the SMBUS device specified by SmBusAddress.\r | |
| 63 | Only the SMBUS slave address field of SmBusAddress is required.\r | |
| 64 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 65 | If PEC is set in SmBusAddress, then ASSERT().\r | |
| 66 | If Command in SmBusAddress is not zero, then ASSERT().\r | |
| 67 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 68 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 69 | \r | |
| 2fc59a00 | 70 | @param SmBusAddress The address that encodes the SMBUS Slave Address,\r |
| 71871514 | 71 | SMBUS Command, SMBUS Data Length, and PEC.\r |
| 72 | @param Status Return status for the executed command.\r | |
| 73 | This is an optional parameter and may be NULL.\r | |
| 58380e9c | 74 | RETURN_SUCCESS: The SMBUS command was executed.\r |
| 9095d37b | 75 | RETURN_TIMEOUT: A timeout occurred while executing the\r |
| 58380e9c | 76 | SMBUS command.\r |
| 9095d37b LG |
77 | RETURN_DEVICE_ERROR: The request was not completed because\r |
| 78 | a failure reflected in the Host Status Register bit.\r | |
| 79 | Device errors are a result of a transaction collision,\r | |
| 80 | illegal command field, unclaimed cycle (host initiated),\r | |
| 58380e9c | 81 | or bus errors (collisions).\r |
| 82 | RETURN_UNSUPPORTED: The SMBus operation is not supported.\r | |
| dd51a993 | 83 | \r |
| 84 | **/\r | |
| 85 | VOID\r | |
| 86 | EFIAPI\r | |
| 87 | SmBusQuickWrite (\r | |
| 88 | IN UINTN SmBusAddress,\r | |
| 89 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 90 | )\r | |
| 91 | {\r | |
| 92 | ASSERT (!SMBUS_LIB_PEC (SmBusAddress));\r | |
| 93 | ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);\r | |
| 94 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 2d8debe7 | 95 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
| dd51a993 | 96 | \r |
| 97 | InternalSmBusExec (EfiSmbusQuickWrite, SmBusAddress, 0, NULL, Status);\r | |
| 98 | }\r | |
| 99 | \r | |
| 100 | /**\r | |
| 101 | Executes an SMBUS receive byte command.\r | |
| 102 | \r | |
| 103 | Executes an SMBUS receive byte command on the SMBUS device specified by SmBusAddress.\r | |
| 104 | Only the SMBUS slave address field of SmBusAddress is required.\r | |
| 105 | The byte received from the SMBUS is returned.\r | |
| 106 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 107 | If Command in SmBusAddress is not zero, then ASSERT().\r | |
| 108 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 109 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 110 | \r | |
| 2fc59a00 | 111 | @param SmBusAddress The address that encodes the SMBUS Slave Address,\r |
| 71871514 | 112 | SMBUS Command, SMBUS Data Length, and PEC.\r |
| 113 | @param Status Return status for the executed command.\r | |
| 114 | This is an optional parameter and may be NULL.\r | |
| 58380e9c | 115 | RETURN_SUCCESS: The SMBUS command was executed.\r |
| 9095d37b | 116 | RETURN_TIMEOUT: A timeout occurred while executing the\r |
| 58380e9c | 117 | SMBUS command.\r |
| 9095d37b | 118 | RETURN_DEVICE_ERROR: The request was not completed because\r |
| 58380e9c | 119 | a failure reflected in the Host Status Register bit. Device\r |
| 9095d37b LG |
120 | errors are a result of a transaction collision, illegal\r |
| 121 | command field, unclaimed cycle(host initiated), or bus\r | |
| 58380e9c | 122 | errors (collisions).\r |
| 123 | RETURN_CRC_ERROR: The checksum is not correct. (PEC is incorrect.)\r | |
| 124 | RETURN_UNSUPPORTED: The SMBus operation is not supported.\r | |
| dd51a993 | 125 | \r |
| 126 | @return The byte received from the SMBUS.\r | |
| 127 | \r | |
| 128 | **/\r | |
| 129 | UINT8\r | |
| 130 | EFIAPI\r | |
| 131 | SmBusReceiveByte (\r | |
| 132 | IN UINTN SmBusAddress,\r | |
| 133 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 134 | )\r | |
| 135 | {\r | |
| 136 | UINT8 Byte;\r | |
| 137 | \r | |
| 138 | ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);\r | |
| 139 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 2d8debe7 | 140 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
| dd51a993 | 141 | \r |
| 142 | InternalSmBusExec (EfiSmbusReceiveByte, SmBusAddress, 1, &Byte, Status);\r | |
| 143 | \r | |
| 144 | return Byte;\r | |
| 145 | }\r | |
| 146 | \r | |
| 147 | /**\r | |
| 148 | Executes an SMBUS send byte command.\r | |
| 149 | \r | |
| 150 | Executes an SMBUS send byte command on the SMBUS device specified by SmBusAddress.\r | |
| 151 | The byte specified by Value is sent.\r | |
| 152 | Only the SMBUS slave address field of SmBusAddress is required. Value is returned.\r | |
| 153 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 154 | If Command in SmBusAddress is not zero, then ASSERT().\r | |
| 155 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 156 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 157 | \r | |
| 2fc59a00 | 158 | @param SmBusAddress The address that encodes the SMBUS Slave Address,\r |
| 71871514 | 159 | SMBUS Command, SMBUS Data Length, and PEC.\r |
| 160 | @param Value The 8-bit value to send.\r | |
| 161 | @param Status Return status for the executed command.\r | |
| 162 | This is an optional parameter and may be NULL.\r | |
| 58380e9c | 163 | RETURN_SUCCESS: The SMBUS command was executed.\r |
| 9095d37b | 164 | RETURN_TIMEOUT: A timeout occurred while executing the\r |
| 58380e9c | 165 | SMBUS command.\r |
| 166 | RETURN_DEVICE_ERROR: The request was not completed because\r | |
| 9095d37b LG |
167 | a failure reflected in the Host Status Register bit. Device\r |
| 168 | errors are a result of a transaction collision, illegal\r | |
| 169 | command field, unclaimed cycle(host initiated), or bus\r | |
| 58380e9c | 170 | errors (collisions).\r |
| 171 | RETURN_CRC_ERROR: The checksum is not correct (PEC is incorrect)\r | |
| 172 | RETURN_UNSUPPORTED: The SMBus operation is not supported.\r | |
| dd51a993 | 173 | \r |
| 174 | @return The parameter of Value.\r | |
| 175 | \r | |
| 176 | **/\r | |
| 177 | UINT8\r | |
| 178 | EFIAPI\r | |
| 179 | SmBusSendByte (\r | |
| 180 | IN UINTN SmBusAddress,\r | |
| 181 | IN UINT8 Value,\r | |
| 182 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 183 | )\r | |
| 184 | {\r | |
| 185 | UINT8 Byte;\r | |
| 186 | \r | |
| 187 | ASSERT (SMBUS_LIB_COMMAND (SmBusAddress) == 0);\r | |
| 188 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 2d8debe7 | 189 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
| dd51a993 | 190 | \r |
| 191 | Byte = Value;\r | |
| 192 | InternalSmBusExec (EfiSmbusSendByte, SmBusAddress, 1, &Byte, Status);\r | |
| 193 | \r | |
| 194 | return Value;\r | |
| 195 | }\r | |
| 196 | \r | |
| 197 | /**\r | |
| 198 | Executes an SMBUS read data byte command.\r | |
| 199 | \r | |
| 200 | Executes an SMBUS read data byte command on the SMBUS device specified by SmBusAddress.\r | |
| 201 | Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r | |
| 202 | The 8-bit value read from the SMBUS is returned.\r | |
| 203 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 204 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 205 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 206 | \r | |
| 58380e9c | 207 | @param SmBusAddress The address that encodes the SMBUS Slave Address,\r |
| 208 | SMBUS Command, SMBUS Data Length, and PEC.\r | |
| 71871514 | 209 | @param Status Return status for the executed command.\r |
| 210 | This is an optional parameter and may be NULL.\r | |
| 58380e9c | 211 | RETURN_SUCCESS: The SMBUS command was executed.\r |
| 9095d37b | 212 | RETURN_TIMEOUT: A timeout occurred while executing the\r |
| 58380e9c | 213 | SMBUS command.\r |
| 9095d37b LG |
214 | RETURN_DEVICE_ERROR: The request was not completed because\r |
| 215 | a failurereflected in the Host Status Register bit. Device\r | |
| 216 | errors are a result of a transaction collision, illegal\r | |
| 217 | command field, unclaimed cycle (host initiated), or bus\r | |
| 58380e9c | 218 | errors (collisions).\r |
| 219 | RETURN_CRC_ERROR: The checksum is not correct (PEC is incorrect)\r | |
| 220 | RETURN_UNSUPPORTED: The SMBus operation is not supported.\r | |
| dd51a993 | 221 | \r |
| 222 | @return The byte read from the SMBUS.\r | |
| 223 | \r | |
| 224 | **/\r | |
| 225 | UINT8\r | |
| 226 | EFIAPI\r | |
| 227 | SmBusReadDataByte (\r | |
| 228 | IN UINTN SmBusAddress,\r | |
| 229 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 230 | )\r | |
| 231 | {\r | |
| 232 | UINT8 Byte;\r | |
| 233 | \r | |
| 234 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 2d8debe7 | 235 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
| dd51a993 | 236 | \r |
| 237 | InternalSmBusExec (EfiSmbusReadByte, SmBusAddress, 1, &Byte, Status);\r | |
| bad46384 | 238 | \r |
| dd51a993 | 239 | return Byte;\r |
| 240 | }\r | |
| 241 | \r | |
| 242 | /**\r | |
| 243 | Executes an SMBUS write data byte command.\r | |
| 244 | \r | |
| 245 | Executes an SMBUS write data byte command on the SMBUS device specified by SmBusAddress.\r | |
| 246 | The 8-bit value specified by Value is written.\r | |
| 247 | Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r | |
| 248 | Value is returned.\r | |
| 249 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 250 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 251 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 252 | \r | |
| 2fc59a00 | 253 | @param SmBusAddress The address that encodes the SMBUS Slave Address,\r |
| 71871514 | 254 | SMBUS Command, SMBUS Data Length, and PEC.\r |
| 255 | @param Value The 8-bit value to write.\r | |
| 256 | @param Status Return status for the executed command.\r | |
| 257 | This is an optional parameter and may be NULL.\r | |
| 58380e9c | 258 | RETURN_SUCCESS: The SMBUS command was executed.\r |
| 9095d37b | 259 | RETURN_TIMEOUT: A timeout occurred while executing the\r |
| 58380e9c | 260 | SMBUS command.\r |
| 9095d37b LG |
261 | RETURN_DEVICE_ERROR: The request was not completed because\r |
| 262 | a failure reflected in the Host Status Register bit. Device\r | |
| 263 | errors are a result of a transaction collision, illegal\r | |
| 264 | command field, unclaimed cycle host initiated), or bus\r | |
| 58380e9c | 265 | errors (collisions).\r |
| 266 | RETURN_CRC_ERROR: The checksum is not correct. (PEC is incorrect.)\r | |
| 267 | RETURN_UNSUPPORTED: The SMBus operation is not supported.\r | |
| dd51a993 | 268 | \r |
| 269 | @return The parameter of Value.\r | |
| 270 | \r | |
| 271 | **/\r | |
| 272 | UINT8\r | |
| 273 | EFIAPI\r | |
| 274 | SmBusWriteDataByte (\r | |
| 275 | IN UINTN SmBusAddress,\r | |
| 276 | IN UINT8 Value,\r | |
| 277 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 278 | )\r | |
| 279 | {\r | |
| 280 | UINT8 Byte;\r | |
| 281 | \r | |
| 282 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 2d8debe7 | 283 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
| dd51a993 | 284 | \r |
| 285 | Byte = Value;\r | |
| 286 | InternalSmBusExec (EfiSmbusWriteByte, SmBusAddress, 1, &Byte, Status);\r | |
| bad46384 | 287 | \r |
| dd51a993 | 288 | return Value;\r |
| 289 | }\r | |
| 290 | \r | |
| 291 | /**\r | |
| 292 | Executes an SMBUS read data word command.\r | |
| 293 | \r | |
| 294 | Executes an SMBUS read data word command on the SMBUS device specified by SmBusAddress.\r | |
| 295 | Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r | |
| 296 | The 16-bit value read from the SMBUS is returned.\r | |
| 297 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 298 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 299 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 9095d37b | 300 | \r |
| 2fc59a00 | 301 | @param SmBusAddress The address that encodes the SMBUS Slave Address,\r |
| 71871514 | 302 | SMBUS Command, SMBUS Data Length, and PEC.\r |
| 303 | @param Status Return status for the executed command.\r | |
| 304 | This is an optional parameter and may be NULL.\r | |
| 58380e9c | 305 | RETURN_SUCCESS: The SMBUS command was executed.\r |
| 9095d37b | 306 | RETURN_TIMEOUT: A timeout occurred while executing the\r |
| 58380e9c | 307 | SMBUS command.\r |
| 9095d37b LG |
308 | RETURN_DEVICE_ERROR: The request was not completed because\r |
| 309 | a failure reflected in the Host Status Register bit.\r | |
| 310 | Device errors are a result of a transaction collision,\r | |
| 311 | illegal command field, unclaimed cycle (host initiated),\r | |
| 58380e9c | 312 | or bus errors (collisions).\r |
| 9095d37b | 313 | RETURN_CRC_ERROR: The checksum is not correct. (PEC is\r |
| 58380e9c | 314 | incorrect.)\r |
| 315 | RETURN_UNSUPPORTED: The SMBus operation is not supported.\r | |
| dd51a993 | 316 | \r |
| 317 | @return The byte read from the SMBUS.\r | |
| 318 | \r | |
| 319 | **/\r | |
| 320 | UINT16\r | |
| 321 | EFIAPI\r | |
| 322 | SmBusReadDataWord (\r | |
| 323 | IN UINTN SmBusAddress,\r | |
| 324 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 325 | )\r | |
| 326 | {\r | |
| 327 | UINT16 Word;\r | |
| 328 | \r | |
| 329 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 2d8debe7 | 330 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
| dd51a993 | 331 | \r |
| 332 | InternalSmBusExec (EfiSmbusReadWord, SmBusAddress, 2, &Word, Status);\r | |
| bad46384 | 333 | \r |
| dd51a993 | 334 | return Word;\r |
| 335 | }\r | |
| 336 | \r | |
| 337 | /**\r | |
| 338 | Executes an SMBUS write data word command.\r | |
| 339 | \r | |
| 340 | Executes an SMBUS write data word command on the SMBUS device specified by SmBusAddress.\r | |
| 341 | The 16-bit value specified by Value is written.\r | |
| 342 | Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r | |
| 343 | Value is returned.\r | |
| 344 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 345 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 346 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 347 | \r | |
| 2fc59a00 | 348 | @param SmBusAddress The address that encodes the SMBUS Slave Address,\r |
| 71871514 | 349 | SMBUS Command, SMBUS Data Length, and PEC.\r |
| 350 | @param Value The 16-bit value to write.\r | |
| 351 | @param Status Return status for the executed command.\r | |
| 352 | This is an optional parameter and may be NULL.\r | |
| 58380e9c | 353 | RETURN_SUCCESS: The SMBUS command was executed.\r |
| 9095d37b | 354 | RETURN_TIMEOUT: A timeout occurred while executing the SMBUS\r |
| 58380e9c | 355 | command.\r |
| 9095d37b LG |
356 | RETURN_DEVICE_ERROR: The request was not completed because\r |
| 357 | a failure reflected in the Host Status Register bit.\r | |
| 358 | Device errors are a result of a transaction collision,\r | |
| 359 | illegal command field, unclaimed cycle (host initiated),\r | |
| 58380e9c | 360 | or bus errors (collisions).\r |
| 9095d37b | 361 | RETURN_CRC_ERROR: The checksum is not correct.\r |
| 58380e9c | 362 | (PEC is incorrect.)\r |
| 363 | RETURN_UNSUPPORTED: The SMBus operation is not supported.\r | |
| dd51a993 | 364 | \r |
| 365 | @return The parameter of Value.\r | |
| 366 | \r | |
| 367 | **/\r | |
| 368 | UINT16\r | |
| 369 | EFIAPI\r | |
| 370 | SmBusWriteDataWord (\r | |
| 371 | IN UINTN SmBusAddress,\r | |
| 372 | IN UINT16 Value,\r | |
| 373 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 374 | )\r | |
| 375 | {\r | |
| 376 | UINT16 Word;\r | |
| 377 | \r | |
| 378 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 2d8debe7 | 379 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
| dd51a993 | 380 | \r |
| 381 | Word = Value;\r | |
| 382 | InternalSmBusExec (EfiSmbusWriteWord, SmBusAddress, 2, &Word, Status);\r | |
| 383 | \r | |
| 384 | return Value;\r | |
| 385 | }\r | |
| 386 | \r | |
| 387 | /**\r | |
| 388 | Executes an SMBUS process call command.\r | |
| 389 | \r | |
| 390 | Executes an SMBUS process call command on the SMBUS device specified by SmBusAddress.\r | |
| 391 | The 16-bit value specified by Value is written.\r | |
| 392 | Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r | |
| 393 | The 16-bit value returned by the process call command is returned.\r | |
| 394 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 395 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 396 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 397 | \r | |
| 2fc59a00 | 398 | @param SmBusAddress The address that encodes the SMBUS Slave Address,\r |
| 71871514 | 399 | SMBUS Command, SMBUS Data Length, and PEC.\r |
| 400 | @param Value The 16-bit value to write.\r | |
| 401 | @param Status Return status for the executed command.\r | |
| 402 | This is an optional parameter and may be NULL.\r | |
| 58380e9c | 403 | RETURN_SUCCESS: The SMBUS command was executed.\r |
| 9095d37b | 404 | RETURN_TIMEOUT: A timeout occurred while executing the\r |
| 58380e9c | 405 | SMBUS command.\r |
| 9095d37b LG |
406 | RETURN_DEVICE_ERROR: The request was not completed because\r |
| 407 | a failure reflected in the Host Status Register bit.\r | |
| 408 | Device errors are a result of a transaction collision,\r | |
| 409 | illegal command field, unclaimed cycle (host initiated),\r | |
| 58380e9c | 410 | or bus errors (collisions).\r |
| 9095d37b | 411 | RETURN_CRC_ERROR: The checksum is not correct. (PEC is\r |
| 58380e9c | 412 | incorrect.)\r |
| 413 | RETURN_UNSUPPORTED: The SMBus operation is not supported.\r | |
| dd51a993 | 414 | \r |
| 415 | @return The 16-bit value returned by the process call command.\r | |
| 416 | \r | |
| 417 | **/\r | |
| 418 | UINT16\r | |
| 419 | EFIAPI\r | |
| 420 | SmBusProcessCall (\r | |
| 421 | IN UINTN SmBusAddress,\r | |
| 422 | IN UINT16 Value,\r | |
| 423 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 424 | )\r | |
| 425 | {\r | |
| 426 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 2d8debe7 | 427 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
| dd51a993 | 428 | \r |
| 429 | InternalSmBusExec (EfiSmbusProcessCall, SmBusAddress, 2, &Value, Status);\r | |
| bad46384 | 430 | \r |
| dd51a993 | 431 | return Value;\r |
| 432 | }\r | |
| 433 | \r | |
| 434 | /**\r | |
| 435 | Executes an SMBUS read block command.\r | |
| 436 | \r | |
| 437 | Executes an SMBUS read block command on the SMBUS device specified by SmBusAddress.\r | |
| 438 | Only the SMBUS slave address and SMBUS command fields of SmBusAddress are required.\r | |
| 439 | Bytes are read from the SMBUS and stored in Buffer.\r | |
| 440 | The number of bytes read is returned, and will never return a value larger than 32-bytes.\r | |
| 441 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 442 | It is the caller's responsibility to make sure Buffer is large enough for the total number of bytes read.\r | |
| 443 | SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.\r | |
| 444 | If Length in SmBusAddress is not zero, then ASSERT().\r | |
| 445 | If Buffer is NULL, then ASSERT().\r | |
| 446 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 447 | \r | |
| 2fc59a00 | 448 | @param SmBusAddress The address that encodes the SMBUS Slave Address,\r |
| 71871514 | 449 | SMBUS Command, SMBUS Data Length, and PEC.\r |
| 9095d37b | 450 | @param Buffer The pointer to the buffer to store the bytes read from\r |
| 58380e9c | 451 | the SMBUS.\r |
| 71871514 | 452 | @param Status Return status for the executed command.\r |
| 453 | This is an optional parameter and may be NULL.\r | |
| 58380e9c | 454 | RETURN_SUCCESS: The SMBUS command was executed.\r |
| 9095d37b | 455 | RETURN_TIMEOUT: A timeout occurred while executing the SMBUS\r |
| 58380e9c | 456 | command.\r |
| 9095d37b LG |
457 | RETURN_DEVICE_ERROR: The request was not completed because\r |
| 458 | a failure reflected in the Host Status Register bit. Device\r | |
| 459 | errors are a result of a transaction collision, illegal\r | |
| 460 | command field, unclaimed cycle (host initiated), or bus\r | |
| 58380e9c | 461 | errors (collisions).\r |
| 9095d37b | 462 | RETURN_CRC_ERROR: The checksum is not correct. (PEC is\r |
| 58380e9c | 463 | incorrect.)\r |
| 464 | RETURN_UNSUPPORTED: The SMBus operation is not supported.\r | |
| dd51a993 | 465 | \r |
| 466 | @return The number of bytes read.\r | |
| 467 | \r | |
| 468 | **/\r | |
| 469 | UINTN\r | |
| 470 | EFIAPI\r | |
| 471 | SmBusReadBlock (\r | |
| 472 | IN UINTN SmBusAddress,\r | |
| 473 | OUT VOID *Buffer,\r | |
| 474 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 475 | )\r | |
| 476 | {\r | |
| 477 | ASSERT (Buffer != NULL);\r | |
| 478 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) == 0);\r | |
| 2d8debe7 | 479 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
| dd51a993 | 480 | \r |
| 481 | return InternalSmBusExec (EfiSmbusReadBlock, SmBusAddress, 0x20, Buffer, Status);\r | |
| 482 | }\r | |
| 483 | \r | |
| 484 | /**\r | |
| 485 | Executes an SMBUS write block command.\r | |
| 486 | \r | |
| 487 | Executes an SMBUS write block command on the SMBUS device specified by SmBusAddress.\r | |
| 488 | The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.\r | |
| 489 | Bytes are written to the SMBUS from Buffer.\r | |
| 490 | The number of bytes written is returned, and will never return a value larger than 32-bytes.\r | |
| 9095d37b | 491 | If Status is not NULL, then the status of the executed command is returned in Status.\r |
| dd51a993 | 492 | If Length in SmBusAddress is zero or greater than 32, then ASSERT().\r |
| 493 | If Buffer is NULL, then ASSERT().\r | |
| 494 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 495 | \r | |
| 2fc59a00 | 496 | @param SmBusAddress The address that encodes the SMBUS Slave Address,\r |
| 71871514 | 497 | MBUS Command, SMBUS Data Length, and PEC.\r |
| 9095d37b | 498 | @param Buffer The pointer to the buffer to store the bytes read from\r |
| 58380e9c | 499 | the SMBUS.\r |
| 71871514 | 500 | @param Status Return status for the executed command.\r |
| 501 | This is an optional parameter and may be NULL.\r | |
| 9095d37b | 502 | RETURN_TIMEOUT: A timeout occurred while executing the\r |
| 58380e9c | 503 | SMBUS command.\r |
| 9095d37b LG |
504 | RETURN_DEVICE_ERROR: The request was not completed because\r |
| 505 | a failure reflected in the Host Status Register bit. Device\r | |
| 506 | errors are a result of a transaction collision, illegal\r | |
| 507 | command field, unclaimed cycle (host initiated), or bus\r | |
| 58380e9c | 508 | errors (collisions).\r |
| 9095d37b | 509 | RETURN_CRC_ERROR: The checksum is not correct. (PEC is\r |
| 58380e9c | 510 | incorrect.)\r |
| 511 | RETURN_UNSUPPORTED: The SMBus operation is not supported.\r | |
| dd51a993 | 512 | \r |
| 513 | @return The number of bytes written.\r | |
| 514 | \r | |
| 515 | **/\r | |
| 516 | UINTN\r | |
| 517 | EFIAPI\r | |
| 518 | SmBusWriteBlock (\r | |
| 519 | IN UINTN SmBusAddress,\r | |
| 520 | OUT VOID *Buffer,\r | |
| 521 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 522 | )\r | |
| 523 | {\r | |
| 524 | UINTN Length;\r | |
| 525 | \r | |
| 526 | ASSERT (Buffer != NULL);\r | |
| 527 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) >= 1);\r | |
| 528 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) <= 32);\r | |
| 2d8debe7 | 529 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
| dd51a993 | 530 | \r |
| 531 | Length = SMBUS_LIB_LENGTH (SmBusAddress);\r | |
| 532 | return InternalSmBusExec (EfiSmbusWriteBlock, SmBusAddress, Length, Buffer, Status);\r | |
| 533 | }\r | |
| 534 | \r | |
| 535 | /**\r | |
| 536 | Executes an SMBUS block process call command.\r | |
| 537 | \r | |
| 538 | Executes an SMBUS block process call command on the SMBUS device specified by SmBusAddress.\r | |
| 539 | The SMBUS slave address, SMBUS command, and SMBUS length fields of SmBusAddress are required.\r | |
| 540 | Bytes are written to the SMBUS from WriteBuffer. Bytes are then read from the SMBUS into ReadBuffer.\r | |
| 541 | If Status is not NULL, then the status of the executed command is returned in Status.\r | |
| 542 | It is the caller's responsibility to make sure ReadBuffer is large enough for the total number of bytes read.\r | |
| 543 | SMBUS supports a maximum transfer size of 32 bytes, so Buffer does not need to be any larger than 32 bytes.\r | |
| 544 | If Length in SmBusAddress is zero or greater than 32, then ASSERT().\r | |
| 545 | If WriteBuffer is NULL, then ASSERT().\r | |
| 546 | If ReadBuffer is NULL, then ASSERT().\r | |
| 547 | If any reserved bits of SmBusAddress are set, then ASSERT().\r | |
| 548 | \r | |
| 2fc59a00 | 549 | @param SmBusAddress The address that encodes the SMBUS Slave Address,\r |
| 71871514 | 550 | SMBUS Command, SMBUS Data Length, and PEC.\r |
| 2fc59a00 | 551 | @param WriteBuffer The pointer to the buffer of bytes to write to the SMBUS.\r |
| 552 | @param ReadBuffer The pointer to the buffer of bytes to read from the SMBUS.\r | |
| 71871514 | 553 | @param Status Return status for the executed command.\r |
| 554 | This is an optional parameter and may be NULL.\r | |
| 9095d37b | 555 | RETURN_TIMEOUT: A timeout occurred while executing the\r |
| 58380e9c | 556 | SMBUS command.\r |
| 9095d37b LG |
557 | RETURN_DEVICE_ERROR: The request was not completed because\r |
| 558 | a failure reflected in the Host Status Register bit. Device\r | |
| 559 | errors are a result of a transaction collision, illegal\r | |
| 560 | command field, unclaimed cycle (host initiated), or bus\r | |
| 58380e9c | 561 | errors (collisions).\r |
| 9095d37b | 562 | RETURN_CRC_ERROR: The checksum is not correct. (PEC is\r |
| 58380e9c | 563 | incorrect.)\r |
| 564 | RETURN_UNSUPPORTED: The SMBus operation is not supported.\r | |
| dd51a993 | 565 | \r |
| 566 | @return The number of bytes written.\r | |
| 567 | \r | |
| 568 | **/\r | |
| 569 | UINTN\r | |
| 570 | EFIAPI\r | |
| 571 | SmBusBlockProcessCall (\r | |
| 572 | IN UINTN SmBusAddress,\r | |
| 573 | IN VOID *WriteBuffer,\r | |
| 574 | OUT VOID *ReadBuffer,\r | |
| 575 | OUT RETURN_STATUS *Status OPTIONAL\r | |
| 576 | )\r | |
| 577 | {\r | |
| 578 | UINTN Length;\r | |
| 579 | \r | |
| 580 | ASSERT (WriteBuffer != NULL);\r | |
| 581 | ASSERT (ReadBuffer != NULL);\r | |
| 582 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) >= 1);\r | |
| 583 | ASSERT (SMBUS_LIB_LENGTH (SmBusAddress) <= 32);\r | |
| 2d8debe7 | 584 | ASSERT (SMBUS_LIB_RESERVED (SmBusAddress) == 0);\r |
| dd51a993 | 585 | \r |
| 586 | Length = SMBUS_LIB_LENGTH (SmBusAddress);\r | |
| 587 | //\r | |
| 588 | // Assuming that ReadBuffer is large enough to save another memory copy.\r | |
| 589 | //\r | |
| 590 | ReadBuffer = CopyMem (ReadBuffer, WriteBuffer, Length);\r | |
| 591 | return InternalSmBusExec (EfiSmbusBWBRProcessCall, SmBusAddress, Length, ReadBuffer, Status);\r | |
| 592 | }\r |