PI 1.1 SMM Feature Check-in
[mirror_edk2.git] / MdePkg / Library / SmmIoLibCpuIo / IoLib.c
CommitLineData
b7c5912a 1/** @file\r
2 I/O Library.\r
3 The implementation of I/O operation for this library instance \r
4 are based on EFI_CPU_IO_PROTOCOL.\r
5 \r
6 Copyright (c) 2009, Intel Corporation<BR>\r
7 All rights reserved. This program and the accompanying materials\r
8 are licensed and made available under the terms and conditions of the BSD License\r
9 which accompanies this distribution. The full text of the license may be found at\r
10 http://opensource.org/licenses/bsd-license.php\r
11\r
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
14\r
15 Module Name: IoLib.c\r
16\r
17**/\r
18\r
19\r
20#include "SmmCpuIoLibInternal.h"\r
21\r
22//\r
23// Globle varible to cache pointer to CpuIo protocol.\r
24//\r
25EFI_SMM_CPU_IO_PROTOCOL *mCpuIo = NULL;\r
26EFI_SMM_PCI_ROOT_BRIDGE_IO_PROTOCOL *mPciRootBridgeIo = NULL;\r
27\r
28/**\r
29 The constructor function caches the pointer to CpuIo protocol.\r
30\r
31 The constructor function locates CpuIo protocol from protocol database.\r
32 It will ASSERT() if that operation fails and it will always return EFI_SUCCESS.\r
33\r
34 @param ImageHandle The firmware allocated handle for the EFI image.\r
35 @param SystemTable A pointer to the EFI System Table.\r
36\r
37 @retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.\r
38\r
39**/\r
40EFI_STATUS\r
41EFIAPI\r
42IoLibConstructor (\r
43 IN EFI_HANDLE ImageHandle,\r
44 IN EFI_SYSTEM_TABLE *SystemTable\r
45 )\r
46{\r
47 EFI_STATUS Status;\r
48\r
49 Status = gSmst->SmmLocateProtocol (&gEfiSmmPciRootBridgeIoProtocolGuid, NULL, (VOID **) &mPciRootBridgeIo);\r
50 if (EFI_ERROR (Status)) {\r
51 Status = gSmst->SmmLocateProtocol (&gEfiSmmCpuIoProtocolGuid, NULL, (VOID **) &mCpuIo);\r
52 }\r
53 ASSERT_EFI_ERROR (Status);\r
54\r
55 return Status;\r
56}\r
57\r
58/**\r
59 Reads registers in the EFI CPU I/O space.\r
60\r
61 Reads the I/O port specified by Port with registers width specified by Width.\r
62 The read value is returned. If such operations are not supported, then ASSERT().\r
63 This function must guarantee that all I/O read and write operations are serialized.\r
64\r
65 @param Port The base address of the I/O operation.\r
66 The caller is responsible for aligning the Address if required.\r
67 @param Width The width of the I/O operation.\r
68\r
69 @return Data read from registers in the EFI CPU I/O space.\r
70\r
71**/\r
72UINT64\r
73EFIAPI\r
74IoReadWorker (\r
75 IN UINTN Port,\r
76 IN EFI_SMM_IO_WIDTH Width\r
77 )\r
78{\r
79 EFI_STATUS Status;\r
80 UINT64 Data;\r
81\r
82 if (mPciRootBridgeIo != NULL) {\r
83 Status = mPciRootBridgeIo->Io.Read (mPciRootBridgeIo, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, Port, 1, &Data);\r
84 } else {\r
85 Status = mCpuIo->Io.Read (mCpuIo, Width, Port, 1, &Data);\r
86 }\r
87 ASSERT_EFI_ERROR (Status);\r
88\r
89 return Data;\r
90}\r
91\r
92/**\r
93 Writes registers in the EFI CPU I/O space.\r
94\r
95 Writes the I/O port specified by Port with registers width and value specified by Width\r
96 and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r
97 This function must guarantee that all I/O read and write operations are serialized.\r
98\r
99 @param Port The base address of the I/O operation.\r
100 The caller is responsible for aligning the Address if required.\r
101 @param Width The width of the I/O operation.\r
102 @param Data The value to write to the I/O port.\r
103\r
104 @return The paramter of Data.\r
105\r
106**/\r
107UINT64\r
108EFIAPI\r
109IoWriteWorker (\r
110 IN UINTN Port,\r
111 IN EFI_SMM_IO_WIDTH Width,\r
112 IN UINT64 Data\r
113 )\r
114{\r
115 EFI_STATUS Status;\r
116\r
117 if (mPciRootBridgeIo != NULL) {\r
118 Status = mPciRootBridgeIo->Io.Write (mPciRootBridgeIo, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, Port, 1, &Data);\r
119 } else {\r
120 Status = mCpuIo->Io.Write (mCpuIo, Width, Port, 1, &Data);\r
121 }\r
122 ASSERT_EFI_ERROR (Status);\r
123\r
124 return Data;\r
125}\r
126\r
127/**\r
128 Reads memory-mapped registers in the EFI system memory space.\r
129\r
130 Reads the MMIO registers specified by Address with registers width specified by Width.\r
131 The read value is returned. If such operations are not supported, then ASSERT().\r
132 This function must guarantee that all MMIO read and write operations are serialized.\r
133\r
134 @param Address The MMIO register to read.\r
135 The caller is responsible for aligning the Address if required.\r
136 @param Width The width of the I/O operation.\r
137\r
138 @return Data read from registers in the EFI system memory space.\r
139\r
140**/\r
141UINT64\r
142EFIAPI\r
143MmioReadWorker (\r
144 IN UINTN Address,\r
145 IN EFI_SMM_IO_WIDTH Width\r
146 )\r
147{\r
148 EFI_STATUS Status;\r
149 UINT64 Data;\r
150\r
151 if (mPciRootBridgeIo != NULL) {\r
152 Status = mPciRootBridgeIo->Mem.Read (mPciRootBridgeIo, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, Address, 1, &Data);\r
153 } else {\r
154 Status = mCpuIo->Mem.Read (mCpuIo, Width, Address, 1, &Data);\r
155 }\r
156 ASSERT_EFI_ERROR (Status);\r
157\r
158 return Data;\r
159}\r
160\r
161/**\r
162 Writes memory-mapped registers in the EFI system memory space.\r
163\r
164 Writes the MMIO registers specified by Address with registers width and value specified by Width\r
165 and Data respectively. Data is returned. If such operations are not supported, then ASSERT().\r
166 This function must guarantee that all MMIO read and write operations are serialized.\r
167\r
168 @param Address The MMIO register to read.\r
169 The caller is responsible for aligning the Address if required.\r
170 @param Width The width of the I/O operation.\r
171 @param Data The value to write to the I/O port.\r
172 \r
173 @return Data read from registers in the EFI system memory space.\r
174\r
175**/\r
176UINT64\r
177EFIAPI\r
178MmioWriteWorker (\r
179 IN UINTN Address,\r
180 IN EFI_SMM_IO_WIDTH Width,\r
181 IN UINT64 Data\r
182 )\r
183{\r
184 EFI_STATUS Status;\r
185\r
186 if (mPciRootBridgeIo != NULL) {\r
187 Status = mPciRootBridgeIo->Mem.Write (mPciRootBridgeIo, (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH) Width, Address, 1, &Data);\r
188 } else {\r
189 Status = mCpuIo->Mem.Write (mCpuIo, Width, Address, 1, &Data);\r
190 }\r
191 ASSERT_EFI_ERROR (Status);\r
192\r
193 return Data;\r
194}\r
195\r
196/**\r
197 Reads an 8-bit I/O port.\r
198\r
199 Reads the 8-bit I/O port specified by Port. The 8-bit read value is returned.\r
200 This function must guarantee that all I/O read and write operations are\r
201 serialized.\r
202\r
203 If 8-bit I/O port operations are not supported, then ASSERT().\r
204\r
205 @param Port The I/O port to read.\r
206\r
207 @return The value read.\r
208\r
209**/\r
210UINT8\r
211EFIAPI\r
212IoRead8 (\r
213 IN UINTN Port\r
214 )\r
215{\r
216 return (UINT8)IoReadWorker (Port, SMM_IO_UINT8);\r
217}\r
218\r
219/**\r
220 Writes an 8-bit I/O port.\r
221\r
222 Writes the 8-bit I/O port specified by Port with the value specified by Value\r
223 and returns Value. This function must guarantee that all I/O read and write\r
224 operations are serialized.\r
225\r
226 If 8-bit I/O port operations are not supported, then ASSERT().\r
227\r
228 @param Port The I/O port to write.\r
229 @param Value The value to write to the I/O port.\r
230\r
231 @return The value written the I/O port.\r
232\r
233**/\r
234UINT8\r
235EFIAPI\r
236IoWrite8 (\r
237 IN UINTN Port,\r
238 IN UINT8 Value\r
239 )\r
240{\r
241 return (UINT8)IoWriteWorker (Port, SMM_IO_UINT8, Value);\r
242}\r
243\r
244/**\r
245 Reads a 16-bit I/O port.\r
246\r
247 Reads the 16-bit I/O port specified by Port. The 16-bit read value is returned.\r
248 This function must guarantee that all I/O read and write operations are\r
249 serialized.\r
250\r
251 If Port is not aligned on a 16-bit boundary, then ASSERT().\r
252 \r
253 If 16-bit I/O port operations are not supported, then ASSERT().\r
254\r
255 @param Port The I/O port to read.\r
256\r
257 @return The value read.\r
258\r
259**/\r
260UINT16\r
261EFIAPI\r
262IoRead16 (\r
263 IN UINTN Port\r
264 )\r
265{\r
266 //\r
267 // Make sure Port is aligned on a 16-bit boundary.\r
268 //\r
269 ASSERT ((Port & 1) == 0);\r
270 return (UINT16)IoReadWorker (Port, SMM_IO_UINT16);\r
271}\r
272\r
273/**\r
274 Writes a 16-bit I/O port.\r
275\r
276 Writes the 16-bit I/O port specified by Port with the value specified by Value\r
277 and returns Value. This function must guarantee that all I/O read and write\r
278 operations are serialized.\r
279\r
280 If Port is not aligned on a 16-bit boundary, then ASSERT().\r
281\r
282 If 16-bit I/O port operations are not supported, then ASSERT().\r
283\r
284 @param Port The I/O port to write.\r
285 @param Value The value to write to the I/O port.\r
286\r
287 @return The value written the I/O port.\r
288\r
289**/\r
290UINT16\r
291EFIAPI\r
292IoWrite16 (\r
293 IN UINTN Port,\r
294 IN UINT16 Value\r
295 )\r
296{\r
297 //\r
298 // Make sure Port is aligned on a 16-bit boundary.\r
299 //\r
300 ASSERT ((Port & 1) == 0);\r
301 return (UINT16)IoWriteWorker (Port, SMM_IO_UINT16, Value);\r
302}\r
303\r
304/**\r
305 Reads a 32-bit I/O port.\r
306\r
307 Reads the 32-bit I/O port specified by Port. The 32-bit read value is returned.\r
308 This function must guarantee that all I/O read and write operations are\r
309 serialized.\r
310 \r
311 If Port is not aligned on a 32-bit boundary, then ASSERT().\r
312\r
313 If 32-bit I/O port operations are not supported, then ASSERT().\r
314\r
315 @param Port The I/O port to read.\r
316\r
317 @return The value read.\r
318\r
319**/\r
320UINT32\r
321EFIAPI\r
322IoRead32 (\r
323 IN UINTN Port\r
324 )\r
325{\r
326 //\r
327 // Make sure Port is aligned on a 32-bit boundary.\r
328 //\r
329 ASSERT ((Port & 3) == 0);\r
330 return (UINT32)IoReadWorker (Port, SMM_IO_UINT32);\r
331}\r
332\r
333/**\r
334 Writes a 32-bit I/O port.\r
335\r
336 Writes the 32-bit I/O port specified by Port with the value specified by Value\r
337 and returns Value. This function must guarantee that all I/O read and write\r
338 operations are serialized.\r
339\r
340 If Port is not aligned on a 32-bit boundary, then ASSERT().\r
341\r
342 If 32-bit I/O port operations are not supported, then ASSERT().\r
343\r
344 @param Port The I/O port to write.\r
345 @param Value The value to write to the I/O port.\r
346\r
347 @return The value written the I/O port.\r
348\r
349**/\r
350UINT32\r
351EFIAPI\r
352IoWrite32 (\r
353 IN UINTN Port,\r
354 IN UINT32 Value\r
355 )\r
356{\r
357 //\r
358 // Make sure Port is aligned on a 32-bit boundary.\r
359 //\r
360 ASSERT ((Port & 3) == 0);\r
361 return (UINT32)IoWriteWorker (Port, SMM_IO_UINT32, Value);\r
362}\r
363\r
364/**\r
365 Reads a 64-bit I/O port.\r
366\r
367 Reads the 64-bit I/O port specified by Port. The 64-bit read value is returned.\r
368 This function must guarantee that all I/O read and write operations are\r
369 serialized.\r
370\r
371 If Port is not aligned on a 64-bit boundary, then ASSERT().\r
372\r
373 If 64-bit I/O port operations are not supported, then ASSERT().\r
374\r
375 @param Port The I/O port to read.\r
376\r
377 @return The value read.\r
378\r
379**/\r
380UINT64\r
381EFIAPI\r
382IoRead64 (\r
383 IN UINTN Port\r
384 )\r
385{\r
386 //\r
387 // Make sure Port is aligned on a 64-bit boundary.\r
388 //\r
389 ASSERT ((Port & 7) == 0);\r
390 return IoReadWorker (Port, SMM_IO_UINT64);\r
391}\r
392\r
393/**\r
394 Writes a 64-bit I/O port.\r
395\r
396 Writes the 64-bit I/O port specified by Port with the value specified by Value\r
397 and returns Value. This function must guarantee that all I/O read and write\r
398 operations are serialized.\r
399\r
400 If Port is not aligned on a 64-bit boundary, then ASSERT().\r
401 \r
402 If 64-bit I/O port operations are not supported, then ASSERT().\r
403\r
404 @param Port The I/O port to write.\r
405 @param Value The value to write to the I/O port.\r
406\r
407 @return The value written the I/O port.\r
408\r
409**/\r
410UINT64\r
411EFIAPI\r
412IoWrite64 (\r
413 IN UINTN Port,\r
414 IN UINT64 Value\r
415 )\r
416{\r
417 //\r
418 // Make sure Port is aligned on a 64-bit boundary.\r
419 //\r
420 ASSERT ((Port & 7) == 0);\r
421 return IoWriteWorker (Port, SMM_IO_UINT64, Value);\r
422}\r
423\r
424/**\r
425 Reads an 8-bit MMIO register.\r
426\r
427 Reads the 8-bit MMIO register specified by Address. The 8-bit read value is\r
428 returned. This function must guarantee that all MMIO read and write\r
429 operations are serialized.\r
430\r
431 If 8-bit MMIO register operations are not supported, then ASSERT().\r
432\r
433 @param Address The MMIO register to read.\r
434\r
435 @return The value read.\r
436\r
437**/\r
438UINT8\r
439EFIAPI\r
440MmioRead8 (\r
441 IN UINTN Address\r
442 )\r
443{\r
444 return (UINT8)MmioReadWorker (Address, SMM_IO_UINT8);\r
445}\r
446\r
447/**\r
448 Writes an 8-bit MMIO register.\r
449\r
450 Writes the 8-bit MMIO register specified by Address with the value specified\r
451 by Value and returns Value. This function must guarantee that all MMIO read\r
452 and write operations are serialized.\r
453\r
454 If 8-bit MMIO register operations are not supported, then ASSERT().\r
455\r
456 @param Address The MMIO register to write.\r
457 @param Value The value to write to the MMIO register.\r
458\r
459**/\r
460UINT8\r
461EFIAPI\r
462MmioWrite8 (\r
463 IN UINTN Address,\r
464 IN UINT8 Value\r
465 )\r
466{\r
467 return (UINT8)MmioWriteWorker (Address, SMM_IO_UINT8, Value);\r
468}\r
469\r
470/**\r
471 Reads a 16-bit MMIO register.\r
472\r
473 Reads the 16-bit MMIO register specified by Address. The 16-bit read value is\r
474 returned. This function must guarantee that all MMIO read and write\r
475 operations are serialized.\r
476\r
477 If Address is not aligned on a 16-bit boundary, then ASSERT().\r
478 \r
479 If 16-bit MMIO register operations are not supported, then ASSERT().\r
480\r
481 @param Address The MMIO register to read.\r
482\r
483 @return The value read.\r
484\r
485**/\r
486UINT16\r
487EFIAPI\r
488MmioRead16 (\r
489 IN UINTN Address\r
490 )\r
491{\r
492 //\r
493 // Make sure Address is aligned on a 16-bit boundary.\r
494 //\r
495 ASSERT ((Address & 1) == 0);\r
496 return (UINT16)MmioReadWorker (Address, SMM_IO_UINT16);\r
497}\r
498\r
499/**\r
500 Writes a 16-bit MMIO register.\r
501\r
502 Writes the 16-bit MMIO register specified by Address with the value specified\r
503 by Value and returns Value. This function must guarantee that all MMIO read\r
504 and write operations are serialized.\r
505\r
506 If Address is not aligned on a 16-bit boundary, then ASSERT().\r
507 \r
508 If 16-bit MMIO register operations are not supported, then ASSERT().\r
509\r
510 @param Address The MMIO register to write.\r
511 @param Value The value to write to the MMIO register.\r
512\r
513**/\r
514UINT16\r
515EFIAPI\r
516MmioWrite16 (\r
517 IN UINTN Address,\r
518 IN UINT16 Value\r
519 )\r
520{\r
521 //\r
522 // Make sure Address is aligned on a 16-bit boundary.\r
523 //\r
524 ASSERT ((Address & 1) == 0);\r
525 return (UINT16)MmioWriteWorker (Address, SMM_IO_UINT16, Value);\r
526}\r
527\r
528/**\r
529 Reads a 32-bit MMIO register.\r
530\r
531 Reads the 32-bit MMIO register specified by Address. The 32-bit read value is\r
532 returned. This function must guarantee that all MMIO read and write\r
533 operations are serialized.\r
534\r
535 If Address is not aligned on a 32-bit boundary, then ASSERT().\r
536 \r
537 If 32-bit MMIO register operations are not supported, then ASSERT().\r
538\r
539 @param Address The MMIO register to read.\r
540\r
541 @return The value read.\r
542\r
543**/\r
544UINT32\r
545EFIAPI\r
546MmioRead32 (\r
547 IN UINTN Address\r
548 )\r
549{\r
550 //\r
551 // Make sure Address is aligned on a 32-bit boundary.\r
552 //\r
553 ASSERT ((Address & 3) == 0);\r
554 return (UINT32)MmioReadWorker (Address, SMM_IO_UINT32);\r
555}\r
556\r
557/**\r
558 Writes a 32-bit MMIO register.\r
559\r
560 Writes the 32-bit MMIO register specified by Address with the value specified\r
561 by Value and returns Value. This function must guarantee that all MMIO read\r
562 and write operations are serialized.\r
563\r
564 If Address is not aligned on a 32-bit boundary, then ASSERT().\r
565 \r
566 If 32-bit MMIO register operations are not supported, then ASSERT().\r
567\r
568 @param Address The MMIO register to write.\r
569 @param Value The value to write to the MMIO register.\r
570\r
571**/\r
572UINT32\r
573EFIAPI\r
574MmioWrite32 (\r
575 IN UINTN Address,\r
576 IN UINT32 Value\r
577 )\r
578{\r
579 //\r
580 // Make sure Address is aligned on a 32-bit boundary.\r
581 //\r
582 ASSERT ((Address & 3) == 0);\r
583 return (UINT32)MmioWriteWorker (Address, SMM_IO_UINT32, Value);\r
584}\r
585\r
586/**\r
587 Reads a 64-bit MMIO register.\r
588\r
589 Reads the 64-bit MMIO register specified by Address. The 64-bit read value is\r
590 returned. This function must guarantee that all MMIO read and write\r
591 operations are serialized.\r
592\r
593 If Address is not aligned on a 64-bit boundary, then ASSERT().\r
594 \r
595 If 64-bit MMIO register operations are not supported, then ASSERT().\r
596\r
597 @param Address The MMIO register to read.\r
598\r
599 @return The value read.\r
600\r
601**/\r
602UINT64\r
603EFIAPI\r
604MmioRead64 (\r
605 IN UINTN Address\r
606 )\r
607{\r
608 //\r
609 // Make sure Address is aligned on a 64-bit boundary.\r
610 //\r
611 ASSERT ((Address & 7) == 0);\r
612 return (UINT64)MmioReadWorker (Address, SMM_IO_UINT64);\r
613}\r
614\r
615/**\r
616 Writes a 64-bit MMIO register.\r
617\r
618 Writes the 64-bit MMIO register specified by Address with the value specified\r
619 by Value and returns Value. This function must guarantee that all MMIO read\r
620 and write operations are serialized.\r
621\r
622 If Address is not aligned on a 64-bit boundary, then ASSERT().\r
623 \r
624 If 64-bit MMIO register operations are not supported, then ASSERT().\r
625\r
626 @param Address The MMIO register to write.\r
627 @param Value The value to write to the MMIO register.\r
628\r
629**/\r
630UINT64\r
631EFIAPI\r
632MmioWrite64 (\r
633 IN UINTN Address,\r
634 IN UINT64 Value\r
635 )\r
636{\r
637 //\r
638 // Make sure Address is aligned on a 64-bit boundary.\r
639 //\r
640 ASSERT ((Address & 7) == 0);\r
641 return (UINT64)MmioWriteWorker (Address, SMM_IO_UINT64, Value);\r
642}\r