[mirror_edk2.git] / Omap35xxPkg / Include / Library / OmapDmaLib.h

/** @file

  Abstractions for simple OMAP DMA. The DMA functions are modeled on 
  the PCI IO protocol and follow the same rules as outlined in the UEFI specification.
  OMAP_DMA4 structure elements are described in the OMAP35xx TRM. Currently 
  there is no PCI'less DMA protocol, if one existed it could be used to
  replace this library.

  Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>

  This program and the accompanying materials
  are licensed and made available under the terms and conditions of the BSD License
  which accompanies this distribution.  The full text of the license may be found at
  http://opensource.org/licenses/bsd-license.php

  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.

**/

#ifndef __OMAP_DMA_LIB_H__
#define __OMAP_DMA_LIB_H__

typedef enum {\r
  ///\r
  /// A read operation from system memory by a bus master.\r
  ///\r
  MapOperationBusMasterRead,\r
  ///\r
  /// A write operation from system memory by a bus master.\r
  ///\r
  MapOperationBusMasterWrite,\r
  ///\r
  /// Provides both read and write access to system memory by both the processor and a\r
  /// bus master. The buffer is coherent from both the processor's and the bus master's point of view.\r
  ///\r
  MapOperationBusMasterCommonBuffer,\r
  MapOperationMaximum\r
} DMA_MAP_OPERATION;\r


// Example from DMA chapter of the OMAP35xx spec
typedef struct {\r
  UINT8     DataType;                      // DMA4_CSDPi[1:0]\r
  UINT8     ReadPortAccessType;            // DMA4_CSDPi[8:7]\r
  UINT8     WritePortAccessType;           // DMA4_CSDPi[15:14]\r
  UINT8     SourceEndiansim;               // DMA4_CSDPi[21]\r
  UINT8     DestinationEndianism;          // DMA4_CSDPi[19]\r
  UINT8     WriteMode;                     // DMA4_CSDPi[17:16]\r
  UINT8     SourcePacked;                  // DMA4_CSDPi[6]\r
  UINT8     DestinationPacked;             // DMA4_CSDPi[13]\r
  UINT32    NumberOfElementPerFrame;       // DMA4_CENi\r
  UINT32    NumberOfFramePerTransferBlock; // DMA4_CFNi\r
  UINT32    SourceStartAddress;            // DMA4_CSSAi\r
  UINT32    DestinationStartAddress;       // DMA4_CDSAi\r
  UINT32    SourceElementIndex;            // DMA4_CSEi\r
  UINT32    SourceFrameIndex;              // DMA4_CSFi\r
  UINT32    DestinationElementIndex;       // DMA4_CDEi\r
  UINT32    DestinationFrameIndex;         // DMA4_CDFi\r
  UINT8     ReadPortAccessMode;            // DMA4_CCRi[13:12]\r
  UINT8     WritePortAccessMode;           // DMA4_CCRi[15:14]\r
  UINT8     ReadPriority;                  // DMA4_CCRi[6]\r
  UINT8     WritePriority;                 // DMA4_CCRi[23]\r
  UINT8     ReadRequestNumber;             // DMA4_CCRi[4:0]\r
  UINT8     WriteRequestNumber;            // DMA4_CCRi[20:19]
} OMAP_DMA4;


/**                                                                 \r
  Configure OMAP DMA Channel\r
            \r
  @param  Channel               DMA Channel to configure\r
  @param  Dma4                  Pointer to structure used to initialize DMA registers for the Channel                                                \r
                                  \r
  @retval EFI_SUCCESS           The range was mapped for the returned NumberOfBytes.\r
  @retval EFI_INVALID_PARAMETER Channel is not valid\r
  @retval EFI_DEVICE_ERROR      The system hardware could not map the requested information.\r
                                   \r
**/
EFI_STATUS
EFIAPI
EnableDmaChannel (
  IN  UINTN       Channel,
  IN  OMAP_DMA4   *Dma4
  );

/**                                                                 \r
  Turn of DMA channel configured by EnableDma().\r
            \r
  @param  Channel               DMA Channel to configure\r
  @param  SuccesMask            Bits in DMA4_CSR register indicate EFI_SUCCESS\r
  @param  ErrorMask             Bits in DMA4_CSR register indicate EFI_DEVICE_ERROR\r
                                  \r
  @retval EFI_SUCCESS           DMA hardware disabled\r
  @retval EFI_INVALID_PARAMETER Channel is not valid\r
  @retval EFI_DEVICE_ERROR      The system hardware could not map the requested information.\r
                                   \r
**/
EFI_STATUS
EFIAPI
DisableDmaChannel (
  IN  UINTN       Channel,
  IN  UINT32      SuccessMask,
  IN  UINT32      ErrorMask
  );


/**                                                                 \r
  Provides the DMA controller-specific addresses needed to access system memory.\r
  \r
  Operation is relative to the DMA bus master.\r
            \r
  @param  Operation             Indicates if the bus master is going to read or write to system memory.\r
  @param  HostAddress           The system memory address to map to the DMA controller.\r
  @param  NumberOfBytes         On input the number of bytes to map. On output the number of bytes\r
                                that were mapped.                                                 \r
  @param  DeviceAddress         The resulting map address for the bus master controller to use to\r
                                access the hosts HostAddress.                                        \r
  @param  Mapping               A resulting value to pass to Unmap().\r
                                  \r
  @retval EFI_SUCCESS           The range was mapped for the returned NumberOfBytes.\r
  @retval EFI_UNSUPPORTED       The HostAddress cannot be mapped as a common buffer.                                \r
  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
  @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.\r
  @retval EFI_DEVICE_ERROR      The system hardware could not map the requested address.\r
                                   \r
**/
EFI_STATUS
EFIAPI
DmaMap (
  IN     DMA_MAP_OPERATION              Operation,
  IN     VOID                           *HostAddress,\r
  IN OUT UINTN                          *NumberOfBytes,\r
  OUT    PHYSICAL_ADDRESS               *DeviceAddress,\r
  OUT    VOID                           **Mapping\r
  );


/**                                                                 \r
  Completes the DmaMapBusMasterRead(), DmaMapBusMasterWrite(), or DmaMapBusMasterCommonBuffer()\r
  operation and releases any corresponding resources.\r
            \r
  @param  Mapping               The mapping value returned from DmaMap*().\r
                                  \r
  @retval EFI_SUCCESS           The range was unmapped.\r
  @retval EFI_DEVICE_ERROR      The data was not committed to the target system memory.\r
                                   \r
**/
EFI_STATUS
EFIAPI
DmaUnmap (
  IN  VOID                         *Mapping\r
  );


/**                                                                 \r
  Allocates pages that are suitable for an DmaMap() of type MapOperationBusMasterCommonBuffer.\r
  mapping.                                                                       \r
            \r
  @param  MemoryType            The type of memory to allocate, EfiBootServicesData or\r
                                EfiRuntimeServicesData.                               \r
  @param  Pages                 The number of pages to allocate.                                \r
  @param  HostAddress           A pointer to store the base system memory address of the\r
                                allocated range.                                        \r
\r
                                @retval EFI_SUCCESS           The requested memory pages were allocated.\r
  @retval EFI_UNSUPPORTED       Attributes is unsupported. The only legal attribute bits are\r
                                MEMORY_WRITE_COMBINE and MEMORY_CACHED.                     \r
  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
  @retval EFI_OUT_OF_RESOURCES  The memory pages could not be allocated.  \r
                                   \r
**/
EFI_STATUS
EFIAPI
DmaAllocateBuffer (
  IN  EFI_MEMORY_TYPE              MemoryType,
  IN  UINTN                        Pages,\r
  OUT VOID                         **HostAddress\r
  );\r


/**                                                                 \r
  Frees memory that was allocated with DmaAllocateBuffer().\r
            \r
  @param  Pages                 The number of pages to free.                                \r
  @param  HostAddress           The base system memory address of the allocated range.                                    \r
                                  \r
  @retval EFI_SUCCESS           The requested memory pages were freed.\r
  @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages\r
                                was not allocated with DmaAllocateBuffer().\r
                                     \r
**/\r
EFI_STATUS
EFIAPI
DmaFreeBuffer (
  IN  UINTN                        Pages,\r
  IN  VOID                         *HostAddress\r
  );\r


#endif
Commit	Line	Data
7f814ffd	1	/** @file
	2
	3	Abstractions for simple OMAP DMA. The DMA functions are modeled on
	4	the PCI IO protocol and follow the same rules as outlined in the UEFI specification.
	5	OMAP_DMA4 structure elements are described in the OMAP35xx TRM. Currently
	6	there is no PCI'less DMA protocol, if one existed it could be used to
	7	replace this library.
	8
	9	Copyright (c) 2008 - 2010, Apple Inc. All rights reserved.<BR>
	10
	11	This program and the accompanying materials
	12	are licensed and made available under the terms and conditions of the BSD License
	13	which accompanies this distribution. The full text of the license may be found at
	14	http://opensource.org/licenses/bsd-license.php
	15
	16	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
	17	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
	18
	19	**/
	20
	21	#ifndef __OMAP_DMA_LIB_H__
	22	#define __OMAP_DMA_LIB_H__
	23
	24	typedef enum {\r
	25	///\r
	26	/// A read operation from system memory by a bus master.\r
	27	///\r
	28	MapOperationBusMasterRead,\r
	29	///\r
	30	/// A write operation from system memory by a bus master.\r
	31	///\r
	32	MapOperationBusMasterWrite,\r
	33	///\r
	34	/// Provides both read and write access to system memory by both the processor and a\r
	35	/// bus master. The buffer is coherent from both the processor's and the bus master's point of view.\r
	36	///\r
	37	MapOperationBusMasterCommonBuffer,\r
	38	MapOperationMaximum\r
	39	} DMA_MAP_OPERATION;\r
	40
	41
	42	// Example from DMA chapter of the OMAP35xx spec
	43	typedef struct {\r
	44	UINT8 DataType; // DMA4_CSDPi[1:0]\r
	45	UINT8 ReadPortAccessType; // DMA4_CSDPi[8:7]\r
	46	UINT8 WritePortAccessType; // DMA4_CSDPi[15:14]\r
	47	UINT8 SourceEndiansim; // DMA4_CSDPi[21]\r
	48	UINT8 DestinationEndianism; // DMA4_CSDPi[19]\r
	49	UINT8 WriteMode; // DMA4_CSDPi[17:16]\r
	50	UINT8 SourcePacked; // DMA4_CSDPi[6]\r
	51	UINT8 DestinationPacked; // DMA4_CSDPi[13]\r
	52	UINT32 NumberOfElementPerFrame; // DMA4_CENi\r
	53	UINT32 NumberOfFramePerTransferBlock; // DMA4_CFNi\r
	54	UINT32 SourceStartAddress; // DMA4_CSSAi\r
	55	UINT32 DestinationStartAddress; // DMA4_CDSAi\r
	56	UINT32 SourceElementIndex; // DMA4_CSEi\r
	57	UINT32 SourceFrameIndex; // DMA4_CSFi\r
	58	UINT32 DestinationElementIndex; // DMA4_CDEi\r
	59	UINT32 DestinationFrameIndex; // DMA4_CDFi\r
	60	UINT8 ReadPortAccessMode; // DMA4_CCRi[13:12]\r
	61	UINT8 WritePortAccessMode; // DMA4_CCRi[15:14]\r
	62	UINT8 ReadPriority; // DMA4_CCRi[6]\r
	63	UINT8 WritePriority; // DMA4_CCRi[23]\r
	64	UINT8 ReadRequestNumber; // DMA4_CCRi[4:0]\r
65	UINT8 WriteRequestNumber; // DMA4_CCRi[20:19]
66	} OMAP_DMA4;
67
68
69	/** \r
70	Configure OMAP DMA Channel\r
71	\r
72	@param Channel DMA Channel to configure\r
73	@param Dma4 Pointer to structure used to initialize DMA registers for the Channel \r
74	\r
75	@retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.\r
76	@retval EFI_INVALID_PARAMETER Channel is not valid\r
77	@retval EFI_DEVICE_ERROR The system hardware could not map the requested information.\r
78	\r
79	**/
80	EFI_STATUS
81	EFIAPI
82	EnableDmaChannel (
83	IN UINTN Channel,
84	IN OMAP_DMA4 *Dma4
85	);
86
87	/** \r
88	Turn of DMA channel configured by EnableDma().\r
89	\r
90	@param Channel DMA Channel to configure\r
9f6b977f	91	@param SuccesMask Bits in DMA4_CSR register indicate EFI_SUCCESS\r
9f6b977f	92	@param ErrorMask Bits in DMA4_CSR register indicate EFI_DEVICE_ERROR\r
7f814ffd	93	\r
	94	@retval EFI_SUCCESS DMA hardware disabled\r
	95	@retval EFI_INVALID_PARAMETER Channel is not valid\r
	96	@retval EFI_DEVICE_ERROR The system hardware could not map the requested information.\r
	97	\r
	98	**/
	99	EFI_STATUS
	100	EFIAPI
	101	DisableDmaChannel (
9f6b977f	102	IN UINTN Channel,
	103	IN UINT32 SuccessMask,
	104	IN UINT32 ErrorMask
7f814ffd	105	);
	106
	107
	108	/** \r
	109	Provides the DMA controller-specific addresses needed to access system memory.\r
	110	\r
	111	Operation is relative to the DMA bus master.\r
	112	\r
	113	@param Operation Indicates if the bus master is going to read or write to system memory.\r
	114	@param HostAddress The system memory address to map to the DMA controller.\r
	115	@param NumberOfBytes On input the number of bytes to map. On output the number of bytes\r
	116	that were mapped. \r
	117	@param DeviceAddress The resulting map address for the bus master controller to use to\r
	118	access the hosts HostAddress. \r
	119	@param Mapping A resulting value to pass to Unmap().\r
	120	\r
	121	@retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.\r
	122	@retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer. \r
	123	@retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
	124	@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
	125	@retval EFI_DEVICE_ERROR The system hardware could not map the requested address.\r
	126	\r
	127	**/
	128	EFI_STATUS
	129	EFIAPI
	130	DmaMap (
	131	IN DMA_MAP_OPERATION Operation,
	132	IN VOID *HostAddress,\r
	133	IN OUT UINTN *NumberOfBytes,\r
	134	OUT PHYSICAL_ADDRESS *DeviceAddress,\r
	135	OUT VOID **Mapping\r
	136	);
	137
	138
	139
	140
	141	/** \r
	142	Completes the DmaMapBusMasterRead(), DmaMapBusMasterWrite(), or DmaMapBusMasterCommonBuffer()\r
	143	operation and releases any corresponding resources.\r
	144	\r
	145	@param Mapping The mapping value returned from DmaMap*().\r
	146	\r
	147	@retval EFI_SUCCESS The range was unmapped.\r
	148	@retval EFI_DEVICE_ERROR The data was not committed to the target system memory.\r
	149	\r
	150	**/
	151	EFI_STATUS
	152	EFIAPI
	153	DmaUnmap (
	154	IN VOID *Mapping\r
	155	);
	156
	157
	158	/** \r
	159	Allocates pages that are suitable for an DmaMap() of type MapOperationBusMasterCommonBuffer.\r
	160	mapping. \r
	161	\r
	162	@param MemoryType The type of memory to allocate, EfiBootServicesData or\r
	163	EfiRuntimeServicesData. \r
	164	@param Pages The number of pages to allocate. \r
	165	@param HostAddress A pointer to store the base system memory address of the\r
	166	allocated range. \r
	167	\r
	168	@retval EFI_SUCCESS The requested memory pages were allocated.\r
169	@retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are\r
170	MEMORY_WRITE_COMBINE and MEMORY_CACHED. \r
171	@retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
172	@retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated. \r
173	\r
174	**/
175	EFI_STATUS
176	EFIAPI
177	DmaAllocateBuffer (
178	IN EFI_MEMORY_TYPE MemoryType,
179	IN UINTN Pages,\r
180	OUT VOID **HostAddress\r
181	);\r
182
183
184	/** \r
185	Frees memory that was allocated with DmaAllocateBuffer().\r
186	\r
187	@param Pages The number of pages to free. \r
188	@param HostAddress The base system memory address of the allocated range. \r
189	\r
190	@retval EFI_SUCCESS The requested memory pages were freed.\r
191	@retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages\r
192	was not allocated with DmaAllocateBuffer().\r
193	\r
194	**/\r
195	EFI_STATUS
196	EFIAPI
197	DmaFreeBuffer (
198	IN UINTN Pages,\r
199	IN VOID *HostAddress\r
200	);\r
201
202
203	#endif
204