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1 | /** @file |
| 2 | |
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3 | Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> |
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4 | |
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5 | This program and the accompanying materials |
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6 | are licensed and made available under the terms and conditions of the BSD License |
| 7 | which accompanies this distribution. The full text of the license may be found at |
| 8 | http://opensource.org/licenses/bsd-license.php |
| 9 | |
| 10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, |
| 11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. |
| 12 | |
| 13 | **/ |
| 14 | |
| 15 | #ifndef __OMAP3530TIMER_H__ |
| 16 | #define __OMAP3530TIMER_H__ |
| 17 | |
| 18 | #define GPTIMER1_BASE (0x48313000) |
| 19 | #define GPTIMER2_BASE (0x49032000) |
| 20 | #define GPTIMER3_BASE (0x49034000) |
| 21 | #define GPTIMER4_BASE (0x49036000) |
| 22 | #define GPTIMER5_BASE (0x49038000) |
| 23 | #define GPTIMER6_BASE (0x4903A000) |
| 24 | #define GPTIMER7_BASE (0x4903C000) |
| 25 | #define GPTIMER8_BASE (0x4903E000) |
| 26 | #define GPTIMER9_BASE (0x49040000) |
| 27 | #define GPTIMER10_BASE (0x48086000) |
| 28 | #define GPTIMER11_BASE (0x48088000) |
| 29 | #define GPTIMER12_BASE (0x48304000) |
| 30 | #define WDTIMER2_BASE (0x48314000) |
| 31 | |
| 32 | #define GPTIMER_TIOCP_CFG (0x0010) |
| 33 | #define GPTIMER_TISTAT (0x0014) |
| 34 | #define GPTIMER_TISR (0x0018) |
| 35 | #define GPTIMER_TIER (0x001C) |
| 36 | #define GPTIMER_TWER (0x0020) |
| 37 | #define GPTIMER_TCLR (0x0024) |
| 38 | #define GPTIMER_TCRR (0x0028) |
| 39 | #define GPTIMER_TLDR (0x002C) |
| 40 | #define GPTIMER_TTGR (0x0030) |
| 41 | #define GPTIMER_TWPS (0x0034) |
| 42 | #define GPTIMER_TMAR (0x0038) |
| 43 | #define GPTIMER_TCAR1 (0x003C) |
| 44 | #define GPTIMER_TSICR (0x0040) |
| 45 | #define GPTIMER_TCAR2 (0x0044) |
| 46 | #define GPTIMER_TPIR (0x0048) |
| 47 | #define GPTIMER_TNIR (0x004C) |
| 48 | #define GPTIMER_TCVR (0x0050) |
| 49 | #define GPTIMER_TOCR (0x0054) |
| 50 | #define GPTIMER_TOWR (0x0058) |
| 51 | |
| 52 | #define WSPR (0x048) |
| 53 | |
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54 | #define TISR_TCAR_IT_FLAG_MASK BIT2 |
| 55 | #define TISR_OVF_IT_FLAG_MASK BIT1 |
| 56 | #define TISR_MAT_IT_FLAG_MASK BIT0 |
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57 | #define TISR_ALL_INTERRUPT_MASK (TISR_TCAR_IT_FLAG_MASK | TISR_OVF_IT_FLAG_MASK | TISR_MAT_IT_FLAG_MASK) |
| 58 | |
| 59 | #define TISR_TCAR_IT_FLAG_NOT_PENDING (0UL << 2) |
| 60 | #define TISR_OVF_IT_FLAG_NOT_PENDING (0UL << 1) |
| 61 | #define TISR_MAT_IT_FLAG_NOT_PENDING (0UL << 0) |
| 62 | #define TISR_NO_INTERRUPTS_PENDING (TISR_TCAR_IT_FLAG_NOT_PENDING | TISR_OVF_IT_FLAG_NOT_PENDING | TISR_MAT_IT_FLAG_NOT_PENDING) |
| 63 | |
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64 | #define TISR_TCAR_IT_FLAG_CLEAR BIT2 |
| 65 | #define TISR_OVF_IT_FLAG_CLEAR BIT1 |
| 66 | #define TISR_MAT_IT_FLAG_CLEAR BIT0 |
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67 | #define TISR_CLEAR_ALL (TISR_TCAR_IT_FLAG_CLEAR | TISR_OVF_IT_FLAG_CLEAR | TISR_MAT_IT_FLAG_CLEAR) |
| 68 | |
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69 | #define TCLR_AR_AUTORELOAD BIT1 |
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70 | #define TCLR_AR_ONESHOT (0UL << 1) |
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71 | #define TCLR_ST_ON BIT0 |
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72 | #define TCLR_ST_OFF (0UL << 0) |
| 73 | |
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74 | #define TIER_TCAR_IT_ENABLE (BIT2 |
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75 | #define TIER_TCAR_IT_DISABLE (0UL << 2) |
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76 | #define TIER_OVF_IT_ENABLE BIT1 |
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77 | #define TIER_OVF_IT_DISABLE (0UL << 1) |
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78 | #define TIER_MAT_IT_ENABLE BIT0 |
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79 | #define TIER_MAT_IT_DISABLE (0UL << 0) |
| 80 | |
| 81 | #endif // __OMAP3530TIMER_H__ |
| 82 | |
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