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a3f98646 | 1 | /** @file |
2 | ||
3d70643b | 3 | Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR> |
a3f98646 | 4 | |
3d70643b | 5 | This program and the accompanying materials |
a3f98646 | 6 | are licensed and made available under the terms and conditions of the BSD License |
7 | which accompanies this distribution. The full text of the license may be found at | |
8 | http://opensource.org/licenses/bsd-license.php | |
9 | ||
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. | |
12 | ||
13 | **/ | |
14 | ||
15 | #ifndef __TPS65950_H__ | |
16 | #define __TPS65950_H__ | |
17 | ||
18 | #define EXTERNAL_DEVICE_REGISTER_TO_SLAVE_ADDRESS(x) (((x) >> 8) & 0xFF) | |
19 | #define EXTERNAL_DEVICE_REGISTER_TO_REGISTER(x) ((x) & 0xFF) | |
20 | #define EXTERNAL_DEVICE_REGISTER(SlaveAddress, Register) (((SlaveAddress) & 0xFF) << 8 | ((Register) & 0xFF)) | |
21 | ||
5ec65e96 | 22 | // I2C Address group |
a3f98646 | 23 | #define I2C_ADDR_GRP_ID1 0x48 |
24 | #define I2C_ADDR_GRP_ID2 0x49 | |
25 | #define I2C_ADDR_GRP_ID3 0x4A | |
26 | #define I2C_ADDR_GRP_ID4 0x4B | |
27 | #define I2C_ADDR_GRP_ID5 0x12 | |
28 | ||
5ec65e96 | 29 | // MMC definitions. |
a3f98646 | 30 | #define VMMC1_DEV_GRP 0x82 |
43263288 | 31 | #define DEV_GRP_P1 BIT5 |
a3f98646 | 32 | |
33 | #define VMMC1_DEDICATED_REG 0x85 | |
34 | #define VSEL_1_85V 0x0 | |
35 | #define VSEL_2_85V 0x1 | |
36 | #define VSEL_3_00V 0x2 | |
37 | #define VSEL_3_15V 0x3 | |
38 | ||
8c6151f2 | 39 | #define TPS65950_GPIO_CTRL 0xaa //I2C_ADDR_GRP_ID2 |
40 | #define CARD_DETECT_ENABLE (BIT2 | BIT0) // GPIO ON + GPIO CD1 enabled | |
41 | ||
42 | ||
43 | #define GPIODATAIN1 0x98 //I2C_ADDR_GRP_ID2 | |
44 | #define CARD_DETECT_BIT BIT0 | |
45 | ||
5ec65e96 | 46 | // LEDEN register |
a3f98646 | 47 | #define LEDEN 0xEE |
43263288 | 48 | #define LEDAON BIT0 |
49 | #define LEDBON BIT1 | |
50 | #define LEDAPWM BIT4 | |
51 | #define LEDBPWM BIT5 | |
a3f98646 | 52 | |
5ec65e96 | 53 | // RTC registers |
54 | #define SECONDS_REG 0x1C | |
55 | #define MINUTES_REG 0x1D | |
56 | #define HOURS_REG 0x1E | |
57 | #define DAYS_REG 0x1F | |
58 | #define MONTHS_REG 0x20 | |
59 | #define YEARS_REG 0x21 | |
60 | #define WEEKS_REG 0x22 | |
61 | #define RTC_CTRL_REG 0x29 | |
62 | ||
6b73be80 | 63 | // USB PHY power |
64 | #define VAUX2_DEDICATED 0x79 | |
65 | #define VAUX2_DEV_GRP 0x76 | |
66 | ||
efe5f1a2 | 67 | #define VAUX_DEV_GRP_NONE 0x00 |
6b73be80 | 68 | #define VAUX_DEV_GRP_P1 0x20 |
efe5f1a2 | 69 | #define VAUX_DEV_GRP_P2 0x40 |
70 | #define VAUX_DEV_GRP_P3 0x80 | |
6b73be80 | 71 | #define VAUX_DEDICATED_18V 0x05 |
72 | ||
efe5f1a2 | 73 | // Display subsystem |
74 | #define VPLL2_DEDICATED 0x91 | |
75 | #define VPLL2_DEV_GRP 0x8E | |
76 | ||
77 | #define GPIODATADIR1 0x9B | |
78 | #define SETGPIODATAOUT1 0xA4 | |
79 | ||
a3f98646 | 80 | #endif //__TPS65950_H__ |