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Added DebugAgentTimerLib. Cleaned up .h files and other code.
[mirror_edk2.git] / Omap35xxPkg / Library / DebugAgentTimerLib / DebugAgentTimerLib.c
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43263288 1/** @file\r
2 Debug Agent timer lib for OMAP 35xx.\r
3\r
4 Copyright (c) 2008-2010, Apple Inc. All rights reserved.\r
5 \r
6 All rights reserved. This program and the accompanying materials\r
7 are licensed and made available under the terms and conditions of the BSD License\r
8 which accompanies this distribution. The full text of the license may be found at\r
9 http://opensource.org/licenses/bsd-license.php\r
10\r
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13\r
14**/\r
15#include <Base.h>\r
16#include <Library/BaseLib.h>
17#include <Library/IoLib.h>
18#include <Library/OmapLib.h>
19#include <Library/ArmLib.h>\r
20#include <Library/PcdLib.h>
21\r
22#include <Omap3530/Omap3530.h>
23\r
24\r
25volatile UINT32 gVector;\r
26
27// Cached registers
28volatile UINT32 gTISR;
29volatile UINT32 gTCLR;
30volatile UINT32 gTLDR;
31volatile UINT32 gTCRR;
32volatile UINT32 gTIER;
33\r
34VOID\r
35EnableInterruptSource (\r
36 VOID\r
37 )\r
38{\r
39 UINTN Bank;\r
40 UINTN Bit;\r
41\r
42 // Map vector to FIQ, IRQ is default\r
43 MmioWrite32 (INTCPS_ILR (gVector), 1);\r
44\r
45 Bank = gVector / 32;\r
46 Bit = 1UL << (gVector % 32);\r
47 \r
48 MmioWrite32 (INTCPS_MIR_CLEAR(Bank), Bit);\r
49}\r
50\r
51VOID\r
52DisableInterruptSource (\r
53 VOID\r
54 )\r
55{\r
56 UINTN Bank;\r
57 UINTN Bit;\r
58 \r
59 Bank = gVector / 32;\r
60 Bit = 1UL << (gVector % 32); \r
61\r
62 MmioWrite32 (INTCPS_MIR_SET(Bank), Bit);\r
63}\r
64\r
65\r
66\r
67/**\r
68 Setup all the hardware needed for the debug agents timer.\r
69\r
70 This function is used to set up debug enviroment. It may enable interrupts.\r
71\r
72**/\r
73VOID\r
74EFIAPI\r
75DebugAgentTimerIntialize (\r
76 VOID\r
77 )\r
78{\r
79 UINT32 TimerBaseAddress;\r
80\r
81\r
82 gVector = InterruptVectorForTimer (PcdGet32(PcdOmap35xxDebugAgentTimer));
83\r
84 // Set up the timer registers
85 TimerBaseAddress = TimerBase (PcdGet32(PcdOmap35xxDebugAgentTimer));
86 gTISR = TimerBaseAddress + GPTIMER_TISR;
87 gTCLR = TimerBaseAddress + GPTIMER_TCLR;
88 gTLDR = TimerBaseAddress + GPTIMER_TLDR;
89 gTCRR = TimerBaseAddress + GPTIMER_TCRR;
90 gTIER = TimerBaseAddress + GPTIMER_TIER;
91\r
92 DisableInterruptSource ();\r
93}\r
94 \r
95 \r
96/**\r
97 Set the period for the debug agent timer. Zero means disable the timer.\r
98\r
99 @param[in] TimerPeriodMilliseconds Frequency of the debug agent timer.\r
100\r
101**/ \r
102VOID\r
103EFIAPI\r
104DebugAgentTimerSetPeriod (\r
105 IN UINT32 TimerPeriodMilliseconds\r
106 )\r
107{\r
108 UINT64 TimerCount;
109 INT32 LoadValue;
110
111 if (TimerPeriodMilliseconds == 0) {
112 // Turn off GPTIMER3
113 MmioWrite32 (gTCLR, TCLR_ST_OFF);
114
115 DisableInterruptSource ();
116 } else {
117 // Calculate required timer count
118 TimerCount = DivU64x32(TimerPeriodMilliseconds * 1000000, PcdGet32(PcdDebugAgentTimerFreqNanoSeconds));
119
120 // Set GPTIMER5 Load register
121 LoadValue = (INT32) -TimerCount;
122 MmioWrite32 (gTLDR, LoadValue);
123 MmioWrite32 (gTCRR, LoadValue);
124
125 // Enable Overflow interrupt
126 MmioWrite32 (gTIER, TIER_TCAR_IT_DISABLE | TIER_OVF_IT_ENABLE | TIER_MAT_IT_DISABLE);
127
128 // Turn on GPTIMER3, it will reload at overflow
129 MmioWrite32 (gTCLR, TCLR_AR_AUTORELOAD | TCLR_ST_ON);
130
131 EnableInterruptSource ();
132 }
133}\r
134 \r
135\r
136/**\r
137 Perform End Of Interrupt for the debug agent timer. This is called in the \r
138 interrupt handler after the interrupt has been processed. \r
139\r
140**/ \r
141VOID\r
142EFIAPI\r
143DebugAgentTimerEndOfInterrupt (\r
144 VOID\r
145 )\r
146{\r
147 // Clear all timer interrupts
148 MmioWrite32 (gTISR, TISR_CLEAR_ALL);
149
150 // Poll interrupt status bits to ensure clearing
151 while ((MmioRead32 (gTISR) & TISR_ALL_INTERRUPT_MASK) != TISR_NO_INTERRUPTS_PENDING);\r
152\r
153 MmioWrite32 (INTCPS_CONTROL, INTCPS_CONTROL_NEWFIQAGR);\r
154 ArmDataSyncronizationBarrier ();\r
155\r
156}\r
157 \r
158