Omap35xxPkg/MMCHSDxe: fix device path initializer
[mirror_edk2.git] / Omap35xxPkg / MMCHSDxe / MMCHS.c
CommitLineData
1e57a462 1/** @file\r
2 MMC/SD Card driver for OMAP 35xx (SDIO not supported)\r
3\r
4 This driver always produces a BlockIo protocol but it starts off with no Media\r
3402aac7
RC
5 present. A TimerCallBack detects when media is inserted or removed and after\r
6 a media change event a call to BlockIo ReadBlocks/WriteBlocks will cause the\r
1e57a462 7 media to be detected (or removed) and the BlockIo Media structure will get\r
8 updated. No MMC/SD Card harward registers are updated until the first BlockIo\r
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RC
9 ReadBlocks/WriteBlocks after media has been insterted (booting with a card\r
10 plugged in counts as an insertion event).\r
1e57a462 11\r
12 Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
3402aac7 13\r
1e57a462 14 This program and the accompanying materials\r
15 are licensed and made available under the terms and conditions of the BSD License\r
16 which accompanies this distribution. The full text of the license may be found at\r
17 http://opensource.org/licenses/bsd-license.php\r
18\r
19 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
20 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
21\r
22**/\r
23\r
24#include "MMCHS.h"\r
25\r
26EFI_BLOCK_IO_MEDIA gMMCHSMedia = {\r
27 SIGNATURE_32('s','d','i','o'), // MediaId\r
28 TRUE, // RemovableMedia\r
29 FALSE, // MediaPresent\r
30 FALSE, // LogicalPartition\r
31 FALSE, // ReadOnly\r
32 FALSE, // WriteCaching\r
33 512, // BlockSize\r
34 4, // IoAlign\r
35 0, // Pad\r
36 0 // LastBlock\r
37};\r
38\r
39typedef struct {\r
40 VENDOR_DEVICE_PATH Mmc;\r
41 EFI_DEVICE_PATH End;\r
42} MMCHS_DEVICE_PATH;\r
43\r
44MMCHS_DEVICE_PATH gMmcHsDevicePath = {\r
45 {\r
4211614d
AB
46 {\r
47 HARDWARE_DEVICE_PATH,\r
48 HW_VENDOR_DP,\r
49 {\r
50 (UINT8)(sizeof(VENDOR_DEVICE_PATH)),\r
51 (UINT8)((sizeof(VENDOR_DEVICE_PATH)) >> 8),\r
52 },\r
53 },\r
54 { 0xb615f1f5, 0x5088, 0x43cd, { 0x80, 0x9c, 0xa1, 0x6e, 0x52, 0x48, 0x7d, 0x00 } },\r
1e57a462 55 },\r
56 {\r
57 END_DEVICE_PATH_TYPE,\r
58 END_ENTIRE_DEVICE_PATH_SUBTYPE,\r
b0fdce95 59 { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0 }\r
1e57a462 60 }\r
61};\r
62\r
63CARD_INFO gCardInfo;\r
64EMBEDDED_EXTERNAL_DEVICE *gTPS65950;\r
65EFI_EVENT gTimerEvent;\r
66BOOLEAN gMediaChange = FALSE;\r
67\r
68//\r
69// Internal Functions\r
70//\r
71\r
72\r
73VOID\r
74ParseCardCIDData (\r
3402aac7
RC
75 UINT32 Response0,\r
76 UINT32 Response1,\r
1e57a462 77 UINT32 Response2,\r
78 UINT32 Response3\r
79 )\r
80{\r
81 gCardInfo.CIDData.MDT = ((Response0 >> 8) & 0xFFF);\r
82 gCardInfo.CIDData.PSN = (((Response0 >> 24) & 0xFF) | ((Response1 & 0xFFFFFF) << 8));\r
83 gCardInfo.CIDData.PRV = ((Response1 >> 24) & 0xFF);\r
84 gCardInfo.CIDData.PNM[4] = ((Response2) & 0xFF);\r
85 gCardInfo.CIDData.PNM[3] = ((Response2 >> 8) & 0xFF);\r
86 gCardInfo.CIDData.PNM[2] = ((Response2 >> 16) & 0xFF);\r
87 gCardInfo.CIDData.PNM[1] = ((Response2 >> 24) & 0xFF);\r
88 gCardInfo.CIDData.PNM[0] = ((Response3) & 0xFF);\r
89 gCardInfo.CIDData.OID = ((Response3 >> 8) & 0xFFFF);\r
90 gCardInfo.CIDData.MID = ((Response3 >> 24) & 0xFF);\r
91}\r
92\r
93\r
94VOID\r
95UpdateMMCHSClkFrequency (\r
96 UINTN NewCLKD\r
97 )\r
98{\r
99 //Set Clock enable to 0x0 to not provide the clock to the card\r
100 MmioAnd32 (MMCHS_SYSCTL, ~CEN);\r
101\r
102 //Set new clock frequency.\r
3402aac7 103 MmioAndThenOr32 (MMCHS_SYSCTL, ~CLKD_MASK, NewCLKD << 6);\r
1e57a462 104\r
105 //Poll till Internal Clock Stable\r
106 while ((MmioRead32 (MMCHS_SYSCTL) & ICS_MASK) != ICS);\r
107\r
108 //Set Clock enable to 0x1 to provide the clock to the card\r
109 MmioOr32 (MMCHS_SYSCTL, CEN);\r
110}\r
111\r
112\r
113EFI_STATUS\r
114SendCmd (\r
115 UINTN Cmd,\r
116 UINTN CmdInterruptEnableVal,\r
117 UINTN CmdArgument\r
118 )\r
119{\r
120 UINTN MmcStatus;\r
121 UINTN RetryCount = 0;\r
122\r
123 //Check if command line is in use or not. Poll till command line is available.\r
124 while ((MmioRead32 (MMCHS_PSTATE) & DATI_MASK) == DATI_NOT_ALLOWED);\r
125\r
126 //Provide the block size.\r
127 MmioWrite32 (MMCHS_BLK, BLEN_512BYTES);\r
128\r
129 //Setting Data timeout counter value to max value.\r
130 MmioAndThenOr32 (MMCHS_SYSCTL, ~DTO_MASK, DTO_VAL);\r
131\r
132 //Clear Status register.\r
133 MmioWrite32 (MMCHS_STAT, 0xFFFFFFFF);\r
134\r
135 //Set command argument register\r
136 MmioWrite32 (MMCHS_ARG, CmdArgument);\r
137\r
138 //Enable interrupt enable events to occur\r
139 MmioWrite32 (MMCHS_IE, CmdInterruptEnableVal);\r
140\r
141 //Send a command\r
142 MmioWrite32 (MMCHS_CMD, Cmd);\r
143\r
144 //Check for the command status.\r
145 while (RetryCount < MAX_RETRY_COUNT) {\r
146 do {\r
147 MmcStatus = MmioRead32 (MMCHS_STAT);\r
148 } while (MmcStatus == 0);\r
149\r
150 //Read status of command response\r
151 if ((MmcStatus & ERRI) != 0) {\r
152\r
153 //Perform soft-reset for mmci_cmd line.\r
154 MmioOr32 (MMCHS_SYSCTL, SRC);\r
155 while ((MmioRead32 (MMCHS_SYSCTL) & SRC));\r
156\r
157 DEBUG ((EFI_D_INFO, "MmcStatus: %x\n", MmcStatus));\r
158 return EFI_DEVICE_ERROR;\r
159 }\r
160\r
161 //Check if command is completed.\r
162 if ((MmcStatus & CC) == CC) {\r
163 MmioWrite32 (MMCHS_STAT, CC);\r
164 break;\r
165 }\r
166\r
167 RetryCount++;\r
168 }\r
169\r
170 if (RetryCount == MAX_RETRY_COUNT) {\r
171 return EFI_TIMEOUT;\r
172 }\r
173\r
174 return EFI_SUCCESS;\r
175}\r
176\r
177\r
178VOID\r
179GetBlockInformation (\r
180 UINTN *BlockSize,\r
181 UINTN *NumBlocks\r
182 )\r
183{\r
184 CSD_SDV2 *CsdSDV2Data;\r
185 UINTN CardSize;\r
186\r
187 if (gCardInfo.CardType == SD_CARD_2_HIGH) {\r
188 CsdSDV2Data = (CSD_SDV2 *)&gCardInfo.CSDData;\r
189\r
190 //Populate BlockSize.\r
191 *BlockSize = (0x1UL << CsdSDV2Data->READ_BL_LEN);\r
192\r
193 //Calculate Total number of blocks.\r
194 CardSize = CsdSDV2Data->C_SIZELow16 | (CsdSDV2Data->C_SIZEHigh6 << 2);\r
195 *NumBlocks = ((CardSize + 1) * 1024);\r
196 } else {\r
197 //Populate BlockSize.\r
198 *BlockSize = (0x1UL << gCardInfo.CSDData.READ_BL_LEN);\r
199\r
200 //Calculate Total number of blocks.\r
201 CardSize = gCardInfo.CSDData.C_SIZELow2 | (gCardInfo.CSDData.C_SIZEHigh10 << 2);\r
202 *NumBlocks = (CardSize + 1) * (1 << (gCardInfo.CSDData.C_SIZE_MULT + 2));\r
203 }\r
204\r
205 //For >=2G card, BlockSize may be 1K, but the transfer size is 512 bytes.\r
206 if (*BlockSize > 512) {\r
207 *NumBlocks = MultU64x32(*NumBlocks, *BlockSize/2);\r
208 *BlockSize = 512;\r
209 }\r
210\r
211 DEBUG ((EFI_D_INFO, "Card type: %x, BlockSize: %x, NumBlocks: %x\n", gCardInfo.CardType, *BlockSize, *NumBlocks));\r
212}\r
213\r
214\r
215VOID\r
216CalculateCardCLKD (\r
217 UINTN *ClockFrequencySelect\r
218 )\r
219{\r
220 UINT8 MaxDataTransferRate;\r
221 UINTN TransferRateValue = 0;\r
222 UINTN TimeValue = 0 ;\r
223 UINTN Frequency = 0;\r
224\r
225 MaxDataTransferRate = gCardInfo.CSDData.TRAN_SPEED;\r
226\r
227 // For SD Cards we would need to send CMD6 to set\r
228 // speeds abouve 25MHz. High Speed mode 50 MHz and up\r
229\r
230 //Calculate Transfer rate unit (Bits 2:0 of TRAN_SPEED)\r
231 switch (MaxDataTransferRate & 0x7) {\r
232 case 0:\r
233 TransferRateValue = 100 * 1000;\r
234 break;\r
235\r
236 case 1:\r
237 TransferRateValue = 1 * 1000 * 1000;\r
238 break;\r
239\r
240 case 2:\r
241 TransferRateValue = 10 * 1000 * 1000;\r
242 break;\r
243\r
244 case 3:\r
245 TransferRateValue = 100 * 1000 * 1000;\r
246 break;\r
247\r
248 default:\r
249 DEBUG((EFI_D_ERROR, "Invalid parameter.\n"));\r
250 ASSERT(FALSE);\r
251 }\r
252\r
253 //Calculate Time value (Bits 6:3 of TRAN_SPEED)\r
254 switch ((MaxDataTransferRate >> 3) & 0xF) {\r
255 case 1:\r
256 TimeValue = 10;\r
257 break;\r
258\r
259 case 2:\r
260 TimeValue = 12;\r
261 break;\r
262\r
263 case 3:\r
264 TimeValue = 13;\r
265 break;\r
266\r
267 case 4:\r
268 TimeValue = 15;\r
269 break;\r
270\r
271 case 5:\r
272 TimeValue = 20;\r
273 break;\r
274\r
275 case 6:\r
276 TimeValue = 25;\r
277 break;\r
278\r
279 case 7:\r
280 TimeValue = 30;\r
281 break;\r
282\r
283 case 8:\r
284 TimeValue = 35;\r
285 break;\r
286\r
287 case 9:\r
288 TimeValue = 40;\r
289 break;\r
290\r
291 case 10:\r
292 TimeValue = 45;\r
293 break;\r
294\r
295 case 11:\r
296 TimeValue = 50;\r
297 break;\r
298\r
299 case 12:\r
300 TimeValue = 55;\r
301 break;\r
302\r
303 case 13:\r
304 TimeValue = 60;\r
305 break;\r
306\r
307 case 14:\r
308 TimeValue = 70;\r
309 break;\r
310\r
311 case 15:\r
312 TimeValue = 80;\r
313 break;\r
314\r
315 default:\r
316 DEBUG((EFI_D_ERROR, "Invalid parameter.\n"));\r
317 ASSERT(FALSE);\r
318 }\r
319\r
320 Frequency = TransferRateValue * TimeValue/10;\r
321\r
322 //Calculate Clock divider value to program in MMCHS_SYSCTL[CLKD] field.\r
323 *ClockFrequencySelect = ((MMC_REFERENCE_CLK/Frequency) + 1);\r
324\r
325 DEBUG ((EFI_D_INFO, "MaxDataTransferRate: 0x%x, Frequency: %d KHz, ClockFrequencySelect: %x\n", MaxDataTransferRate, Frequency/1000, *ClockFrequencySelect));\r
326}\r
327\r
328\r
329VOID\r
330GetCardConfigurationData (\r
331 VOID\r
332 )\r
333{\r
334 UINTN BlockSize;\r
335 UINTN NumBlocks;\r
336 UINTN ClockFrequencySelect;\r
337\r
338 //Calculate BlockSize and Total number of blocks in the detected card.\r
339 GetBlockInformation(&BlockSize, &NumBlocks);\r
340 gCardInfo.BlockSize = BlockSize;\r
341 gCardInfo.NumBlocks = NumBlocks;\r
342\r
343 //Calculate Card clock divider value.\r
344 CalculateCardCLKD(&ClockFrequencySelect);\r
345 gCardInfo.ClockFrequencySelect = ClockFrequencySelect;\r
346}\r
347\r
348\r
349EFI_STATUS\r
350InitializeMMCHS (\r
351 VOID\r
352 )\r
353{\r
354 UINT8 Data = 0;\r
355 EFI_STATUS Status;\r
356\r
357 //Select Device group to belong to P1 device group in Power IC.\r
358 Data = DEV_GRP_P1;\r
359 Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, VMMC1_DEV_GRP), 1, &Data);\r
360 ASSERT_EFI_ERROR(Status);\r
361\r
362 //Configure voltage regulator for MMC1 in Power IC to output 3.0 voltage.\r
363 Data = VSEL_3_00V;\r
364 Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, VMMC1_DEDICATED_REG), 1, &Data);\r
365 ASSERT_EFI_ERROR(Status);\r
3402aac7 366\r
1e57a462 367 //After ramping up voltage, set VDDS stable bit to indicate that voltage level is stable.\r
368 MmioOr32 (CONTROL_PBIAS_LITE, (PBIASLITEVMODE0 | PBIASLITEPWRDNZ0 | PBIASSPEEDCTRL0 | PBIASLITEVMODE1 | PBIASLITEWRDNZ1));\r
369\r
370 // Enable WP GPIO\r
371 MmioAndThenOr32 (GPIO1_BASE + GPIO_OE, ~BIT23, BIT23);\r
372\r
373 // Enable Card Detect\r
374 Data = CARD_DETECT_ENABLE;\r
375 gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID2, TPS65950_GPIO_CTRL), 1, &Data);\r
376\r
377\r
378 return Status;\r
379}\r
380\r
381\r
382EFI_STATUS\r
383PerformCardIdenfication (\r
384 VOID\r
385 )\r
386{\r
387 EFI_STATUS Status;\r
388 UINTN CmdArgument = 0;\r
389 UINTN Response = 0;\r
390 UINTN RetryCount = 0;\r
391 BOOLEAN SDCmd8Supported = FALSE;\r
392\r
393 //Enable interrupts.\r
394 MmioWrite32 (MMCHS_IE, (BADA_EN | CERR_EN | DEB_EN | DCRC_EN | DTO_EN | CIE_EN |\r
395 CEB_EN | CCRC_EN | CTO_EN | BRR_EN | BWR_EN | TC_EN | CC_EN));\r
396\r
397 //Controller INIT procedure start.\r
398 MmioOr32 (MMCHS_CON, INIT);\r
399 MmioWrite32 (MMCHS_CMD, 0x00000000);\r
400 while (!(MmioRead32 (MMCHS_STAT) & CC));\r
401\r
402 //Wait for 1 ms\r
403 gBS->Stall(1000);\r
404\r
405 //Set CC bit to 0x1 to clear the flag\r
406 MmioOr32 (MMCHS_STAT, CC);\r
407\r
408 //Retry INIT procedure.\r
409 MmioWrite32 (MMCHS_CMD, 0x00000000);\r
410 while (!(MmioRead32 (MMCHS_STAT) & CC));\r
411\r
412 //End initialization sequence\r
413 MmioAnd32 (MMCHS_CON, ~INIT);\r
414\r
415 MmioOr32 (MMCHS_HCTL, (SDVS_3_0_V | DTW_1_BIT | SDBP_ON));\r
416\r
417 //Change clock frequency to 400KHz to fit protocol\r
418 UpdateMMCHSClkFrequency(CLKD_400KHZ);\r
419\r
420 MmioOr32 (MMCHS_CON, OD);\r
421\r
422 //Send CMD0 command.\r
423 Status = SendCmd (CMD0, CMD0_INT_EN, CmdArgument);\r
424 if (EFI_ERROR(Status)) {\r
425 DEBUG ((EFI_D_ERROR, "Cmd0 fails.\n"));\r
426 return Status;\r
427 }\r
428\r
429 DEBUG ((EFI_D_INFO, "CMD0 response: %x\n", MmioRead32 (MMCHS_RSP10)));\r
430\r
3402aac7 431 //Send CMD5 command.\r
1e57a462 432 Status = SendCmd (CMD5, CMD5_INT_EN, CmdArgument);\r
433 if (Status == EFI_SUCCESS) {\r
434 DEBUG ((EFI_D_ERROR, "CMD5 Success. SDIO card. Follow SDIO card specification.\n"));\r
435 DEBUG ((EFI_D_INFO, "CMD5 response: %x\n", MmioRead32 (MMCHS_RSP10)));\r
436 //NOTE: Returning unsupported error for now. Need to implement SDIO specification.\r
3402aac7 437 return EFI_UNSUPPORTED;\r
1e57a462 438 } else {\r
439 DEBUG ((EFI_D_INFO, "CMD5 fails. Not an SDIO card.\n"));\r
440 }\r
441\r
442 MmioOr32 (MMCHS_SYSCTL, SRC);\r
443 gBS->Stall(1000);\r
444 while ((MmioRead32 (MMCHS_SYSCTL) & SRC));\r
445\r
446 //Send CMD8 command. (New v2.00 command for Voltage check)\r
447 //Only 2.7V - 3.6V is supported for SD2.0, only SD 2.0 card can pass.\r
448 //MMC & SD1.1 card will fail this command.\r
449 CmdArgument = CMD8_ARG;\r
450 Status = SendCmd (CMD8, CMD8_INT_EN, CmdArgument);\r
451 if (Status == EFI_SUCCESS) {\r
452 Response = MmioRead32 (MMCHS_RSP10);\r
453 DEBUG ((EFI_D_INFO, "CMD8 success. CMD8 response: %x\n", Response));\r
454 if (Response != CmdArgument) {\r
455 return EFI_DEVICE_ERROR;\r
456 }\r
457 DEBUG ((EFI_D_INFO, "Card is SD2.0\n"));\r
458 SDCmd8Supported = TRUE; //Supports high capacity.\r
459 } else {\r
460 DEBUG ((EFI_D_INFO, "CMD8 fails. Not an SD2.0 card.\n"));\r
461 }\r
462\r
463 MmioOr32 (MMCHS_SYSCTL, SRC);\r
464 gBS->Stall(1000);\r
465 while ((MmioRead32 (MMCHS_SYSCTL) & SRC));\r
466\r
467 //Poll till card is busy\r
468 while (RetryCount < MAX_RETRY_COUNT) {\r
3402aac7 469 //Send CMD55 command.\r
1e57a462 470 CmdArgument = 0;\r
471 Status = SendCmd (CMD55, CMD55_INT_EN, CmdArgument);\r
472 if (Status == EFI_SUCCESS) {\r
473 DEBUG ((EFI_D_INFO, "CMD55 success. CMD55 response: %x\n", MmioRead32 (MMCHS_RSP10)));\r
474 gCardInfo.CardType = SD_CARD;\r
475 } else {\r
476 DEBUG ((EFI_D_INFO, "CMD55 fails.\n"));\r
477 gCardInfo.CardType = MMC_CARD;\r
478 }\r
479\r
480 //Send appropriate command for the card type which got detected.\r
481 if (gCardInfo.CardType == SD_CARD) {\r
482 CmdArgument = ((UINTN *) &(gCardInfo.OCRData))[0];\r
483\r
484 //Set HCS bit.\r
485 if (SDCmd8Supported) {\r
486 CmdArgument |= HCS;\r
487 }\r
488\r
489 Status = SendCmd (ACMD41, ACMD41_INT_EN, CmdArgument);\r
490 if (EFI_ERROR(Status)) {\r
491 DEBUG ((EFI_D_INFO, "ACMD41 fails.\n"));\r
492 return Status;\r
493 }\r
494 ((UINT32 *) &(gCardInfo.OCRData))[0] = MmioRead32 (MMCHS_RSP10);\r
495 DEBUG ((EFI_D_INFO, "SD card detected. ACMD41 OCR: %x\n", ((UINT32 *) &(gCardInfo.OCRData))[0]));\r
496 } else if (gCardInfo.CardType == MMC_CARD) {\r
497 CmdArgument = 0;\r
498 Status = SendCmd (CMD1, CMD1_INT_EN, CmdArgument);\r
499 if (EFI_ERROR(Status)) {\r
500 DEBUG ((EFI_D_INFO, "CMD1 fails.\n"));\r
501 return Status;\r
502 }\r
503 Response = MmioRead32 (MMCHS_RSP10);\r
504 DEBUG ((EFI_D_INFO, "MMC card detected.. CMD1 response: %x\n", Response));\r
505\r
506 //NOTE: For now, I am skipping this since I only have an SD card.\r
507 //Compare card OCR and host OCR (Section 22.6.1.3.2.4)\r
508 return EFI_UNSUPPORTED; //For now, MMC is not supported.\r
509 }\r
510\r
511 //Poll the card until it is out of its power-up sequence.\r
512 if (gCardInfo.OCRData.Busy == 1) {\r
513\r
514 if (SDCmd8Supported) {\r
515 gCardInfo.CardType = SD_CARD_2;\r
516 }\r
517\r
518 //Card is ready. Check CCS (Card capacity status) bit (bit#30).\r
519 //SD 2.0 standard card will response with CCS 0, SD high capacity card will respond with CCS 1.\r
520 if (gCardInfo.OCRData.AccessMode & BIT1) {\r
521 gCardInfo.CardType = SD_CARD_2_HIGH;\r
522 DEBUG ((EFI_D_INFO, "High capacity card.\n"));\r
523 } else {\r
524 DEBUG ((EFI_D_INFO, "Standard capacity card.\n"));\r
525 }\r
526\r
527 break;\r
528 }\r
529\r
530 gBS->Stall(1000);\r
531 RetryCount++;\r
532 }\r
533\r
534 if (RetryCount == MAX_RETRY_COUNT) {\r
535 DEBUG ((EFI_D_ERROR, "Timeout error. RetryCount: %d\n", RetryCount));\r
536 return EFI_TIMEOUT;\r
537 }\r
538\r
539 //Read CID data.\r
540 CmdArgument = 0;\r
541 Status = SendCmd (CMD2, CMD2_INT_EN, CmdArgument);\r
542 if (EFI_ERROR(Status)) {\r
543 DEBUG ((EFI_D_ERROR, "CMD2 fails. Status: %x\n", Status));\r
544 return Status;\r
545 }\r
546\r
547 DEBUG ((EFI_D_INFO, "CMD2 response: %x %x %x %x\n", MmioRead32 (MMCHS_RSP10), MmioRead32 (MMCHS_RSP32), MmioRead32 (MMCHS_RSP54), MmioRead32 (MMCHS_RSP76)));\r
548\r
549 //Parse CID register data.\r
550 ParseCardCIDData(MmioRead32 (MMCHS_RSP10), MmioRead32 (MMCHS_RSP32), MmioRead32 (MMCHS_RSP54), MmioRead32 (MMCHS_RSP76));\r
551\r
552 //Read RCA\r
553 CmdArgument = 0;\r
554 Status = SendCmd (CMD3, CMD3_INT_EN, CmdArgument);\r
555 if (EFI_ERROR(Status)) {\r
556 DEBUG ((EFI_D_ERROR, "CMD3 fails. Status: %x\n", Status));\r
557 return Status;\r
558 }\r
559\r
560 //Set RCA for the detected card. RCA is CMD3 response.\r
561 gCardInfo.RCA = (MmioRead32 (MMCHS_RSP10) >> 16);\r
562 DEBUG ((EFI_D_INFO, "CMD3 response: RCA %x\n", gCardInfo.RCA));\r
563\r
564 //MMC Bus setting change after card identification.\r
565 MmioAnd32 (MMCHS_CON, ~OD);\r
566 MmioOr32 (MMCHS_HCTL, SDVS_3_0_V);\r
567 UpdateMMCHSClkFrequency(CLKD_400KHZ); //Set the clock frequency to 400KHz.\r
568\r
569 return EFI_SUCCESS;\r
570}\r
571\r
572\r
573EFI_STATUS\r
574GetCardSpecificData (\r
575 VOID\r
576 )\r
577{\r
578 EFI_STATUS Status;\r
579 UINTN CmdArgument;\r
580\r
581 //Send CMD9 to retrieve CSD.\r
582 CmdArgument = gCardInfo.RCA << 16;\r
583 Status = SendCmd (CMD9, CMD9_INT_EN, CmdArgument);\r
584 if (EFI_ERROR(Status)) {\r
585 DEBUG ((EFI_D_ERROR, "CMD9 fails. Status: %x\n", Status));\r
586 return Status;\r
587 }\r
588\r
589 //Populate 128-bit CSD register data.\r
590 ((UINT32 *)&(gCardInfo.CSDData))[0] = MmioRead32 (MMCHS_RSP10);\r
591 ((UINT32 *)&(gCardInfo.CSDData))[1] = MmioRead32 (MMCHS_RSP32);\r
592 ((UINT32 *)&(gCardInfo.CSDData))[2] = MmioRead32 (MMCHS_RSP54);\r
593 ((UINT32 *)&(gCardInfo.CSDData))[3] = MmioRead32 (MMCHS_RSP76);\r
594\r
595 DEBUG ((EFI_D_INFO, "CMD9 response: %x %x %x %x\n", MmioRead32 (MMCHS_RSP10), MmioRead32 (MMCHS_RSP32), MmioRead32 (MMCHS_RSP54), MmioRead32 (MMCHS_RSP76)));\r
596\r
597 //Calculate total number of blocks and max. data transfer rate supported by the detected card.\r
598 GetCardConfigurationData();\r
599\r
600 return Status;\r
601}\r
602\r
603\r
604EFI_STATUS\r
605PerformCardConfiguration (\r
606 VOID\r
607 )\r
608{\r
609 UINTN CmdArgument = 0;\r
610 EFI_STATUS Status;\r
611\r
612 //Send CMD7\r
613 CmdArgument = gCardInfo.RCA << 16;\r
614 Status = SendCmd (CMD7, CMD7_INT_EN, CmdArgument);\r
615 if (EFI_ERROR(Status)) {\r
616 DEBUG ((EFI_D_ERROR, "CMD7 fails. Status: %x\n", Status));\r
617 return Status;\r
618 }\r
619\r
620 if ((gCardInfo.CardType != UNKNOWN_CARD) && (gCardInfo.CardType != MMC_CARD)) {\r
621 // We could read SCR register, but SD Card Phys spec stats any SD Card shall\r
622 // set SCR.SD_BUS_WIDTHS to support 4-bit mode, so why bother?\r
3402aac7 623\r
1e57a462 624 // Send ACMD6 (application specific commands must be prefixed with CMD55)\r
625 Status = SendCmd (CMD55, CMD55_INT_EN, CmdArgument);\r
626 if (!EFI_ERROR (Status)) {\r
627 // set device into 4-bit data bus mode\r
628 Status = SendCmd (ACMD6, ACMD6_INT_EN, 0x2);\r
629 if (!EFI_ERROR (Status)) {\r
630 // Set host controler into 4-bit mode\r
631 MmioOr32 (MMCHS_HCTL, DTW_4_BIT);\r
632 DEBUG ((EFI_D_INFO, "SD Memory Card set to 4-bit mode\n"));\r
633 }\r
634 }\r
635 }\r
636\r
637 //Send CMD16 to set the block length\r
638 CmdArgument = gCardInfo.BlockSize;\r
639 Status = SendCmd (CMD16, CMD16_INT_EN, CmdArgument);\r
640 if (EFI_ERROR(Status)) {\r
641 DEBUG ((EFI_D_ERROR, "CMD16 fails. Status: %x\n", Status));\r
642 return Status;\r
643 }\r
644\r
645 //Change MMCHS clock frequency to what detected card can support.\r
646 UpdateMMCHSClkFrequency(gCardInfo.ClockFrequencySelect);\r
647\r
648 return EFI_SUCCESS;\r
649}\r
650\r
651\r
652EFI_STATUS\r
653ReadBlockData (\r
654 IN EFI_BLOCK_IO_PROTOCOL *This,\r
655 OUT VOID *Buffer\r
656 )\r
657{\r
658 UINTN MmcStatus;\r
659 UINTN *DataBuffer = Buffer;\r
660 UINTN DataSize = This->Media->BlockSize/4;\r
661 UINTN Count;\r
662 UINTN RetryCount = 0;\r
663\r
664 //Check controller status to make sure there is no error.\r
665 while (RetryCount < MAX_RETRY_COUNT) {\r
666 do {\r
667 //Read Status.\r
668 MmcStatus = MmioRead32 (MMCHS_STAT);\r
669 } while(MmcStatus == 0);\r
670\r
671 //Check if Buffer read ready (BRR) bit is set?\r
672 if (MmcStatus & BRR) {\r
673\r
674 //Clear BRR bit\r
675 MmioOr32 (MMCHS_STAT, BRR);\r
676\r
677 //Read block worth of data.\r
678 for (Count = 0; Count < DataSize; Count++) {\r
679 *DataBuffer++ = MmioRead32 (MMCHS_DATA);\r
680 }\r
681 break;\r
682 }\r
683 RetryCount++;\r
684 }\r
685\r
686 if (RetryCount == MAX_RETRY_COUNT) {\r
687 return EFI_TIMEOUT;\r
688 }\r
689\r
690 return EFI_SUCCESS;\r
691}\r
692\r
693\r
694EFI_STATUS\r
695WriteBlockData (\r
696 IN EFI_BLOCK_IO_PROTOCOL *This,\r
697 OUT VOID *Buffer\r
698 )\r
699{\r
700 UINTN MmcStatus;\r
701 UINTN *DataBuffer = Buffer;\r
702 UINTN DataSize = This->Media->BlockSize/4;\r
703 UINTN Count;\r
704 UINTN RetryCount = 0;\r
705\r
706 //Check controller status to make sure there is no error.\r
707 while (RetryCount < MAX_RETRY_COUNT) {\r
708 do {\r
709 //Read Status.\r
710 MmcStatus = MmioRead32 (MMCHS_STAT);\r
711 } while(MmcStatus == 0);\r
712\r
713 //Check if Buffer write ready (BWR) bit is set?\r
714 if (MmcStatus & BWR) {\r
715\r
716 //Clear BWR bit\r
717 MmioOr32 (MMCHS_STAT, BWR);\r
718\r
719 //Write block worth of data.\r
720 for (Count = 0; Count < DataSize; Count++) {\r
721 MmioWrite32 (MMCHS_DATA, *DataBuffer++);\r
722 }\r
723\r
724 break;\r
725 }\r
726 RetryCount++;\r
727 }\r
728\r
729 if (RetryCount == MAX_RETRY_COUNT) {\r
730 return EFI_TIMEOUT;\r
731 }\r
732\r
733 return EFI_SUCCESS;\r
734}\r
735\r
736EFI_STATUS\r
737DmaBlocks (\r
738 IN EFI_BLOCK_IO_PROTOCOL *This,\r
739 IN UINTN Lba,\r
740 IN OUT VOID *Buffer,\r
741 IN UINTN BlockCount,\r
742 IN OPERATION_TYPE OperationType\r
743 )\r
744{\r
745 EFI_STATUS Status;\r
746 UINTN DmaSize = 0;\r
747 UINTN Cmd = 0;\r
748 UINTN CmdInterruptEnable;\r
749 UINTN CmdArgument;\r
750 VOID *BufferMap;\r
751 EFI_PHYSICAL_ADDRESS BufferAddress;\r
752 OMAP_DMA4 Dma4;\r
753 DMA_MAP_OPERATION DmaOperation;\r
754 EFI_STATUS MmcStatus;\r
755 UINTN RetryCount = 0;\r
756\r
757CpuDeadLoop ();\r
758 // Map passed in buffer for DMA xfer\r
759 DmaSize = BlockCount * This->Media->BlockSize;\r
760 Status = DmaMap (DmaOperation, Buffer, &DmaSize, &BufferAddress, &BufferMap);\r
761 if (EFI_ERROR (Status)) {\r
762 return Status;\r
763 }\r
764\r
765 ZeroMem (&DmaOperation, sizeof (DMA_MAP_OPERATION));\r
3402aac7 766\r
1e57a462 767\r
768 Dma4.DataType = 2; // DMA4_CSDPi[1:0] 32-bit elements from MMCHS_DATA\r
769\r
3402aac7 770 Dma4.SourceEndiansim = 0; // DMA4_CSDPi[21]\r
1e57a462 771\r
772 Dma4.DestinationEndianism = 0; // DMA4_CSDPi[19]\r
773\r
774 Dma4.SourcePacked = 0; // DMA4_CSDPi[6]\r
775\r
776 Dma4.DestinationPacked = 0; // DMA4_CSDPi[13]\r
777\r
3402aac7 778 Dma4.NumberOfElementPerFrame = This->Media->BlockSize/4; // DMA4_CENi (TRM 4K is optimum value)\r
1e57a462 779\r
3402aac7 780 Dma4.NumberOfFramePerTransferBlock = BlockCount; // DMA4_CFNi\r
1e57a462 781\r
3402aac7 782 Dma4.ReadPriority = 0; // DMA4_CCRi[6] Low priority read\r
1e57a462 783\r
784 Dma4.WritePriority = 0; // DMA4_CCRi[23] Prefetech disabled\r
785\r
786\r
787 //Populate the command information based on the operation type.\r
788 if (OperationType == READ) {\r
789 Cmd = CMD18; //Multiple block read\r
790 CmdInterruptEnable = CMD18_INT_EN;\r
791 DmaOperation = MapOperationBusMasterCommonBuffer;\r
792\r
793 Dma4.ReadPortAccessType =0 ; // DMA4_CSDPi[8:7] Can not burst MMCHS_DATA reg\r
794\r
795 Dma4.WritePortAccessType = 3; // DMA4_CSDPi[15:14] Memory burst 16x32\r
796\r
797 Dma4.WriteMode = 1; // DMA4_CSDPi[17:16] Write posted\r
798\r
3402aac7 799\r
1e57a462 800\r
801 Dma4.SourceStartAddress = MMCHS_DATA; // DMA4_CSSAi\r
802\r
803 Dma4.DestinationStartAddress = (UINT32)BufferAddress; // DMA4_CDSAi\r
804\r
805 Dma4.SourceElementIndex = 1; // DMA4_CSEi\r
806\r
807 Dma4.SourceFrameIndex = 0x200; // DMA4_CSFi\r
808\r
809 Dma4.DestinationElementIndex = 1; // DMA4_CDEi\r
810\r
811 Dma4.DestinationFrameIndex = 0; // DMA4_CDFi\r
812\r
813\r
814\r
815 Dma4.ReadPortAccessMode = 0; // DMA4_CCRi[13:12] Always read MMCHS_DATA\r
816\r
817 Dma4.WritePortAccessMode = 1; // DMA4_CCRi[15:14] Post increment memory address\r
818\r
3402aac7 819 Dma4.ReadRequestNumber = 0x1e; // DMA4_CCRi[4:0] Syncro with MMCA_DMA_RX (61)\r
1e57a462 820\r
821 Dma4.WriteRequestNumber = 1; // DMA4_CCRi[20:19] Syncro upper 0x3e == 62 (one based)\r
822\r
3402aac7 823 } else if (OperationType == WRITE) {\r
1e57a462 824 Cmd = CMD25; //Multiple block write\r
825 CmdInterruptEnable = CMD25_INT_EN;\r
826 DmaOperation = MapOperationBusMasterRead;\r
827\r
828 Dma4.ReadPortAccessType = 3; // DMA4_CSDPi[8:7] Memory burst 16x32\r
829\r
830 Dma4.WritePortAccessType = 0; // DMA4_CSDPi[15:14] Can not burst MMCHS_DATA reg\r
831\r
832 Dma4.WriteMode = 1; // DMA4_CSDPi[17:16] Write posted ???\r
833\r
3402aac7 834\r
1e57a462 835\r
836 Dma4.SourceStartAddress = (UINT32)BufferAddress; // DMA4_CSSAi\r
837\r
838 Dma4.DestinationStartAddress = MMCHS_DATA; // DMA4_CDSAi\r
839\r
840 Dma4.SourceElementIndex = 1; // DMA4_CSEi\r
841\r
842 Dma4.SourceFrameIndex = 0x200; // DMA4_CSFi\r
843\r
844 Dma4.DestinationElementIndex = 1; // DMA4_CDEi\r
845\r
846 Dma4.DestinationFrameIndex = 0; // DMA4_CDFi\r
847\r
848\r
849\r
850 Dma4.ReadPortAccessMode = 1; // DMA4_CCRi[13:12] Post increment memory address\r
851\r
852 Dma4.WritePortAccessMode = 0; // DMA4_CCRi[15:14] Always write MMCHS_DATA\r
853\r
3402aac7 854 Dma4.ReadRequestNumber = 0x1d; // DMA4_CCRi[4:0] Syncro with MMCA_DMA_TX (60)\r
1e57a462 855\r
856 Dma4.WriteRequestNumber = 1; // DMA4_CCRi[20:19] Syncro upper 0x3d == 61 (one based)\r
857\r
858 } else {\r
859 return EFI_INVALID_PARAMETER;\r
860 }\r
861\r
862\r
863 EnableDmaChannel (2, &Dma4);\r
3402aac7 864\r
1e57a462 865\r
866 //Set command argument based on the card access mode (Byte mode or Block mode)\r
867 if (gCardInfo.OCRData.AccessMode & BIT1) {\r
868 CmdArgument = Lba;\r
869 } else {\r
870 CmdArgument = Lba * This->Media->BlockSize;\r
871 }\r
872\r
873 //Send Command.\r
874 Status = SendCmd (Cmd, CmdInterruptEnable, CmdArgument);\r
875 if (EFI_ERROR (Status)) {\r
876 DEBUG ((EFI_D_ERROR, "CMD fails. Status: %x\n", Status));\r
877 return Status;\r
878 }\r
879\r
880 //Check for the Transfer completion.\r
881 while (RetryCount < MAX_RETRY_COUNT) {\r
882 //Read Status\r
883 do {\r
884 MmcStatus = MmioRead32 (MMCHS_STAT);\r
885 } while (MmcStatus == 0);\r
886\r
887 //Check if Transfer complete (TC) bit is set?\r
888 if (MmcStatus & TC) {\r
889 break;\r
890 } else {\r
891 DEBUG ((EFI_D_ERROR, "MmcStatus for TC: %x\n", MmcStatus));\r
892 //Check if DEB, DCRC or DTO interrupt occured.\r
893 if ((MmcStatus & DEB) | (MmcStatus & DCRC) | (MmcStatus & DTO)) {\r
894 //There was an error during the data transfer.\r
895\r
896 //Set SRD bit to 1 and wait until it return to 0x0.\r
897 MmioOr32 (MMCHS_SYSCTL, SRD);\r
898 while((MmioRead32 (MMCHS_SYSCTL) & SRD) != 0x0);\r
899\r
900 DisableDmaChannel (2, DMA4_CSR_BLOCK, DMA4_CSR_ERR);\r
901 DmaUnmap (BufferMap);\r
902 return EFI_DEVICE_ERROR;\r
903 }\r
904 }\r
905 RetryCount++;\r
3402aac7 906 }\r
1e57a462 907\r
908 DisableDmaChannel (2, DMA4_CSR_BLOCK, DMA4_CSR_ERR);\r
909 Status = DmaUnmap (BufferMap);\r
910\r
911 if (RetryCount == MAX_RETRY_COUNT) {\r
912 DEBUG ((EFI_D_ERROR, "TransferBlockData timed out.\n"));\r
913 return EFI_TIMEOUT;\r
914 }\r
915\r
916 return Status;\r
917}\r
918\r
919\r
920EFI_STATUS\r
921TransferBlock (\r
922 IN EFI_BLOCK_IO_PROTOCOL *This,\r
923 IN UINTN Lba,\r
924 IN OUT VOID *Buffer,\r
925 IN OPERATION_TYPE OperationType\r
926 )\r
927{\r
928 EFI_STATUS Status;\r
929 UINTN MmcStatus;\r
930 UINTN RetryCount = 0;\r
931 UINTN Cmd = 0;\r
932 UINTN CmdInterruptEnable = 0;\r
933 UINTN CmdArgument = 0;\r
934\r
935\r
936 //Populate the command information based on the operation type.\r
937 if (OperationType == READ) {\r
938 Cmd = CMD17; //Single block read\r
939 CmdInterruptEnable = CMD18_INT_EN;\r
3402aac7 940 } else if (OperationType == WRITE) {\r
1e57a462 941 Cmd = CMD24; //Single block write\r
942 CmdInterruptEnable = CMD24_INT_EN;\r
943 }\r
944\r
945 //Set command argument based on the card access mode (Byte mode or Block mode)\r
946 if (gCardInfo.OCRData.AccessMode & BIT1) {\r
947 CmdArgument = Lba;\r
948 } else {\r
949 CmdArgument = Lba * This->Media->BlockSize;\r
950 }\r
951\r
952 //Send Command.\r
953 Status = SendCmd (Cmd, CmdInterruptEnable, CmdArgument);\r
954 if (EFI_ERROR(Status)) {\r
955 DEBUG ((EFI_D_ERROR, "CMD fails. Status: %x\n", Status));\r
956 return Status;\r
957 }\r
958\r
959 //Read or Write data.\r
960 if (OperationType == READ) {\r
961 Status = ReadBlockData (This, Buffer);\r
962 if (EFI_ERROR(Status)) {\r
963 DEBUG((EFI_D_ERROR, "ReadBlockData fails.\n"));\r
964 return Status;\r
965 }\r
966 } else if (OperationType == WRITE) {\r
967 Status = WriteBlockData (This, Buffer);\r
968 if (EFI_ERROR(Status)) {\r
969 DEBUG((EFI_D_ERROR, "WriteBlockData fails.\n"));\r
970 return Status;\r
971 }\r
972 }\r
973\r
974 //Check for the Transfer completion.\r
975 while (RetryCount < MAX_RETRY_COUNT) {\r
976 //Read Status\r
977 do {\r
978 MmcStatus = MmioRead32 (MMCHS_STAT);\r
979 } while (MmcStatus == 0);\r
980\r
981 //Check if Transfer complete (TC) bit is set?\r
982 if (MmcStatus & TC) {\r
983 break;\r
984 } else {\r
985 DEBUG ((EFI_D_ERROR, "MmcStatus for TC: %x\n", MmcStatus));\r
986 //Check if DEB, DCRC or DTO interrupt occured.\r
987 if ((MmcStatus & DEB) | (MmcStatus & DCRC) | (MmcStatus & DTO)) {\r
988 //There was an error during the data transfer.\r
989\r
990 //Set SRD bit to 1 and wait until it return to 0x0.\r
991 MmioOr32 (MMCHS_SYSCTL, SRD);\r
992 while((MmioRead32 (MMCHS_SYSCTL) & SRD) != 0x0);\r
993\r
994 return EFI_DEVICE_ERROR;\r
995 }\r
996 }\r
997 RetryCount++;\r
3402aac7 998 }\r
1e57a462 999\r
1000 if (RetryCount == MAX_RETRY_COUNT) {\r
1001 DEBUG ((EFI_D_ERROR, "TransferBlockData timed out.\n"));\r
1002 return EFI_TIMEOUT;\r
1003 }\r
1004\r
1005 return EFI_SUCCESS;\r
1006}\r
1007\r
1008BOOLEAN\r
1009CardPresent (\r
1010 VOID\r
1011 )\r
1012{\r
1013 EFI_STATUS Status;\r
1014 UINT8 Data;\r
1015\r
1016 //\r
1017 // Card detect is a GPIO0 on the TPS65950\r
1018 //\r
1019 Status = gTPS65950->Read (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID2, GPIODATAIN1), 1, &Data);\r
1020 if (EFI_ERROR (Status)) {\r
1021 return FALSE;\r
1022 }\r
1023\r
1024 if ((Data & CARD_DETECT_BIT) == CARD_DETECT_BIT) {\r
1025 // No Card present\r
1026 return FALSE;\r
1027 } else {\r
1028 return TRUE;\r
1029 }\r
1030}\r
1031\r
1032EFI_STATUS\r
1033DetectCard (\r
1034 VOID\r
1035 )\r
1036{\r
1037 EFI_STATUS Status;\r
1038\r
1039 if (!CardPresent ()) {\r
1040 return EFI_NO_MEDIA;\r
1041 }\r
1042\r
1043 //Initialize MMC host controller clocks.\r
1044 Status = InitializeMMCHS ();\r
1045 if (EFI_ERROR(Status)) {\r
1046 DEBUG ((EFI_D_ERROR, "Initialize MMC host controller fails. Status: %x\n", Status));\r
1047 return Status;\r
1048 }\r
1049\r
1050 //Software reset of the MMCHS host controller.\r
1051 MmioWrite32 (MMCHS_SYSCONFIG, SOFTRESET);\r
1052 gBS->Stall(1000);\r
1053 while ((MmioRead32 (MMCHS_SYSSTATUS) & RESETDONE_MASK) != RESETDONE);\r
1054\r
1055 //Soft reset for all.\r
1056 MmioWrite32 (MMCHS_SYSCTL, SRA);\r
1057 gBS->Stall(1000);\r
1058 while ((MmioRead32 (MMCHS_SYSCTL) & SRA) != 0x0);\r
1059\r
1060 //Voltage capabilities initialization. Activate VS18 and VS30.\r
1061 MmioOr32 (MMCHS_CAPA, (VS30 | VS18));\r
1062\r
1063 //Wakeup configuration\r
1064 MmioOr32 (MMCHS_SYSCONFIG, ENAWAKEUP);\r
1065 MmioOr32 (MMCHS_HCTL, IWE);\r
1066\r
1067 //MMCHS Controller default initialization\r
1068 MmioOr32 (MMCHS_CON, (OD | DW8_1_4_BIT | CEATA_OFF));\r
1069\r
1070 MmioWrite32 (MMCHS_HCTL, (SDVS_3_0_V | DTW_1_BIT | SDBP_OFF));\r
1071\r
1072 //Enable internal clock\r
1073 MmioOr32 (MMCHS_SYSCTL, ICE);\r
1074\r
1075 //Set the clock frequency to 80KHz.\r
1076 UpdateMMCHSClkFrequency (CLKD_80KHZ);\r
1077\r
1078 //Enable SD bus power.\r
1079 MmioOr32 (MMCHS_HCTL, (SDBP_ON));\r
1080\r
1081 //Poll till SD bus power bit is set.\r
1082 while ((MmioRead32 (MMCHS_HCTL) & SDBP_MASK) != SDBP_ON);\r
1083\r
1084 //Card idenfication\r
1085 Status = PerformCardIdenfication ();\r
1086 if (EFI_ERROR(Status)) {\r
1087 DEBUG ((EFI_D_ERROR, "No MMC/SD card detected.\n"));\r
1088 return Status;\r
1089 }\r
3402aac7 1090\r
1e57a462 1091 //Get CSD (Card specific data) for the detected card.\r
1092 Status = GetCardSpecificData();\r
1093 if (EFI_ERROR(Status)) {\r
1094 return Status;\r
1095 }\r
3402aac7 1096\r
1e57a462 1097 //Configure the card in data transfer mode.\r
1098 Status = PerformCardConfiguration();\r
1099 if (EFI_ERROR(Status)) {\r
1100 return Status;\r
1101 }\r
1102\r
1103 //Patch the Media structure.\r
1104 gMMCHSMedia.LastBlock = (gCardInfo.NumBlocks - 1);\r
1105 gMMCHSMedia.BlockSize = gCardInfo.BlockSize;\r
1106 gMMCHSMedia.ReadOnly = (MmioRead32 (GPIO1_BASE + GPIO_DATAIN) & BIT23) == BIT23;\r
3402aac7
RC
1107 gMMCHSMedia.MediaPresent = TRUE;\r
1108 gMMCHSMedia.MediaId++;\r
1e57a462 1109\r
1110 DEBUG ((EFI_D_INFO, "SD Card Media Change on Handle 0x%08x\n", gImageHandle));\r
1111\r
1112 return Status;\r
1113}\r
1114\r
1115#define MAX_MMCHS_TRANSFER_SIZE 0x4000\r
1116\r
1117EFI_STATUS\r
1118SdReadWrite (\r
1119 IN EFI_BLOCK_IO_PROTOCOL *This,\r
3402aac7
RC
1120 IN UINTN Lba,\r
1121 OUT VOID *Buffer,\r
1e57a462 1122 IN UINTN BufferSize,\r
1123 IN OPERATION_TYPE OperationType\r
1124 )\r
1125{\r
1126 EFI_STATUS Status = EFI_SUCCESS;\r
1127 UINTN RetryCount = 0;\r
1128 UINTN BlockCount;\r
1129 UINTN BytesToBeTranferedThisPass = 0;\r
1130 UINTN BytesRemainingToBeTransfered;\r
1131 EFI_TPL OldTpl;\r
1132\r
1133 BOOLEAN Update;\r
1134\r
1135\r
3402aac7 1136\r
1e57a462 1137 Update = FALSE;\r
1138\r
1139 if (gMediaChange) {\r
1140 Update = TRUE;\r
1141 Status = DetectCard ();\r
1142 if (EFI_ERROR (Status)) {\r
1143 // We detected a removal\r
1144 gMMCHSMedia.MediaPresent = FALSE;\r
1145 gMMCHSMedia.LastBlock = 0;\r
1146 gMMCHSMedia.BlockSize = 512; // Should be zero but there is a bug in DiskIo\r
3402aac7 1147 gMMCHSMedia.ReadOnly = FALSE;\r
1e57a462 1148 }\r
1149 gMediaChange = FALSE;\r
1150 } else if (!gMMCHSMedia.MediaPresent) {\r
1151 Status = EFI_NO_MEDIA;\r
1152 goto Done;\r
1153 }\r
1154\r
1155 if (Update) {\r
1156 DEBUG ((EFI_D_INFO, "SD Card ReinstallProtocolInterface ()\n"));\r
1157 gBS->ReinstallProtocolInterface (\r
1158 gImageHandle,\r
1159 &gEfiBlockIoProtocolGuid,\r
1160 &gBlockIo,\r
1161 &gBlockIo\r
1162 );\r
1163 return EFI_MEDIA_CHANGED;\r
1164 }\r
1165\r
1166 if (EFI_ERROR (Status)) {\r
1167 goto Done;\r
1168 }\r
1169\r
1170 if (Buffer == NULL) {\r
1171 Status = EFI_INVALID_PARAMETER;\r
1172 goto Done;\r
1173 }\r
1174\r
1175 if (Lba > This->Media->LastBlock) {\r
1176 Status = EFI_INVALID_PARAMETER;\r
1177 goto Done;\r
1178 }\r
3402aac7 1179\r
1e57a462 1180 if ((BufferSize % This->Media->BlockSize) != 0) {\r
1181 Status = EFI_BAD_BUFFER_SIZE;\r
1182 goto Done;\r
1183 }\r
1184\r
1185 //Check if the data lines are not in use.\r
1186 while ((RetryCount++ < MAX_RETRY_COUNT) && ((MmioRead32 (MMCHS_PSTATE) & DATI_MASK) != DATI_ALLOWED));\r
1187 if (RetryCount == MAX_RETRY_COUNT) {\r
1188 Status = EFI_TIMEOUT;\r
1189 goto Done;\r
1190 }\r
1191\r
1192 OldTpl = gBS->RaiseTPL (TPL_NOTIFY);\r
1193\r
1194 BytesRemainingToBeTransfered = BufferSize;\r
1195 while (BytesRemainingToBeTransfered > 0) {\r
1196\r
1197 if (gMediaChange) {\r
1198 Status = EFI_NO_MEDIA;\r
1199 DEBUG ((EFI_D_INFO, "SdReadWrite() EFI_NO_MEDIA due to gMediaChange\n"));\r
1200 goto DoneRestoreTPL;\r
1201 }\r
1202\r
1203 // Turn OFF DMA path until it is debugged\r
1204 // BytesToBeTranferedThisPass = (BytesToBeTranferedThisPass >= MAX_MMCHS_TRANSFER_SIZE) ? MAX_MMCHS_TRANSFER_SIZE : BytesRemainingToBeTransfered;\r
1205 BytesToBeTranferedThisPass = This->Media->BlockSize;\r
1206\r
1207 BlockCount = BytesToBeTranferedThisPass/This->Media->BlockSize;\r
1208\r
1209 if (BlockCount > 1) {\r
1210 Status = DmaBlocks (This, Lba, Buffer, BlockCount, OperationType);\r
1211 } else {\r
1212 //Transfer a block worth of data.\r
1213 Status = TransferBlock (This, Lba, Buffer, OperationType);\r
1214 }\r
1215\r
1216 if (EFI_ERROR(Status)) {\r
1217 DEBUG ((EFI_D_ERROR, "TransferBlockData fails. %x\n", Status));\r
1218 goto DoneRestoreTPL;\r
1219 }\r
1220\r
1221 BytesRemainingToBeTransfered -= BytesToBeTranferedThisPass;\r
1222 Lba += BlockCount;\r
1223 Buffer = (UINT8 *)Buffer + This->Media->BlockSize;\r
1224 }\r
1225\r
1226DoneRestoreTPL:\r
1227\r
1228 gBS->RestoreTPL (OldTpl);\r
1229\r
1230Done:\r
1231\r
1232 return Status;\r
1233\r
1234}\r
1235\r
1236\r
1237/**\r
1238\r
1239 Reset the Block Device.\r
1240\r
1241\r
1242\r
1243 @param This Indicates a pointer to the calling context.\r
1244\r
1245 @param ExtendedVerification Driver may perform diagnostics on reset.\r
1246\r
1247\r
1248\r
1249 @retval EFI_SUCCESS The device was reset.\r
1250\r
1251 @retval EFI_DEVICE_ERROR The device is not functioning properly and could\r
1252\r
1253 not be reset.\r
1254\r
1255\r
1256\r
1257**/\r
1258EFI_STATUS\r
1259EFIAPI\r
1260MMCHSReset (\r
1261 IN EFI_BLOCK_IO_PROTOCOL *This,\r
1262 IN BOOLEAN ExtendedVerification\r
1263 )\r
1264{\r
3402aac7 1265 return EFI_SUCCESS;\r
1e57a462 1266}\r
1267\r
1268\r
1269/**\r
1270\r
1271 Read BufferSize bytes from Lba into Buffer.\r
1272\r
1273\r
1274\r
1275 @param This Indicates a pointer to the calling context.\r
1276\r
1277 @param MediaId Id of the media, changes every time the media is replaced.\r
1278\r
1279 @param Lba The starting Logical Block Address to read from\r
1280\r
1281 @param BufferSize Size of Buffer, must be a multiple of device block size.\r
1282\r
1283 @param Buffer A pointer to the destination buffer for the data. The caller is\r
1284\r
1285 responsible for either having implicit or explicit ownership of the buffer.\r
1286\r
1287\r
1288\r
1289 @retval EFI_SUCCESS The data was read correctly from the device.\r
1290\r
1291 @retval EFI_DEVICE_ERROR The device reported an error while performing the read.\r
1292\r
1293 @retval EFI_NO_MEDIA There is no media in the device.\r
1294\r
1295 @retval EFI_MEDIA_CHANGED The MediaId does not matched the current device.\r
1296\r
1297 @retval EFI_BAD_BUFFER_SIZE The Buffer was not a multiple of the block size of the device.\r
1298\r
3402aac7 1299 @retval EFI_INVALID_PARAMETER The read request contains LBAs that are not valid,\r
1e57a462 1300\r
1301 or the buffer is not on proper alignment.\r
1302\r
1303EFI_STATUS\r
1304\r
1305**/\r
1306EFI_STATUS\r
1307EFIAPI\r
1308MMCHSReadBlocks (\r
1309 IN EFI_BLOCK_IO_PROTOCOL *This,\r
1310 IN UINT32 MediaId,\r
1311 IN EFI_LBA Lba,\r
1312 IN UINTN BufferSize,\r
1313 OUT VOID *Buffer\r
1314 )\r
1315{\r
1316 EFI_STATUS Status;\r
1317\r
1318 //Perform Read operation.\r
1319 Status = SdReadWrite (This, (UINTN)Lba, Buffer, BufferSize, READ);\r
1320\r
1321 return Status;\r
1322\r
1323}\r
1324\r
1325\r
1326/**\r
1327\r
1328 Write BufferSize bytes from Lba into Buffer.\r
1329\r
1330\r
1331\r
1332 @param This Indicates a pointer to the calling context.\r
1333\r
1334 @param MediaId The media ID that the write request is for.\r
1335\r
1336 @param Lba The starting logical block address to be written. The caller is\r
1337\r
1338 responsible for writing to only legitimate locations.\r
1339\r
1340 @param BufferSize Size of Buffer, must be a multiple of device block size.\r
1341\r
1342 @param Buffer A pointer to the source buffer for the data.\r
1343\r
1344\r
1345\r
1346 @retval EFI_SUCCESS The data was written correctly to the device.\r
1347\r
1348 @retval EFI_WRITE_PROTECTED The device can not be written to.\r
1349\r
1350 @retval EFI_DEVICE_ERROR The device reported an error while performing the write.\r
1351\r
1352 @retval EFI_NO_MEDIA There is no media in the device.\r
1353\r
1354 @retval EFI_MEDIA_CHNAGED The MediaId does not matched the current device.\r
1355\r
1356 @retval EFI_BAD_BUFFER_SIZE The Buffer was not a multiple of the block size of the device.\r
1357\r
3402aac7 1358 @retval EFI_INVALID_PARAMETER The write request contains LBAs that are not valid,\r
1e57a462 1359\r
1360 or the buffer is not on proper alignment.\r
1361\r
1362\r
1363\r
1364**/\r
1365EFI_STATUS\r
1366EFIAPI\r
1367MMCHSWriteBlocks (\r
1368 IN EFI_BLOCK_IO_PROTOCOL *This,\r
1369 IN UINT32 MediaId,\r
1370 IN EFI_LBA Lba,\r
1371 IN UINTN BufferSize,\r
1372 IN VOID *Buffer\r
1373 )\r
1374{\r
1375 EFI_STATUS Status;\r
1376\r
1377 //Perform write operation.\r
1378 Status = SdReadWrite (This, (UINTN)Lba, Buffer, BufferSize, WRITE);\r
1379\r
1380\r
1381 return Status;\r
1382\r
1383}\r
1384\r
1385\r
1386/**\r
1387\r
1388 Flush the Block Device.\r
1389\r
1390\r
1391\r
1392 @param This Indicates a pointer to the calling context.\r
1393\r
1394\r
1395\r
1396 @retval EFI_SUCCESS All outstanding data was written to the device\r
1397\r
1398 @retval EFI_DEVICE_ERROR The device reported an error while writting back the data\r
1399\r
1400 @retval EFI_NO_MEDIA There is no media in the device.\r
1401\r
1402\r
1403\r
1404**/\r
1405EFI_STATUS\r
1406EFIAPI\r
1407MMCHSFlushBlocks (\r
1408 IN EFI_BLOCK_IO_PROTOCOL *This\r
1409 )\r
1410{\r
1411 return EFI_SUCCESS;\r
1412}\r
1413\r
1414\r
1415EFI_BLOCK_IO_PROTOCOL gBlockIo = {\r
1416 EFI_BLOCK_IO_INTERFACE_REVISION, // Revision\r
1417 &gMMCHSMedia, // *Media\r
1418 MMCHSReset, // Reset\r
1419 MMCHSReadBlocks, // ReadBlocks\r
1420 MMCHSWriteBlocks, // WriteBlocks\r
1421 MMCHSFlushBlocks // FlushBlocks\r
1422};\r
1423\r
1424\r
1425/**\r
1426\r
1427 Timer callback to convert card present hardware into a boolean that indicates\r
1428\r
3402aac7 1429 a media change event has happened. If you just check the GPIO you could see\r
1e57a462 1430\r
1431 card 1 and then check again after card 1 was removed and card 2 was inserted\r
1432\r
1433 and you would still see media present. Thus you need the timer tick to catch\r
1434\r
1435 the toggle event.\r
1436\r
1437\r
1438\r
1439 @param Event Event whose notification function is being invoked.\r
1440\r
1441 @param Context The pointer to the notification function's context,\r
1442\r
1443 which is implementation-dependent. Not used.\r
1444\r
1445\r
1446\r
1447**/\r
1448VOID\r
1449EFIAPI\r
1450TimerCallback (\r
1451 IN EFI_EVENT Event,\r
1452 IN VOID *Context\r
1453 )\r
1454{\r
1455 BOOLEAN Present;\r
1456\r
1457 Present = CardPresent ();\r
1458 if (gMMCHSMedia.MediaPresent) {\r
1459 if (!Present && !gMediaChange) {\r
1460 gMediaChange = TRUE;\r
1461 }\r
1462 } else {\r
1463 if (Present && !gMediaChange) {\r
3402aac7 1464 gMediaChange = TRUE;\r
1e57a462 1465 }\r
1466 }\r
1467}\r
1468\r
1469\r
1470EFI_STATUS\r
1471EFIAPI\r
1472MMCHSInitialize (\r
1473 IN EFI_HANDLE ImageHandle,\r
1474 IN EFI_SYSTEM_TABLE *SystemTable\r
1475 )\r
1476{\r
1477 EFI_STATUS Status;\r
1478\r
1479 Status = gBS->LocateProtocol (&gEmbeddedExternalDeviceProtocolGuid, NULL, (VOID **)&gTPS65950);\r
1480 ASSERT_EFI_ERROR(Status);\r
1481\r
1482 ZeroMem (&gCardInfo, sizeof (CARD_INFO));\r
1483\r
1484 Status = gBS->CreateEvent (EVT_TIMER | EVT_NOTIFY_SIGNAL, TPL_CALLBACK, TimerCallback, NULL, &gTimerEvent);\r
1485 ASSERT_EFI_ERROR (Status);\r
3402aac7
RC
1486\r
1487 Status = gBS->SetTimer (gTimerEvent, TimerPeriodic, FixedPcdGet32 (PcdMmchsTimerFreq100NanoSeconds));\r
1e57a462 1488 ASSERT_EFI_ERROR (Status);\r
1489\r
1490 //Publish BlockIO.\r
1491 Status = gBS->InstallMultipleProtocolInterfaces (\r
3402aac7
RC
1492 &ImageHandle,\r
1493 &gEfiBlockIoProtocolGuid, &gBlockIo,\r
1e57a462 1494 &gEfiDevicePathProtocolGuid, &gMmcHsDevicePath,\r
1495 NULL\r
1496 );\r
1497 return Status;\r
1498}\r