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1 | /** @file\r |
2 | \r |
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3 | Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r |
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4 | \r |
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5 | This program and the accompanying materials\r |
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6 | are licensed and made available under the terms and conditions of the BSD License\r |
7 | which accompanies this distribution. The full text of the license may be found at\r |
8 | http://opensource.org/licenses/bsd-license.php\r |
9 | \r |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r |
12 | \r |
13 | **/\r |
14 | \r |
15 | #ifndef _MMCHS_H_\r |
16 | #define _MMCHS_H_\r |
17 | \r |
18 | #include <Library/BaseLib.h> |
19 | #include <Library/MemoryAllocationLib.h> |
20 | #include <Library/DebugLib.h> |
21 | #include <Library/IoLib.h> |
22 | #include <Library/PcdLib.h> |
23 | #include <Library/UefiBootServicesTableLib.h> |
24 | |
25 | #include <Protocol/EmbeddedExternalDevice.h>\r |
26 | #include <Protocol/BlockIo.h> |
27 | #include <Protocol/Cpu.h> |
28 | #include <Protocol/DevicePath.h> |
29 | |
30 | #include <Omap3530/Omap3530.h>\r |
31 | #include <TPS65950.h>\r |
32 | \r |
33 | #define MAX_RETRY_COUNT 100 |
34 | |
43263288 |
35 | #define HCS BIT30 //Host capacity support/1 = Supporting high capacity\r |
36 | #define CCS BIT30 //Card capacity status/1 = High capacity card\r |
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37 | typedef struct {\r |
38 | UINT32 Reserved0: 7; // 0 \r |
39 | UINT32 V170_V195: 1; // 1.70V - 1.95V\r |
40 | UINT32 V200_V260: 7; // 2.00V - 2.60V\r |
41 | UINT32 V270_V360: 9; // 2.70V - 3.60V\r |
42 | UINT32 RESERVED_1: 5; // Reserved\r |
43 | UINT32 AccessMode: 2; // 00b (byte mode), 10b (sector mode) \r |
44 | UINT32 Busy: 1; // This bit is set to LOW if the card has not finished the power up routine\r |
45 | }OCR;\r |
46 | \r |
47 | typedef struct {\r |
48 | UINT32 NOT_USED; // 1 [0:0]\r |
49 | UINT32 CRC; // CRC7 checksum [7:1]\r |
50 | UINT32 MDT; // Manufacturing date [19:8]\r |
51 | UINT32 RESERVED_1; // Reserved [23:20]\r |
52 | UINT32 PSN; // Product serial number [55:24]\r |
53 | UINT8 PRV; // Product revision [63:56]\r |
54 | UINT8 PNM[5]; // Product name [64:103]\r |
55 | UINT16 OID; // OEM/Application ID [119:104]\r |
56 | UINT8 MID; // Manufacturer ID [127:120]\r |
57 | }CID;\r |
58 | \r |
59 | typedef struct {\r |
60 | UINT8 NOT_USED: 1; // Not used, always 1 [0:0]\r |
61 | UINT8 CRC: 7; // CRC [7:1]\r |
62 | UINT8 RESERVED_1: 2; // Reserved [9:8]\r |
63 | UINT8 FILE_FORMAT: 2; // File format [11:10]\r |
64 | UINT8 TMP_WRITE_PROTECT: 1; // Temporary write protection [12:12]\r |
65 | UINT8 PERM_WRITE_PROTECT: 1; // Permanent write protection [13:13]\r |
66 | UINT8 COPY: 1; // Copy flag (OTP) [14:14]\r |
67 | UINT8 FILE_FORMAT_GRP: 1; // File format group [15:15]\r |
68 | UINT16 RESERVED_2: 5; // Reserved [20:16]\r |
69 | UINT16 WRITE_BL_PARTIAL: 1; // Partial blocks for write allowed [21:21]\r |
70 | UINT16 WRITE_BL_LEN: 4; // Max. write data block length [25:22]\r |
71 | UINT16 R2W_FACTOR: 3; // Write speed factor [28:26]\r |
72 | UINT16 RESERVED_3: 2; // Reserved [30:29]\r |
73 | UINT16 WP_GRP_ENABLE: 1; // Write protect group enable [31:31]\r |
74 | UINT32 WP_GRP_SIZE: 7; // Write protect group size [38:32]\r |
75 | UINT32 SECTOR_SIZE: 7; // Erase sector size [45:39]\r |
76 | UINT32 ERASE_BLK_EN: 1; // Erase single block enable [46:46]\r |
77 | UINT32 C_SIZE_MULT: 3; // Device size multiplier [49:47]\r |
78 | UINT32 VDD_W_CURR_MAX: 3; // Max. write current @ VDD max [52:50]\r |
79 | UINT32 VDD_W_CURR_MIN: 3; // Max. write current @ VDD min [55:53]\r |
80 | UINT32 VDD_R_CURR_MAX: 3; // Max. read current @ VDD max [58:56]\r |
81 | UINT32 VDD_R_CURR_MIN: 3; // Max. read current @ VDD min [61:59]\r |
82 | UINT32 C_SIZELow2: 2; // Device size [73:62]\r |
83 | UINT32 C_SIZEHigh10: 10;// Device size [73:62]\r |
84 | UINT32 RESERVED_4: 2; // Reserved [75:74]\r |
85 | UINT32 DSR_IMP: 1; // DSR implemented [76:76]\r |
86 | UINT32 READ_BLK_MISALIGN: 1; // Read block misalignment [77:77]\r |
87 | UINT32 WRITE_BLK_MISALIGN: 1; // Write block misalignment [78:78]\r |
88 | UINT32 READ_BL_PARTIAL: 1; // Partial blocks for read allowed [79:79]\r |
89 | UINT32 READ_BL_LEN: 4; // Max. read data block length [83:80]\r |
90 | UINT32 CCC: 12;// Card command classes [95:84]\r |
91 | UINT8 TRAN_SPEED ; // Max. bus clock frequency [103:96]\r |
92 | UINT8 NSAC ; // Data read access-time 2 in CLK cycles (NSAC*100) [111:104]\r |
93 | UINT8 TAAC ; // Data read access-time 1 [119:112]\r |
94 | UINT8 RESERVED_5: 6; // Reserved [125:120]\r |
95 | UINT8 CSD_STRUCTURE: 2; // CSD structure [127:126]\r |
96 | }CSD;\r |
97 | \r |
98 | typedef struct {\r |
99 | UINT8 NOT_USED: 1; // Not used, always 1 [0:0]\r |
100 | UINT8 CRC: 7; // CRC [7:1]\r |
101 | UINT8 RESERVED_1: 2; // Reserved [9:8]\r |
102 | UINT8 FILE_FORMAT: 2; // File format [11:10]\r |
103 | UINT8 TMP_WRITE_PROTECT: 1; // Temporary write protection [12:12]\r |
104 | UINT8 PERM_WRITE_PROTECT: 1; // Permanent write protection [13:13]\r |
105 | UINT8 COPY: 1; // Copy flag (OTP) [14:14]\r |
106 | UINT8 FILE_FORMAT_GRP: 1; // File format group [15:15]\r |
107 | UINT16 RESERVED_2: 5; // Reserved [20:16]\r |
108 | UINT16 WRITE_BL_PARTIAL: 1; // Partial blocks for write allowed [21:21]\r |
109 | UINT16 WRITE_BL_LEN: 4; // Max. write data block length [25:22]\r |
110 | UINT16 R2W_FACTOR: 3; // Write speed factor [28:26]\r |
111 | UINT16 RESERVED_3: 2; // Reserved [30:29]\r |
112 | UINT16 WP_GRP_ENABLE: 1; // Write protect group enable [31:31]\r |
113 | UINT16 WP_GRP_SIZE: 7; // Write protect group size [38:32]\r |
114 | UINT16 SECTOR_SIZE: 7; // Erase sector size [45:39]\r |
115 | UINT16 ERASE_BLK_EN: 1; // Erase single block enable [46:46]\r |
116 | UINT16 RESERVED_4: 1; // Reserved [47:47]\r |
117 | UINT32 C_SIZELow16: 16;// Device size [69:48]\r |
118 | UINT32 C_SIZEHigh6: 6; // Device size [69:48]\r |
119 | UINT32 RESERVED_5: 6; // Reserved [75:70]\r |
120 | UINT32 DSR_IMP: 1; // DSR implemented [76:76]\r |
121 | UINT32 READ_BLK_MISALIGN: 1; // Read block misalignment [77:77]\r |
122 | UINT32 WRITE_BLK_MISALIGN: 1; // Write block misalignment [78:78]\r |
123 | UINT32 READ_BL_PARTIAL: 1; // Partial blocks for read allowed [79:79]\r |
124 | UINT16 READ_BL_LEN: 4; // Max. read data block length [83:80]\r |
125 | UINT16 CCC: 12;// Card command classes [95:84]\r |
126 | UINT8 TRAN_SPEED ; // Max. bus clock frequency [103:96]\r |
127 | UINT8 NSAC ; // Data read access-time 2 in CLK cycles (NSAC*100) [111:104]\r |
128 | UINT8 TAAC ; // Data read access-time 1 [119:112]\r |
129 | UINT8 RESERVED_6: 6; // 0 [125:120]\r |
130 | UINT8 CSD_STRUCTURE: 2; // CSD structure [127:126]\r |
131 | }CSD_SDV2;\r |
132 | \r |
133 | typedef enum { |
134 | UNKNOWN_CARD, |
135 | MMC_CARD, //MMC card |
136 | SD_CARD, //SD 1.1 card |
137 | SD_CARD_2, //SD 2.0 or above standard card |
138 | SD_CARD_2_HIGH //SD 2.0 or above high capacity card |
139 | } CARD_TYPE;\r |
140 | \r |
141 | typedef enum {\r |
142 | READ,\r |
143 | WRITE\r |
144 | } OPERATION_TYPE;\r |
145 | \r |
146 | typedef struct \r |
147 | {\r |
148 | UINT16 RCA;\r |
149 | UINTN BlockSize;\r |
150 | UINTN NumBlocks;\r |
151 | UINTN ClockFrequencySelect;\r |
152 | CARD_TYPE CardType;\r |
153 | OCR OCRData;\r |
154 | CID CIDData;\r |
155 | CSD CSDData;\r |
156 | } CARD_INFO;\r |
157 | \r |
158 | #endif\r |