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[mirror_edk2.git] / Omap35xxPkg / MmcHostDxe / MmcHostDxe.c

/** @file\r
*\r
*  Copyright (c) 2008 - 2009, Apple Inc. All rights reserved.\r
*  Copyright (c) 2011 - 2014, ARM Limited. All rights reserved.\r
*\r
*  This program and the accompanying materials\r
*  are licensed and made available under the terms and conditions of the BSD License\r
*  which accompanies this distribution.  The full text of the license may be found at\r
*  http://opensource.org/licenses/bsd-license.php\r
*\r
*  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
*  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
*\r
**/\r
\r
#include "MmcHostDxe.h"\r
\r
EMBEDDED_EXTERNAL_DEVICE   *gTPS65950;\r
UINT8                      mMaxDataTransferRate = 0;\r
UINT32                     mRca = 0;\r
BOOLEAN                    mBitModeSet = FALSE;\r
\r
\r
typedef struct {\r
  VENDOR_DEVICE_PATH  Mmc;\r
  EFI_DEVICE_PATH     End;\r
} MMCHS_DEVICE_PATH;\r
\r
MMCHS_DEVICE_PATH gMMCDevicePath = {\r
  {\r
    {\r
      HARDWARE_DEVICE_PATH,\r
      HW_VENDOR_DP,\r
      { (UINT8)(sizeof(VENDOR_DEVICE_PATH)), (UINT8)((sizeof(VENDOR_DEVICE_PATH)) >> 8) },\r
    },\r
    { 0xb615f1f5, 0x5088, 0x43cd, { 0x80, 0x9c, 0xa1, 0x6e, 0x52, 0x48, 0x7d, 0x00 } }\r
  },\r
  {\r
    END_DEVICE_PATH_TYPE,\r
    END_ENTIRE_DEVICE_PATH_SUBTYPE,\r
    { sizeof (EFI_DEVICE_PATH_PROTOCOL), 0 }\r
  }\r
};\r
\r
BOOLEAN\r
IgnoreCommand (\r
  UINT32 Command\r
  )\r
{\r
  switch(Command) {\r
    case MMC_CMD12:\r
      return TRUE;\r
    case MMC_CMD13:\r
      return TRUE;\r
    default:\r
      return FALSE;\r
  }\r
}\r
\r
UINT32\r
TranslateCommand (\r
  UINT32 Command\r
  )\r
{\r
  UINT32 Translation;\r
\r
  switch(Command) {\r
    case MMC_CMD2:\r
      Translation = CMD2;\r
      break;\r
    case MMC_CMD3:\r
      Translation = CMD3;\r
      break;\r
    /*case MMC_CMD6:\r
      Translation = CMD6;\r
      break;*/\r
    case MMC_CMD7:\r
      Translation = CMD7;\r
      break;\r
    case MMC_CMD8:\r
      Translation = CMD8;\r
      break;\r
    case MMC_CMD9:\r
      Translation = CMD9;\r
      break;\r
    /*case MMC_CMD12:\r
      Translation = CMD12;\r
      break;\r
    case MMC_CMD13:\r
      Translation = CMD13;\r
      break;*/\r
    case MMC_CMD16:\r
      Translation = CMD16;\r
      break;\r
    case MMC_CMD17:\r
      Translation = 0x113A0014;//CMD17;\r
      break;\r
    case MMC_CMD24:\r
      Translation = CMD24 | 4;\r
      break;\r
    case MMC_CMD55:\r
      Translation = CMD55;\r
      break;\r
    case MMC_ACMD41:\r
      Translation = ACMD41;\r
      break;\r
    default:\r
      Translation = Command;\r
  }\r
\r
  return Translation;\r
}\r
\r
VOID\r
CalculateCardCLKD (\r
  UINTN *ClockFrequencySelect\r
  )\r
{\r
  UINTN    TransferRateValue = 0;\r
  UINTN    TimeValue = 0 ;\r
  UINTN    Frequency = 0;\r
\r
  DEBUG ((DEBUG_BLKIO, "CalculateCardCLKD()\n"));\r
\r
  // For SD Cards  we would need to send CMD6 to set\r
  // speeds abouve 25MHz. High Speed mode 50 MHz and up\r
\r
  // Calculate Transfer rate unit (Bits 2:0 of TRAN_SPEED)\r
  switch (mMaxDataTransferRate & 0x7) { // 2\r
    case 0:\r
      TransferRateValue = 100 * 1000;\r
      break;\r
\r
    case 1:\r
      TransferRateValue = 1 * 1000 * 1000;\r
      break;\r
\r
    case 2:\r
      TransferRateValue = 10 * 1000 * 1000;\r
      break;\r
\r
    case 3:\r
      TransferRateValue = 100 * 1000 * 1000;\r
      break;\r
\r
    default:\r
      DEBUG ((DEBUG_BLKIO, "Invalid parameter.\n"));\r
      ASSERT(FALSE);\r
      return;\r
  }\r
\r
  //Calculate Time value (Bits 6:3 of TRAN_SPEED)\r
  switch ((mMaxDataTransferRate >> 3) & 0xF) { // 6\r
    case 1:\r
      TimeValue = 10;\r
      break;\r
\r
    case 2:\r
      TimeValue = 12;\r
      break;\r
\r
    case 3:\r
      TimeValue = 13;\r
      break;\r
\r
    case 4:\r
      TimeValue = 15;\r
      break;\r
\r
    case 5:\r
      TimeValue = 20;\r
      break;\r
\r
    case 6:\r
      TimeValue = 25;\r
      break;\r
\r
    case 7:\r
      TimeValue = 30;\r
      break;\r
\r
    case 8:\r
      TimeValue = 35;\r
      break;\r
\r
    case 9:\r
      TimeValue = 40;\r
      break;\r
\r
    case 10:\r
      TimeValue = 45;\r
      break;\r
\r
    case 11:\r
      TimeValue = 50;\r
      break;\r
\r
    case 12:\r
      TimeValue = 55;\r
      break;\r
\r
    case 13:\r
      TimeValue = 60;\r
      break;\r
\r
    case 14:\r
      TimeValue = 70;\r
      break;\r
\r
    case 15:\r
      TimeValue = 80;\r
      break;\r
\r
    default:\r
      DEBUG ((DEBUG_BLKIO, "Invalid parameter.\n"));\r
      ASSERT(FALSE);\r
      return;\r
  }\r
\r
  Frequency = TransferRateValue * TimeValue/10;\r
\r
  // Calculate Clock divider value to program in MMCHS_SYSCTL[CLKD] field.\r
  *ClockFrequencySelect = ((MMC_REFERENCE_CLK/Frequency) + 1);\r
\r
  DEBUG ((DEBUG_BLKIO, "mMaxDataTransferRate: 0x%x, Frequency: %d KHz, ClockFrequencySelect: %x\n", mMaxDataTransferRate, Frequency/1000, *ClockFrequencySelect));\r
}\r
\r
VOID\r
UpdateMMCHSClkFrequency (\r
  UINTN NewCLKD\r
  )\r
{\r
  DEBUG ((DEBUG_BLKIO, "UpdateMMCHSClkFrequency()\n"));\r
\r
  // Set Clock enable to 0x0 to not provide the clock to the card\r
  MmioAnd32 (MMCHS_SYSCTL, ~CEN);\r
\r
  // Set new clock frequency.\r
  MmioAndThenOr32 (MMCHS_SYSCTL, ~CLKD_MASK, NewCLKD << 6);\r
\r
  // Poll till Internal Clock Stable\r
  while ((MmioRead32 (MMCHS_SYSCTL) & ICS_MASK) != ICS);\r
\r
  // Set Clock enable to 0x1 to provide the clock to the card\r
  MmioOr32 (MMCHS_SYSCTL, CEN);\r
}\r
\r
EFI_STATUS\r
InitializeMMCHS (\r
  VOID\r
  )\r
{\r
  UINT8      Data;\r
  EFI_STATUS Status;\r
\r
  DEBUG ((DEBUG_BLKIO, "InitializeMMCHS()\n"));\r
\r
  // Select Device group to belong to P1 device group in Power IC.\r
  Data = DEV_GRP_P1;\r
  Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, VMMC1_DEV_GRP), 1, &Data);\r
  ASSERT_EFI_ERROR(Status);\r
\r
  // Configure voltage regulator for MMC1 in Power IC to output 3.0 voltage.\r
  Data = VSEL_3_00V;\r
  Status = gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID4, VMMC1_DEDICATED_REG), 1, &Data);\r
  ASSERT_EFI_ERROR(Status);\r
\r
  // After ramping up voltage, set VDDS stable bit to indicate that voltage level is stable.\r
  MmioOr32 (CONTROL_PBIAS_LITE, (PBIASLITEVMODE0 | PBIASLITEPWRDNZ0 | PBIASSPEEDCTRL0 | PBIASLITEVMODE1 | PBIASLITEWRDNZ1));\r
\r
  // Enable WP GPIO\r
  MmioAndThenOr32 (GPIO1_BASE + GPIO_OE, ~BIT23, BIT23);\r
\r
  // Enable Card Detect\r
  Data = CARD_DETECT_ENABLE;\r
  gTPS65950->Write (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID2, TPS65950_GPIO_CTRL), 1, &Data);\r
\r
  return Status;\r
}\r
\r
BOOLEAN\r
MMCIsCardPresent (\r
  IN EFI_MMC_HOST_PROTOCOL     *This\r
  )\r
{\r
  EFI_STATUS  Status;\r
  UINT8       Data;\r
\r
  //\r
  // Card detect is a GPIO0 on the TPS65950\r
  //\r
  Status = gTPS65950->Read (gTPS65950, EXTERNAL_DEVICE_REGISTER(I2C_ADDR_GRP_ID2, GPIODATAIN1), 1, &Data);\r
  if (EFI_ERROR (Status)) {\r
    return FALSE;\r
  }\r
\r
  return !(Data & CARD_DETECT_BIT);\r
}\r
\r
BOOLEAN\r
MMCIsReadOnly (\r
  IN EFI_MMC_HOST_PROTOCOL     *This\r
  )\r
{\r
  /* Note:\r
   * On our BeagleBoard the SD card WP pin is always read as TRUE.\r
   * Probably something wrong with GPIO configuration.\r
   * BeagleBoard-xM uses microSD cards so there is no write protect at all.\r
   * Hence commenting out SD card WP pin read status.\r
   */\r
  //return (MmioRead32 (GPIO1_BASE + GPIO_DATAIN) & BIT23) == BIT23;\r
  return 0;\r
\r
}\r
\r
// TODO\r
EFI_GUID mPL180MciDevicePathGuid = EFI_CALLER_ID_GUID;\r
\r
EFI_STATUS\r
MMCBuildDevicePath (\r
  IN EFI_MMC_HOST_PROTOCOL     *This,\r
  IN EFI_DEVICE_PATH_PROTOCOL  **DevicePath\r
  )\r
{\r
  EFI_DEVICE_PATH_PROTOCOL    *NewDevicePathNode;\r
\r
  NewDevicePathNode = CreateDeviceNode(HARDWARE_DEVICE_PATH,HW_VENDOR_DP,sizeof(VENDOR_DEVICE_PATH));\r
  CopyGuid(&((VENDOR_DEVICE_PATH*)NewDevicePathNode)->Guid,&mPL180MciDevicePathGuid);\r
  *DevicePath = NewDevicePathNode;\r
  return EFI_SUCCESS;\r
}\r
\r
EFI_STATUS\r
MMCSendCommand (\r
  IN EFI_MMC_HOST_PROTOCOL     *This,\r
  IN MMC_CMD                   MmcCmd,\r
  IN UINT32                    Argument\r
  )\r
{\r
  UINTN MmcStatus;\r
  UINTN RetryCount = 0;\r
\r
  if (IgnoreCommand(MmcCmd))\r
    return EFI_SUCCESS;\r
\r
  MmcCmd = TranslateCommand(MmcCmd);\r
\r
  //DEBUG ((EFI_D_ERROR, "MMCSendCommand(%d)\n", MmcCmd));\r
\r
  // Check if command line is in use or not. Poll till command line is available.\r
  while ((MmioRead32 (MMCHS_PSTATE) & DATI_MASK) == DATI_NOT_ALLOWED);\r
\r
  // Provide the block size.\r
  MmioWrite32 (MMCHS_BLK, BLEN_512BYTES);\r
\r
  // Setting Data timeout counter value to max value.\r
  MmioAndThenOr32 (MMCHS_SYSCTL, ~DTO_MASK, DTO_VAL);\r
\r
  // Clear Status register.\r
  MmioWrite32 (MMCHS_STAT, 0xFFFFFFFF);\r
\r
  // Set command argument register\r
  MmioWrite32 (MMCHS_ARG, Argument);\r
\r
  //TODO: fix this\r
  //Enable interrupt enable events to occur\r
  //MmioWrite32 (MMCHS_IE, CmdInterruptEnableVal);\r
\r
  // Send a command\r
  MmioWrite32 (MMCHS_CMD, MmcCmd);\r
\r
  // Check for the command status.\r
  while (RetryCount < MAX_RETRY_COUNT) {\r
    do {\r
      MmcStatus = MmioRead32 (MMCHS_STAT);\r
    } while (MmcStatus == 0);\r
\r
    // Read status of command response\r
    if ((MmcStatus & ERRI) != 0) {\r
\r
      // Perform soft-reset for mmci_cmd line.\r
      MmioOr32 (MMCHS_SYSCTL, SRC);\r
      while ((MmioRead32 (MMCHS_SYSCTL) & SRC));\r
\r
      //DEBUG ((EFI_D_INFO, "MmcStatus: 0x%x\n", MmcStatus));\r
      return EFI_DEVICE_ERROR;\r
    }\r
\r
    // Check if command is completed.\r
    if ((MmcStatus & CC) == CC) {\r
      MmioWrite32 (MMCHS_STAT, CC);\r
      break;\r
    }\r
\r
    RetryCount++;\r
  }\r
\r
  if (RetryCount == MAX_RETRY_COUNT) {\r
    DEBUG ((DEBUG_BLKIO, "MMCSendCommand: Timeout\n"));\r
    return EFI_TIMEOUT;\r
  }\r
\r
  return EFI_SUCCESS;\r
}\r
\r
EFI_STATUS\r
MMCNotifyState (\r
  IN EFI_MMC_HOST_PROTOCOL    *This,\r
  IN MMC_STATE                State\r
  )\r
{\r
  EFI_STATUS              Status;\r
  UINTN                   FreqSel;\r
\r
  switch(State) {\r
    case MmcInvalidState:\r
      ASSERT(0);\r
      break;\r
    case MmcHwInitializationState:\r
      mBitModeSet = FALSE;\r
\r
      DEBUG ((DEBUG_BLKIO, "MMCHwInitializationState()\n"));\r
      Status = InitializeMMCHS ();\r
      if (EFI_ERROR(Status)) {\r
        DEBUG ((DEBUG_BLKIO, "Initialize MMC host controller fails. Status: %x\n", Status));\r
        return Status;\r
      }\r
\r
      // Software reset of the MMCHS host controller.\r
      MmioWrite32 (MMCHS_SYSCONFIG, SOFTRESET);\r
      gBS->Stall(1000);\r
      while ((MmioRead32 (MMCHS_SYSSTATUS) & RESETDONE_MASK) != RESETDONE);\r
\r
      // Soft reset for all.\r
      MmioWrite32 (MMCHS_SYSCTL, SRA);\r
      gBS->Stall(1000);\r
      while ((MmioRead32 (MMCHS_SYSCTL) & SRA) != 0x0);\r
\r
      //Voltage capabilities initialization. Activate VS18 and VS30.\r
      MmioOr32 (MMCHS_CAPA, (VS30 | VS18));\r
\r
      // Wakeup configuration\r
      MmioOr32 (MMCHS_SYSCONFIG, ENAWAKEUP);\r
      MmioOr32 (MMCHS_HCTL, IWE);\r
\r
      // MMCHS Controller default initialization\r
      MmioOr32 (MMCHS_CON, (OD | DW8_1_4_BIT | CEATA_OFF));\r
\r
      MmioWrite32 (MMCHS_HCTL, (SDVS_3_0_V | DTW_1_BIT | SDBP_OFF));\r
\r
      // Enable internal clock\r
      MmioOr32 (MMCHS_SYSCTL, ICE);\r
\r
      // Set the clock frequency to 80KHz.\r
      UpdateMMCHSClkFrequency (CLKD_80KHZ);\r
\r
      // Enable SD bus power.\r
      MmioOr32 (MMCHS_HCTL, (SDBP_ON));\r
\r
      // Poll till SD bus power bit is set.\r
      while ((MmioRead32 (MMCHS_HCTL) & SDBP_MASK) != SDBP_ON);\r
\r
      // Enable interrupts.\r
      MmioWrite32 (MMCHS_IE, (BADA_EN | CERR_EN | DEB_EN | DCRC_EN | DTO_EN | CIE_EN |\r
        CEB_EN | CCRC_EN | CTO_EN | BRR_EN | BWR_EN | TC_EN | CC_EN));\r
\r
      // Controller INIT procedure start.\r
      MmioOr32 (MMCHS_CON, INIT);\r
      MmioWrite32 (MMCHS_CMD, 0x00000000);\r
      while (!(MmioRead32 (MMCHS_STAT) & CC));\r
\r
      // Wait for 1 ms\r
      gBS->Stall (1000);\r
\r
      // Set CC bit to 0x1 to clear the flag\r
      MmioOr32 (MMCHS_STAT, CC);\r
\r
      // Retry INIT procedure.\r
      MmioWrite32 (MMCHS_CMD, 0x00000000);\r
      while (!(MmioRead32 (MMCHS_STAT) & CC));\r
\r
      // End initialization sequence\r
      MmioAnd32 (MMCHS_CON, ~INIT);\r
\r
      MmioOr32 (MMCHS_HCTL, (SDVS_3_0_V | DTW_1_BIT | SDBP_ON));\r
\r
      // Change clock frequency to 400KHz to fit protocol\r
      UpdateMMCHSClkFrequency(CLKD_400KHZ);\r
\r
      MmioOr32 (MMCHS_CON, OD);\r
      break;\r
    case MmcIdleState:\r
      break;\r
    case MmcReadyState:\r
      break;\r
    case MmcIdentificationState:\r
      break;\r
    case MmcStandByState:\r
      CalculateCardCLKD (&FreqSel);\r
      UpdateMMCHSClkFrequency (FreqSel);\r
      break;\r
    case MmcTransferState:\r
      if (!mBitModeSet) {\r
        Status = MMCSendCommand (This, CMD55, mRca << 16);\r
        if (!EFI_ERROR (Status)) {\r
          // Set device into 4-bit data bus mode\r
          Status = MMCSendCommand (This, ACMD6, 0x2);\r
          if (!EFI_ERROR (Status)) {\r
            // Set host controler into 4-bit mode\r
            MmioOr32 (MMCHS_HCTL, DTW_4_BIT);\r
            DEBUG ((DEBUG_BLKIO, "SD Memory Card set to 4-bit mode\n"));\r
            mBitModeSet = TRUE;\r
          }\r
        }\r
      }\r
      break;\r
    case MmcSendingDataState:\r
      break;\r
    case MmcReceiveDataState:\r
      break;\r
    case MmcProgrammingState:\r
      break;\r
    case MmcDisconnectState:\r
    default:\r
      ASSERT(0);\r
  }\r
  return EFI_SUCCESS;\r
}\r
\r
EFI_STATUS\r
MMCReceiveResponse (\r
  IN EFI_MMC_HOST_PROTOCOL     *This,\r
  IN MMC_RESPONSE_TYPE         Type,\r
  IN UINT32*                   Buffer\r
  )\r
{\r
  if (Buffer == NULL) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  if (Type == MMC_RESPONSE_TYPE_R2) {\r
    Buffer[0] = MmioRead32 (MMCHS_RSP10);\r
    Buffer[1] = MmioRead32 (MMCHS_RSP32);\r
    Buffer[2] = MmioRead32 (MMCHS_RSP54);\r
    Buffer[3] = MmioRead32 (MMCHS_RSP76);\r
  } else {\r
    Buffer[0] = MmioRead32 (MMCHS_RSP10);\r
  }\r
\r
  if (Type == MMC_RESPONSE_TYPE_CSD) {\r
    mMaxDataTransferRate = Buffer[3] & 0xFF;\r
  } else if (Type == MMC_RESPONSE_TYPE_RCA) {\r
    mRca = Buffer[0] >> 16;\r
  }\r
\r
  return EFI_SUCCESS;\r
}\r
\r
EFI_STATUS\r
MMCReadBlockData (\r
  IN EFI_MMC_HOST_PROTOCOL      *This,\r
  IN EFI_LBA                    Lba,\r
  IN UINTN                      Length,\r
  IN UINT32*                    Buffer\r
  )\r
{\r
  UINTN MmcStatus;\r
  UINTN Count;\r
  UINTN RetryCount = 0;\r
\r
  DEBUG ((DEBUG_BLKIO, "MMCReadBlockData(LBA: 0x%x, Length: 0x%x, Buffer: 0x%x)\n", Lba, Length, Buffer));\r
\r
  // Check controller status to make sure there is no error.\r
  while (RetryCount < MAX_RETRY_COUNT) {\r
    do {\r
      // Read Status.\r
      MmcStatus = MmioRead32 (MMCHS_STAT);\r
    } while(MmcStatus == 0);\r
\r
    // Check if Buffer read ready (BRR) bit is set?\r
    if (MmcStatus & BRR) {\r
\r
      // Clear BRR bit\r
      MmioOr32 (MMCHS_STAT, BRR);\r
\r
      for (Count = 0; Count < Length / 4; Count++) {\r
        *Buffer++ = MmioRead32(MMCHS_DATA);\r
      }\r
      break;\r
    }\r
    RetryCount++;\r
  }\r
\r
  if (RetryCount == MAX_RETRY_COUNT) {\r
    return EFI_TIMEOUT;\r
  }\r
\r
  return EFI_SUCCESS;\r
}\r
\r
EFI_STATUS\r
MMCWriteBlockData (\r
  IN EFI_MMC_HOST_PROTOCOL    *This,\r
  IN EFI_LBA                  Lba,\r
  IN UINTN                    Length,\r
  IN UINT32*                  Buffer\r
  )\r
{\r
  UINTN MmcStatus;\r
  UINTN Count;\r
  UINTN RetryCount = 0;\r
\r
  // Check controller status to make sure there is no error.\r
  while (RetryCount < MAX_RETRY_COUNT) {\r
    do {\r
      // Read Status.\r
      MmcStatus = MmioRead32 (MMCHS_STAT);\r
    } while(MmcStatus == 0);\r
\r
    // Check if Buffer write ready (BWR) bit is set?\r
    if (MmcStatus & BWR) {\r
\r
      // Clear BWR bit\r
      MmioOr32 (MMCHS_STAT, BWR);\r
\r
      // Write block worth of data.\r
      for (Count = 0; Count < Length / 4; Count++) {\r
        MmioWrite32 (MMCHS_DATA, *Buffer++);\r
      }\r
\r
      break;\r
    }\r
    RetryCount++;\r
  }\r
\r
  if (RetryCount == MAX_RETRY_COUNT) {\r
    return EFI_TIMEOUT;\r
  }\r
\r
  return EFI_SUCCESS;\r
}\r
\r
EFI_MMC_HOST_PROTOCOL gMMCHost = {\r
  MMC_HOST_PROTOCOL_REVISION,\r
  MMCIsCardPresent,\r
  MMCIsReadOnly,\r
  MMCBuildDevicePath,\r
  MMCNotifyState,\r
  MMCSendCommand,\r
  MMCReceiveResponse,\r
  MMCReadBlockData,\r
  MMCWriteBlockData\r
};\r
\r
EFI_STATUS\r
MMCInitialize (\r
  IN EFI_HANDLE         ImageHandle,\r
  IN EFI_SYSTEM_TABLE   *SystemTable\r
  )\r
{\r
  EFI_STATUS    Status;\r
  EFI_HANDLE    Handle = NULL;\r
\r
  DEBUG ((DEBUG_BLKIO, "MMCInitialize()\n"));\r
\r
  Status = gBS->LocateProtocol (&gEmbeddedExternalDeviceProtocolGuid, NULL, (VOID **)&gTPS65950);\r
  ASSERT_EFI_ERROR(Status);\r
\r
  Status = gBS->InstallMultipleProtocolInterfaces (\r
                  &Handle,\r
                  &gEfiMmcHostProtocolGuid,         &gMMCHost,\r
                  NULL\r
                  );\r
  ASSERT_EFI_ERROR (Status);\r
\r
  return Status;\r
}\r