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a3f98646 | 1 | /** @file\r |
2 | \r | |
3 | Copyright (c) 2008-2009 Apple Inc. All rights reserved.<BR>\r | |
4 | \r | |
5 | All rights reserved. This program and the accompanying materials\r | |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
15 | #ifndef _PCI_ROOT_BRIDGE_H_\r | |
16 | #define _PCI_ROOT_BRIDGE_H_\r | |
17 | \r | |
18 | #include <PiDxe.h>\r | |
19 | \r | |
20 | #include <TPS65950.h>\r | |
21 | \r | |
22 | #include <Library/BaseLib.h>\r | |
23 | #include <Library/BaseMemoryLib.h>\r | |
24 | #include <Library/DebugLib.h>\r | |
25 | #include <Library/DxeServicesTableLib.h>\r | |
26 | #include <Library/IoLib.h>\r | |
27 | #include <Library/MemoryAllocationLib.h>\r | |
28 | #include <Library/PciLib.h>\r | |
29 | #include <Library/UefiLib.h>\r | |
30 | #include <Library/UefiBootServicesTableLib.h>\r | |
31 | #include <Library/UncachedMemoryAllocationLib.h>\r | |
32 | \r | |
33 | #include <Protocol/EmbeddedExternalDevice.h>\r | |
34 | #include <Protocol/Cpu.h>\r | |
35 | #include <Protocol/DevicePath.h>\r | |
36 | #include <Protocol/PciIo.h>\r | |
37 | #include <Protocol/PciRootBridgeIo.h>\r | |
38 | #include <Protocol/PciHostBridgeResourceAllocation.h>\r | |
39 | \r | |
40 | #include <IndustryStandard/Pci22.h>\r | |
41 | #include <IndustryStandard/Acpi.h>\r | |
42 | \r | |
43 | extern EFI_CPU_ARCH_PROTOCOL *gCpu;\r | |
44 | \r | |
45 | #define EFI_RESOURCE_NONEXISTENT 0xFFFFFFFFFFFFFFFFULL\r | |
46 | #define EFI_RESOURCE_LESS 0xFFFFFFFFFFFFFFFEULL\r | |
47 | #define EFI_RESOURCE_SATISFIED 0x0000000000000000ULL\r | |
48 | \r | |
49 | \r | |
50 | typedef struct {\r | |
51 | ACPI_HID_DEVICE_PATH AcpiDevicePath;\r | |
52 | EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r | |
53 | } EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;\r | |
54 | \r | |
55 | \r | |
56 | #define ACPI_CONFIG_IO 0\r | |
57 | #define ACPI_CONFIG_MMIO 1\r | |
58 | #define ACPI_CONFIG_BUS 2\r | |
59 | \r | |
60 | typedef struct {\r | |
61 | EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR Desc[3];\r | |
62 | EFI_ACPI_END_TAG_DESCRIPTOR EndDesc;\r | |
63 | } ACPI_CONFIG_INFO;\r | |
64 | \r | |
65 | \r | |
66 | #define PCI_ROOT_BRIDGE_SIGNATURE SIGNATURE_32 ('P', 'c', 'i', 'F')\r | |
67 | \r | |
68 | typedef struct {\r | |
69 | UINT32 Signature;\r | |
70 | EFI_HANDLE Handle;\r | |
71 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL Io;\r | |
72 | EFI_PCI_ROOT_BRIDGE_DEVICE_PATH DevicePath;\r | |
73 | \r | |
74 | UINT8 StartBus;\r | |
75 | UINT8 EndBus;\r | |
76 | UINT16 Type;\r | |
77 | UINT32 MemoryStart;\r | |
78 | UINT32 MemorySize;\r | |
79 | UINTN IoOffset;\r | |
80 | UINT32 IoStart;\r | |
81 | UINT32 IoSize;\r | |
82 | UINT64 PciAttributes; \r | |
83 | \r | |
84 | ACPI_CONFIG_INFO *Config;\r | |
85 | \r | |
86 | } PCI_ROOT_BRIDGE;\r | |
87 | \r | |
88 | \r | |
89 | #define INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(a) CR (a, PCI_ROOT_BRIDGE, Io, PCI_ROOT_BRIDGE_SIGNATURE)\r | |
90 | \r | |
91 | \r | |
92 | typedef union {\r | |
93 | UINT8 volatile *buf;\r | |
94 | UINT8 volatile *ui8;\r | |
95 | UINT16 volatile *ui16;\r | |
96 | UINT32 volatile *ui32;\r | |
97 | UINT64 volatile *ui64;\r | |
98 | UINTN volatile ui;\r | |
99 | } PTR;\r | |
100 | \r | |
101 | \r | |
102 | typedef struct {\r | |
103 | EFI_PHYSICAL_ADDRESS HostAddress;\r | |
104 | EFI_PHYSICAL_ADDRESS DeviceAddress;\r | |
105 | UINTN NumberOfBytes;\r | |
106 | EFI_PCI_IO_PROTOCOL_OPERATION Operation;\r | |
107 | \r | |
108 | } MAP_INFO_INSTANCE;\r | |
109 | \r | |
110 | \r | |
111 | typedef struct {\r | |
112 | EFI_PHYSICAL_ADDRESS HostAddress;\r | |
113 | EFI_PHYSICAL_ADDRESS DeviceAddress;\r | |
114 | UINTN NumberOfBytes;\r | |
115 | EFI_PCI_IO_PROTOCOL_OPERATION Operation;\r | |
116 | } PCI_DMA_MAP;\r | |
117 | \r | |
118 | EFI_STATUS\r | |
119 | EFIAPI\r | |
120 | PciRootBridgeIoPollMem ( \r | |
121 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
122 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r | |
123 | IN UINT64 Address,\r | |
124 | IN UINT64 Mask,\r | |
125 | IN UINT64 Value,\r | |
126 | IN UINT64 Delay,\r | |
127 | OUT UINT64 *Result\r | |
128 | );\r | |
129 | \r | |
130 | EFI_STATUS\r | |
131 | EFIAPI\r | |
132 | PciRootBridgeIoPollIo ( \r | |
133 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
134 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r | |
135 | IN UINT64 Address,\r | |
136 | IN UINT64 Mask,\r | |
137 | IN UINT64 Value,\r | |
138 | IN UINT64 Delay,\r | |
139 | OUT UINT64 *Result\r | |
140 | );\r | |
141 | \r | |
142 | EFI_STATUS\r | |
143 | EFIAPI\r | |
144 | PciRootBridgeIoMemRead (\r | |
145 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
146 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r | |
147 | IN UINT64 Address,\r | |
148 | IN UINTN Count,\r | |
149 | IN OUT VOID *Buffer\r | |
150 | );\r | |
151 | \r | |
152 | EFI_STATUS\r | |
153 | EFIAPI\r | |
154 | PciRootBridgeIoMemWrite (\r | |
155 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
156 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r | |
157 | IN UINT64 Address,\r | |
158 | IN UINTN Count,\r | |
159 | IN OUT VOID *Buffer\r | |
160 | );\r | |
161 | \r | |
162 | EFI_STATUS\r | |
163 | EFIAPI\r | |
164 | PciRootBridgeIoIoRead (\r | |
165 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
166 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r | |
167 | IN UINT64 UserAddress,\r | |
168 | IN UINTN Count,\r | |
169 | IN OUT VOID *UserBuffer\r | |
170 | );\r | |
171 | \r | |
172 | EFI_STATUS\r | |
173 | EFIAPI\r | |
174 | PciRootBridgeIoIoWrite (\r | |
175 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
176 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r | |
177 | IN UINT64 UserAddress,\r | |
178 | IN UINTN Count,\r | |
179 | IN OUT VOID *UserBuffer\r | |
180 | );\r | |
181 | \r | |
182 | EFI_STATUS\r | |
183 | EFIAPI\r | |
184 | PciRootBridgeIoCopyMem (\r | |
185 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
186 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r | |
187 | IN UINT64 DestAddress,\r | |
188 | IN UINT64 SrcAddress,\r | |
189 | IN UINTN Count\r | |
190 | );\r | |
191 | \r | |
192 | EFI_STATUS\r | |
193 | EFIAPI\r | |
194 | PciRootBridgeIoPciRead (\r | |
195 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
196 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r | |
197 | IN UINT64 Address,\r | |
198 | IN UINTN Count,\r | |
199 | IN OUT VOID *Buffer\r | |
200 | );\r | |
201 | \r | |
202 | EFI_STATUS\r | |
203 | EFIAPI\r | |
204 | PciRootBridgeIoPciWrite (\r | |
205 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
206 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r | |
207 | IN UINT64 Address,\r | |
208 | IN UINTN Count,\r | |
209 | IN OUT VOID *Buffer\r | |
210 | );\r | |
211 | \r | |
212 | EFI_STATUS\r | |
213 | EFIAPI\r | |
214 | PciRootBridgeIoMap (\r | |
215 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
216 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation,\r | |
217 | IN VOID *HostAddress,\r | |
218 | IN OUT UINTN *NumberOfBytes,\r | |
219 | OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,\r | |
220 | OUT VOID **Mapping\r | |
221 | );\r | |
222 | \r | |
223 | EFI_STATUS\r | |
224 | EFIAPI\r | |
225 | PciRootBridgeIoUnmap (\r | |
226 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
227 | IN VOID *Mapping\r | |
228 | );\r | |
229 | \r | |
230 | EFI_STATUS\r | |
231 | EFIAPI\r | |
232 | PciRootBridgeIoAllocateBuffer (\r | |
233 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
234 | IN EFI_ALLOCATE_TYPE Type,\r | |
235 | IN EFI_MEMORY_TYPE MemoryType,\r | |
236 | IN UINTN Pages,\r | |
237 | OUT VOID **HostAddress,\r | |
238 | IN UINT64 Attributes\r | |
239 | );\r | |
240 | \r | |
241 | EFI_STATUS\r | |
242 | EFIAPI\r | |
243 | PciRootBridgeIoFreeBuffer (\r | |
244 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
245 | IN UINTN Pages,\r | |
246 | OUT VOID *HostAddress\r | |
247 | );\r | |
248 | \r | |
249 | EFI_STATUS\r | |
250 | EFIAPI\r | |
251 | PciRootBridgeIoFlush (\r | |
252 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This\r | |
253 | );\r | |
254 | \r | |
255 | EFI_STATUS\r | |
256 | EFIAPI\r | |
257 | PciRootBridgeIoGetAttributes (\r | |
258 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
259 | OUT UINT64 *Supported,\r | |
260 | OUT UINT64 *Attributes\r | |
261 | );\r | |
262 | \r | |
263 | EFI_STATUS\r | |
264 | EFIAPI\r | |
265 | PciRootBridgeIoSetAttributes (\r | |
266 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
267 | IN UINT64 Attributes,\r | |
268 | IN OUT UINT64 *ResourceBase,\r | |
269 | IN OUT UINT64 *ResourceLength \r | |
270 | ); \r | |
271 | \r | |
272 | EFI_STATUS\r | |
273 | EFIAPI\r | |
274 | PciRootBridgeIoConfiguration (\r | |
275 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *This,\r | |
276 | OUT VOID **Resources\r | |
277 | );\r | |
278 | \r | |
279 | //\r | |
280 | // Private Function Prototypes\r | |
281 | //\r | |
282 | EFI_STATUS\r | |
283 | EFIAPI\r | |
284 | PciRootBridgeIoMemRW (\r | |
285 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r | |
286 | IN UINTN Count,\r | |
287 | IN BOOLEAN InStrideFlag,\r | |
288 | IN PTR In,\r | |
289 | IN BOOLEAN OutStrideFlag,\r | |
290 | OUT PTR Out\r | |
291 | );\r | |
292 | \r | |
293 | BOOLEAN\r | |
294 | PciIoMemAddressValid (\r | |
295 | IN EFI_PCI_IO_PROTOCOL *This,\r | |
296 | IN UINT64 Address\r | |
297 | );\r | |
298 | \r | |
299 | EFI_STATUS\r | |
300 | EmulatePciIoForEhci (\r | |
301 | INTN MvPciIfMaxIf\r | |
302 | );\r | |
303 | \r | |
304 | #endif\r | |
305 | \r |