[mirror_edk2.git] / OvmfPkg / AmdSevDxe / AmdSevDxe.c

/** @file\r
\r
  AMD Sev Dxe driver. This driver is dispatched early in DXE, due to being list\r
  in APRIORI. It clears C-bit from MMIO and NonExistent Memory space when SEV\r
  is enabled.\r
\r
  Copyright (c) 2017 - 2020, AMD Inc. All rights reserved.<BR>\r
\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#include <IndustryStandard/Q35MchIch9.h>\r
#include <Library/BaseLib.h>\r
#include <Library/BaseMemoryLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/DxeServicesTableLib.h>\r
#include <Library/MemEncryptSevLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
#include <Library/UefiBootServicesTableLib.h>\r
#include <Guid/ConfidentialComputingSevSnpBlob.h>\r
#include <Library/PcdLib.h>\r
#include <Pi/PrePiDxeCis.h>\r
#include <Protocol/SevMemoryAcceptance.h>\r
#include <Protocol/MemoryAccept.h>\r
#include <Uefi/UefiSpec.h>\r
\r
// Present, initialized, tested bits defined in MdeModulePkg/Core/Dxe/DxeMain.h\r
#define EFI_MEMORY_INTERNAL_MASK  0x0700000000000000ULL\r
\r
STATIC CONFIDENTIAL_COMPUTING_SNP_BLOB_LOCATION  mSnpBootDxeTable = {\r
  SIGNATURE_32 ('A',                                    'M', 'D', 'E'),\r
  1,\r
  0,\r
  (UINT64)(UINTN)FixedPcdGet32 (PcdOvmfSnpSecretsBase),\r
  FixedPcdGet32 (PcdOvmfSnpSecretsSize),\r
  (UINT64)(UINTN)FixedPcdGet32 (PcdOvmfCpuidBase),\r
  FixedPcdGet32 (PcdOvmfCpuidSize),\r
};\r
\r
STATIC EFI_HANDLE  mAmdSevDxeHandle = NULL;\r
\r
STATIC BOOLEAN  mAcceptAllMemoryAtEBS = TRUE;\r
\r
STATIC EFI_EVENT  mAcceptAllMemoryEvent = NULL;\r
\r
#define IS_ALIGNED(x, y)  ((((x) & ((y) - 1)) == 0))\r
\r
STATIC\r
EFI_STATUS\r
EFIAPI\r
AmdSevMemoryAccept (\r
  IN EDKII_MEMORY_ACCEPT_PROTOCOL  *This,\r
  IN EFI_PHYSICAL_ADDRESS          StartAddress,\r
  IN UINTN                         Size\r
  )\r
{\r
  //\r
  // The StartAddress must be page-aligned, and the Size must be a positive\r
  // multiple of SIZE_4KB. Use an assert instead of returning an erros since\r
  // this is an EDK2-internal protocol.\r
  //\r
  ASSERT (IS_ALIGNED (StartAddress, SIZE_4KB));\r
  ASSERT (IS_ALIGNED (Size, SIZE_4KB));\r
  ASSERT (Size != 0);\r
\r
  MemEncryptSevSnpPreValidateSystemRam (\r
    StartAddress,\r
    EFI_SIZE_TO_PAGES (Size)\r
    );\r
\r
  return EFI_SUCCESS;\r
}\r
\r
STATIC\r
EFI_STATUS\r
AcceptAllMemory (\r
  VOID\r
  )\r
{\r
  EFI_GCD_MEMORY_SPACE_DESCRIPTOR  *AllDescMap;\r
  UINTN                            NumEntries;\r
  UINTN                            Index;\r
  EFI_STATUS                       Status;\r
\r
  DEBUG ((DEBUG_INFO, "Accepting all memory\n"));\r
\r
  /*\r
   * Get a copy of the memory space map to iterate over while\r
   * changing the map.\r
   */\r
  Status = gDS->GetMemorySpaceMap (&NumEntries, &AllDescMap);\r
  if (EFI_ERROR (Status)) {\r
    return Status;\r
  }\r
\r
  for (Index = 0; Index < NumEntries; Index++) {\r
    CONST EFI_GCD_MEMORY_SPACE_DESCRIPTOR  *Desc;\r
\r
    Desc = &AllDescMap[Index];\r
    if (Desc->GcdMemoryType != EFI_GCD_MEMORY_TYPE_UNACCEPTED) {\r
      continue;\r
    }\r
\r
    Status = AmdSevMemoryAccept (\r
               NULL,\r
               Desc->BaseAddress,\r
               Desc->Length\r
               );\r
    if (EFI_ERROR (Status)) {\r
      break;\r
    }\r
\r
    Status = gDS->RemoveMemorySpace (Desc->BaseAddress, Desc->Length);\r
    if (EFI_ERROR (Status)) {\r
      break;\r
    }\r
\r
    Status = gDS->AddMemorySpace (\r
                    EfiGcdMemoryTypeSystemMemory,\r
                    Desc->BaseAddress,\r
                    Desc->Length,\r
                    // Allocable system memory resource capabilities as masked\r
                    // in MdeModulePkg/Core/Dxe/Mem/Page.c:PromoteMemoryResource\r
                    Desc->Capabilities & ~(EFI_MEMORY_INTERNAL_MASK | EFI_MEMORY_RUNTIME)\r
                    );\r
    if (EFI_ERROR (Status)) {\r
      break;\r
    }\r
  }\r
\r
  gBS->FreePool (AllDescMap);\r
  gBS->CloseEvent (mAcceptAllMemoryEvent);\r
  return Status;\r
}\r
\r
VOID\r
EFIAPI\r
ResolveUnacceptedMemory (\r
  IN EFI_EVENT  Event,\r
  IN VOID       *Context\r
  )\r
{\r
  EFI_STATUS  Status;\r
\r
  if (!mAcceptAllMemoryAtEBS) {\r
    return;\r
  }\r
\r
  Status = AcceptAllMemory ();\r
  ASSERT_EFI_ERROR (Status);\r
}\r
\r
STATIC\r
EFI_STATUS\r
EFIAPI\r
AllowUnacceptedMemory (\r
  IN  OVMF_SEV_MEMORY_ACCEPTANCE_PROTOCOL  *This\r
  )\r
{\r
  mAcceptAllMemoryAtEBS = FALSE;\r
  return EFI_SUCCESS;\r
}\r
\r
STATIC\r
OVMF_SEV_MEMORY_ACCEPTANCE_PROTOCOL\r
  mMemoryAcceptanceProtocol = { AllowUnacceptedMemory };\r
\r
STATIC EDKII_MEMORY_ACCEPT_PROTOCOL  mMemoryAcceptProtocol = {\r
  AmdSevMemoryAccept\r
};\r
\r
EFI_STATUS\r
EFIAPI\r
AmdSevDxeEntryPoint (\r
  IN EFI_HANDLE        ImageHandle,\r
  IN EFI_SYSTEM_TABLE  *SystemTable\r
  )\r
{\r
  EFI_STATUS                       Status;\r
  EFI_GCD_MEMORY_SPACE_DESCRIPTOR  *AllDescMap;\r
  UINTN                            NumEntries;\r
  UINTN                            Index;\r
\r
  //\r
  // Do nothing when SEV is not enabled\r
  //\r
  if (!MemEncryptSevIsEnabled ()) {\r
    return EFI_UNSUPPORTED;\r
  }\r
\r
  //\r
  // Iterate through the GCD map and clear the C-bit from MMIO and NonExistent\r
  // memory space. The NonExistent memory space will be used for mapping the\r
  // MMIO space added later (eg PciRootBridge). By clearing both known MMIO and\r
  // NonExistent memory space can gurantee that current and furture MMIO adds\r
  // will have C-bit cleared.\r
  //\r
  Status = gDS->GetMemorySpaceMap (&NumEntries, &AllDescMap);\r
  if (!EFI_ERROR (Status)) {\r
    for (Index = 0; Index < NumEntries; Index++) {\r
      CONST EFI_GCD_MEMORY_SPACE_DESCRIPTOR  *Desc;\r
\r
      Desc = &AllDescMap[Index];\r
      if ((Desc->GcdMemoryType == EfiGcdMemoryTypeMemoryMappedIo) ||\r
          (Desc->GcdMemoryType == EfiGcdMemoryTypeNonExistent))\r
      {\r
        Status = MemEncryptSevClearMmioPageEncMask (\r
                   0,\r
                   Desc->BaseAddress,\r
                   EFI_SIZE_TO_PAGES (Desc->Length)\r
                   );\r
        ASSERT_EFI_ERROR (Status);\r
      }\r
    }\r
\r
    FreePool (AllDescMap);\r
  }\r
\r
  //\r
  // If PCI Express is enabled, the MMCONFIG area has been reserved, rather\r
  // than marked as MMIO, and so the C-bit won't be cleared by the above walk\r
  // through the GCD map. Check for the MMCONFIG area and clear the C-bit for\r
  // the range.\r
  //\r
  if (PcdGet16 (PcdOvmfHostBridgePciDevId) == INTEL_Q35_MCH_DEVICE_ID) {\r
    Status = MemEncryptSevClearMmioPageEncMask (\r
               0,\r
               FixedPcdGet64 (PcdPciExpressBaseAddress),\r
               EFI_SIZE_TO_PAGES (SIZE_256MB)\r
               );\r
\r
    ASSERT_EFI_ERROR (Status);\r
  }\r
\r
  //\r
  // When SMM is enabled, clear the C-bit from SMM Saved State Area\r
  //\r
  // NOTES: The SavedStateArea address cleared here is before SMBASE\r
  // relocation. Currently, we do not clear the SavedStateArea address after\r
  // SMBASE is relocated due to the following reasons:\r
  //\r
  // 1) Guest BIOS never access the relocated SavedStateArea.\r
  //\r
  // 2) The C-bit works on page-aligned address, but the SavedStateArea\r
  // address is not a page-aligned. Theoretically, we could roundup the address\r
  // and clear the C-bit of aligned address but looking carefully we found\r
  // that some portion of the page contains code -- which will causes a bigger\r
  // issues for SEV guest. When SEV is enabled, all the code must be encrypted\r
  // otherwise hardware will cause trap.\r
  //\r
  // We restore the C-bit for this SMM Saved State Area after SMBASE relocation\r
  // is completed (See OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c).\r
  //\r
  if (FeaturePcdGet (PcdSmmSmramRequire)) {\r
    UINTN  MapPagesBase;\r
    UINTN  MapPagesCount;\r
\r
    Status = MemEncryptSevLocateInitialSmramSaveStateMapPages (\r
               &MapPagesBase,\r
               &MapPagesCount\r
               );\r
    ASSERT_EFI_ERROR (Status);\r
\r
    //\r
    // Although these pages were set aside (i.e., allocated) by PlatformPei, we\r
    // could be after a warm reboot from the OS. Don't leak any stale OS data\r
    // to the hypervisor.\r
    //\r
    ZeroMem ((VOID *)MapPagesBase, EFI_PAGES_TO_SIZE (MapPagesCount));\r
\r
    Status = MemEncryptSevClearPageEncMask (\r
               0,             // Cr3BaseAddress -- use current CR3\r
               MapPagesBase,  // BaseAddress\r
               MapPagesCount  // NumPages\r
               );\r
    if (EFI_ERROR (Status)) {\r
      DEBUG ((\r
        DEBUG_ERROR,\r
        "%a: MemEncryptSevClearPageEncMask(): %r\n",\r
        __FUNCTION__,\r
        Status\r
        ));\r
      ASSERT (FALSE);\r
      CpuDeadLoop ();\r
    }\r
  }\r
\r
  if (MemEncryptSevSnpIsEnabled ()) {\r
    //\r
    // Memory acceptance began being required in SEV-SNP, so install the\r
    // memory accept protocol implementation for a SEV-SNP active guest.\r
    //\r
    Status = gBS->InstallMultipleProtocolInterfaces (\r
                    &mAmdSevDxeHandle,\r
                    &gEdkiiMemoryAcceptProtocolGuid,\r
                    &mMemoryAcceptProtocol,\r
                    &gOvmfSevMemoryAcceptanceProtocolGuid,\r
                    &mMemoryAcceptanceProtocol,\r
                    NULL\r
                    );\r
    ASSERT_EFI_ERROR (Status);\r
\r
    // SEV-SNP support does not automatically imply unaccepted memory support,\r
    // so make ExitBootServices accept all unaccepted memory if support is\r
    // not communicated.\r
    Status = gBS->CreateEventEx (\r
                    EVT_NOTIFY_SIGNAL,\r
                    TPL_CALLBACK,\r
                    ResolveUnacceptedMemory,\r
                    NULL,\r
                    &gEfiEventBeforeExitBootServicesGuid,\r
                    &mAcceptAllMemoryEvent\r
                    );\r
\r
    if (EFI_ERROR (Status)) {\r
      DEBUG ((DEBUG_ERROR, "AllowUnacceptedMemory event creation for EventBeforeExitBootServices failed.\n"));\r
    }\r
\r
    //\r
    // If its SEV-SNP active guest then install the CONFIDENTIAL_COMPUTING_SEV_SNP_BLOB.\r
    // It contains the location for both the Secrets and CPUID page.\r
    //\r
    return gBS->InstallConfigurationTable (\r
                  &gConfidentialComputingSevSnpBlobGuid,\r
                  &mSnpBootDxeTable\r
                  );\r
  }\r
\r
  return EFI_SUCCESS;\r
}\r
Commit	Line	Data
24e4ad75 BS	1	/** @file\r
	2	\r
	3	AMD Sev Dxe driver. This driver is dispatched early in DXE, due to being list\r
c16d4e35 LE	4	in APRIORI. It clears C-bit from MMIO and NonExistent Memory space when SEV\r
c16d4e35 LE	5	is enabled.\r
24e4ad75	6	\r
84cddd70	7	Copyright (c) 2017 - 2020, AMD Inc. All rights reserved.<BR>\r
24e4ad75	8	\r
b26f0cf9	9	SPDX-License-Identifier: BSD-2-Clause-Patent\r
24e4ad75 BS	10	\r
	11	**/\r
	12	\r
84cddd70	13	#include <IndustryStandard/Q35MchIch9.h>\r
5e2e5647 LE	14	#include <Library/BaseLib.h>\r
5e2e5647 LE	15	#include <Library/BaseMemoryLib.h>\r
c6073a0e	16	#include <Library/DebugLib.h>\r
24e4ad75 BS	17	#include <Library/DxeServicesTableLib.h>\r
24e4ad75 BS	18	#include <Library/MemEncryptSevLib.h>\r
c6073a0e	19	#include <Library/MemoryAllocationLib.h>\r
67484aed BS	20	#include <Library/UefiBootServicesTableLib.h>\r
67484aed BS	21	#include <Guid/ConfidentialComputingSevSnpBlob.h>\r
5e2e5647	22	#include <Library/PcdLib.h>\r
a00e2e55	23	#include <Pi/PrePiDxeCis.h>\r
466d8f65	24	#include <Protocol/SevMemoryAcceptance.h>\r
59aa48bb	25	#include <Protocol/MemoryAccept.h>\r
f67ec877 DG	26	#include <Uefi/UefiSpec.h>\r
	27	\r
	28	// Present, initialized, tested bits defined in MdeModulePkg/Core/Dxe/DxeMain.h\r
	29	#define EFI_MEMORY_INTERNAL_MASK 0x0700000000000000ULL\r
24e4ad75	30	\r
67484aed BS	31	STATIC CONFIDENTIAL_COMPUTING_SNP_BLOB_LOCATION mSnpBootDxeTable = {\r
	32	SIGNATURE_32 ('A', 'M', 'D', 'E'),\r
	33	1,\r
	34	0,\r
	35	(UINT64)(UINTN)FixedPcdGet32 (PcdOvmfSnpSecretsBase),\r
	36	FixedPcdGet32 (PcdOvmfSnpSecretsSize),\r
	37	(UINT64)(UINTN)FixedPcdGet32 (PcdOvmfCpuidBase),\r
	38	FixedPcdGet32 (PcdOvmfCpuidSize),\r
	39	};\r
	40	\r
59aa48bb SW	41	STATIC EFI_HANDLE mAmdSevDxeHandle = NULL;\r
59aa48bb SW	42	\r
a00e2e55 DG	43	STATIC BOOLEAN mAcceptAllMemoryAtEBS = TRUE;\r
	44	\r
	45	STATIC EFI_EVENT mAcceptAllMemoryEvent = NULL;\r
	46	\r
59aa48bb SW	47	#define IS_ALIGNED(x, y) ((((x) & ((y) - 1)) == 0))\r
	48	\r
	49	STATIC\r
	50	EFI_STATUS\r
	51	EFIAPI\r
	52	AmdSevMemoryAccept (\r
	53	IN EDKII_MEMORY_ACCEPT_PROTOCOL *This,\r
	54	IN EFI_PHYSICAL_ADDRESS StartAddress,\r
	55	IN UINTN Size\r
	56	)\r
	57	{\r
	58	//\r
	59	// The StartAddress must be page-aligned, and the Size must be a positive\r
	60	// multiple of SIZE_4KB. Use an assert instead of returning an erros since\r
	61	// this is an EDK2-internal protocol.\r
	62	//\r
	63	ASSERT (IS_ALIGNED (StartAddress, SIZE_4KB));\r
	64	ASSERT (IS_ALIGNED (Size, SIZE_4KB));\r
	65	ASSERT (Size != 0);\r
	66	\r
	67	MemEncryptSevSnpPreValidateSystemRam (\r
	68	StartAddress,\r
	69	EFI_SIZE_TO_PAGES (Size)\r
	70	);\r
	71	\r
	72	return EFI_SUCCESS;\r
	73	}\r
	74	\r
a00e2e55 DG	75	STATIC\r
	76	EFI_STATUS\r
	77	AcceptAllMemory (\r
	78	VOID\r
	79	)\r
	80	{\r
	81	EFI_GCD_MEMORY_SPACE_DESCRIPTOR *AllDescMap;\r
	82	UINTN NumEntries;\r
	83	UINTN Index;\r
	84	EFI_STATUS Status;\r
	85	\r
	86	DEBUG ((DEBUG_INFO, "Accepting all memory\n"));\r
	87	\r
	88	/*\r
	89	* Get a copy of the memory space map to iterate over while\r
	90	* changing the map.\r
	91	*/\r
	92	Status = gDS->GetMemorySpaceMap (&NumEntries, &AllDescMap);\r
	93	if (EFI_ERROR (Status)) {\r
	94	return Status;\r
	95	}\r
	96	\r
	97	for (Index = 0; Index < NumEntries; Index++) {\r
	98	CONST EFI_GCD_MEMORY_SPACE_DESCRIPTOR *Desc;\r
	99	\r
	100	Desc = &AllDescMap[Index];\r
	101	if (Desc->GcdMemoryType != EFI_GCD_MEMORY_TYPE_UNACCEPTED) {\r
	102	continue;\r
	103	}\r
	104	\r
	105	Status = AmdSevMemoryAccept (\r
	106	NULL,\r
	107	Desc->BaseAddress,\r
	108	Desc->Length\r
	109	);\r
	110	if (EFI_ERROR (Status)) {\r
	111	break;\r
	112	}\r
	113	\r
	114	Status = gDS->RemoveMemorySpace (Desc->BaseAddress, Desc->Length);\r
	115	if (EFI_ERROR (Status)) {\r
	116	break;\r
	117	}\r
	118	\r
	119	Status = gDS->AddMemorySpace (\r
	120	EfiGcdMemoryTypeSystemMemory,\r
	121	Desc->BaseAddress,\r
	122	Desc->Length,\r
f67ec877 DG	123	// Allocable system memory resource capabilities as masked\r
	124	// in MdeModulePkg/Core/Dxe/Mem/Page.c:PromoteMemoryResource\r
	125	Desc->Capabilities & ~(EFI_MEMORY_INTERNAL_MASK \| EFI_MEMORY_RUNTIME)\r
a00e2e55 DG	126	);\r
	127	if (EFI_ERROR (Status)) {\r
	128	break;\r
	129	}\r
	130	}\r
	131	\r
	132	gBS->FreePool (AllDescMap);\r
1b5420e8	133	gBS->CloseEvent (mAcceptAllMemoryEvent);\r
a00e2e55 DG	134	return Status;\r
	135	}\r
	136	\r
	137	VOID\r
	138	EFIAPI\r
	139	ResolveUnacceptedMemory (\r
	140	IN EFI_EVENT Event,\r
	141	IN VOID *Context\r
	142	)\r
	143	{\r
	144	EFI_STATUS Status;\r
	145	\r
	146	if (!mAcceptAllMemoryAtEBS) {\r
	147	return;\r
	148	}\r
	149	\r
	150	Status = AcceptAllMemory ();\r
	151	ASSERT_EFI_ERROR (Status);\r
	152	}\r
	153	\r
466d8f65 DG	154	STATIC\r
	155	EFI_STATUS\r
	156	EFIAPI\r
	157	AllowUnacceptedMemory (\r
	158	IN OVMF_SEV_MEMORY_ACCEPTANCE_PROTOCOL *This\r
	159	)\r
	160	{\r
	161	mAcceptAllMemoryAtEBS = FALSE;\r
	162	return EFI_SUCCESS;\r
	163	}\r
	164	\r
	165	STATIC\r
	166	OVMF_SEV_MEMORY_ACCEPTANCE_PROTOCOL\r
	167	mMemoryAcceptanceProtocol = { AllowUnacceptedMemory };\r
	168	\r
59aa48bb SW	169	STATIC EDKII_MEMORY_ACCEPT_PROTOCOL mMemoryAcceptProtocol = {\r
	170	AmdSevMemoryAccept\r
	171	};\r
	172	\r
24e4ad75 BS	173	EFI_STATUS\r
	174	EFIAPI\r
	175	AmdSevDxeEntryPoint (\r
ac0a286f MK	176	IN EFI_HANDLE ImageHandle,\r
ac0a286f MK	177	IN EFI_SYSTEM_TABLE *SystemTable\r
24e4ad75 BS	178	)\r
	179	{\r
	180	EFI_STATUS Status;\r
	181	EFI_GCD_MEMORY_SPACE_DESCRIPTOR *AllDescMap;\r
	182	UINTN NumEntries;\r
	183	UINTN Index;\r
	184	\r
	185	//\r
	186	// Do nothing when SEV is not enabled\r
	187	//\r
	188	if (!MemEncryptSevIsEnabled ()) {\r
	189	return EFI_UNSUPPORTED;\r
	190	}\r
	191	\r
	192	//\r
	193	// Iterate through the GCD map and clear the C-bit from MMIO and NonExistent\r
c16d4e35 LE	194	// memory space. The NonExistent memory space will be used for mapping the\r
c16d4e35 LE	195	// MMIO space added later (eg PciRootBridge). By clearing both known MMIO and\r
24e4ad75 BS	196	// NonExistent memory space can gurantee that current and furture MMIO adds\r
	197	// will have C-bit cleared.\r
	198	//\r
	199	Status = gDS->GetMemorySpaceMap (&NumEntries, &AllDescMap);\r
	200	if (!EFI_ERROR (Status)) {\r
	201	for (Index = 0; Index < NumEntries; Index++) {\r
ac0a286f	202	CONST EFI_GCD_MEMORY_SPACE_DESCRIPTOR *Desc;\r
24e4ad75 BS	203	\r
24e4ad75 BS	204	Desc = &AllDescMap[Index];\r
ac0a286f MK	205	if ((Desc->GcdMemoryType == EfiGcdMemoryTypeMemoryMappedIo) \|\|\r
	206	(Desc->GcdMemoryType == EfiGcdMemoryTypeNonExistent))\r
	207	{\r
c394fa4c	208	Status = MemEncryptSevClearMmioPageEncMask (\r
c16d4e35 LE	209	0,\r
c16d4e35 LE	210	Desc->BaseAddress,\r
c394fa4c	211	EFI_SIZE_TO_PAGES (Desc->Length)\r
c16d4e35	212	);\r
24e4ad75 BS	213	ASSERT_EFI_ERROR (Status);\r
	214	}\r
	215	}\r
	216	\r
	217	FreePool (AllDescMap);\r
	218	}\r
	219	\r
84cddd70 TL	220	//\r
	221	// If PCI Express is enabled, the MMCONFIG area has been reserved, rather\r
	222	// than marked as MMIO, and so the C-bit won't be cleared by the above walk\r
	223	// through the GCD map. Check for the MMCONFIG area and clear the C-bit for\r
	224	// the range.\r
	225	//\r
	226	if (PcdGet16 (PcdOvmfHostBridgePciDevId) == INTEL_Q35_MCH_DEVICE_ID) {\r
c394fa4c	227	Status = MemEncryptSevClearMmioPageEncMask (\r
84cddd70 TL	228	0,\r
84cddd70 TL	229	FixedPcdGet64 (PcdPciExpressBaseAddress),\r
c394fa4c	230	EFI_SIZE_TO_PAGES (SIZE_256MB)\r
84cddd70 TL	231	);\r
	232	\r
	233	ASSERT_EFI_ERROR (Status);\r
	234	}\r
	235	\r
5e2e5647 LE	236	//\r
	237	// When SMM is enabled, clear the C-bit from SMM Saved State Area\r
	238	//\r
	239	// NOTES: The SavedStateArea address cleared here is before SMBASE\r
	240	// relocation. Currently, we do not clear the SavedStateArea address after\r
	241	// SMBASE is relocated due to the following reasons:\r
	242	//\r
	243	// 1) Guest BIOS never access the relocated SavedStateArea.\r
	244	//\r
	245	// 2) The C-bit works on page-aligned address, but the SavedStateArea\r
	246	// address is not a page-aligned. Theoretically, we could roundup the address\r
	247	// and clear the C-bit of aligned address but looking carefully we found\r
	248	// that some portion of the page contains code -- which will causes a bigger\r
	249	// issues for SEV guest. When SEV is enabled, all the code must be encrypted\r
	250	// otherwise hardware will cause trap.\r
	251	//\r
	252	// We restore the C-bit for this SMM Saved State Area after SMBASE relocation\r
	253	// is completed (See OvmfPkg/Library/SmmCpuFeaturesLib/SmmCpuFeaturesLib.c).\r
	254	//\r
	255	if (FeaturePcdGet (PcdSmmSmramRequire)) {\r
ac0a286f MK	256	UINTN MapPagesBase;\r
ac0a286f MK	257	UINTN MapPagesCount;\r
5e2e5647 LE	258	\r
	259	Status = MemEncryptSevLocateInitialSmramSaveStateMapPages (\r
	260	&MapPagesBase,\r
	261	&MapPagesCount\r
	262	);\r
	263	ASSERT_EFI_ERROR (Status);\r
	264	\r
	265	//\r
	266	// Although these pages were set aside (i.e., allocated) by PlatformPei, we\r
	267	// could be after a warm reboot from the OS. Don't leak any stale OS data\r
	268	// to the hypervisor.\r
	269	//\r
	270	ZeroMem ((VOID *)MapPagesBase, EFI_PAGES_TO_SIZE (MapPagesCount));\r
	271	\r
	272	Status = MemEncryptSevClearPageEncMask (\r
	273	0, // Cr3BaseAddress -- use current CR3\r
	274	MapPagesBase, // BaseAddress\r
adfa3327	275	MapPagesCount // NumPages\r
5e2e5647 LE	276	);\r
5e2e5647 LE	277	if (EFI_ERROR (Status)) {\r
ac0a286f MK	278	DEBUG ((\r
	279	DEBUG_ERROR,\r
	280	"%a: MemEncryptSevClearPageEncMask(): %r\n",\r
	281	__FUNCTION__,\r
	282	Status\r
	283	));\r
5e2e5647 LE	284	ASSERT (FALSE);\r
	285	CpuDeadLoop ();\r
	286	}\r
	287	}\r
	288	\r
67484aed	289	if (MemEncryptSevSnpIsEnabled ()) {\r
59aa48bb SW	290	//\r
	291	// Memory acceptance began being required in SEV-SNP, so install the\r
	292	// memory accept protocol implementation for a SEV-SNP active guest.\r
	293	//\r
466d8f65	294	Status = gBS->InstallMultipleProtocolInterfaces (\r
59aa48bb SW	295	&mAmdSevDxeHandle,\r
59aa48bb SW	296	&gEdkiiMemoryAcceptProtocolGuid,\r
466d8f65 DG	297	&mMemoryAcceptProtocol,\r
	298	&gOvmfSevMemoryAcceptanceProtocolGuid,\r
	299	&mMemoryAcceptanceProtocol,\r
	300	NULL\r
59aa48bb SW	301	);\r
	302	ASSERT_EFI_ERROR (Status);\r
	303	\r
a00e2e55 DG	304	// SEV-SNP support does not automatically imply unaccepted memory support,\r
	305	// so make ExitBootServices accept all unaccepted memory if support is\r
	306	// not communicated.\r
	307	Status = gBS->CreateEventEx (\r
	308	EVT_NOTIFY_SIGNAL,\r
	309	TPL_CALLBACK,\r
	310	ResolveUnacceptedMemory,\r
	311	NULL,\r
	312	&gEfiEventBeforeExitBootServicesGuid,\r
	313	&mAcceptAllMemoryEvent\r
	314	);\r
	315	\r
	316	if (EFI_ERROR (Status)) {\r
	317	DEBUG ((DEBUG_ERROR, "AllowUnacceptedMemory event creation for EventBeforeExitBootServices failed.\n"));\r
	318	}\r
	319	\r
59aa48bb SW	320	//\r
	321	// If its SEV-SNP active guest then install the CONFIDENTIAL_COMPUTING_SEV_SNP_BLOB.\r
	322	// It contains the location for both the Secrets and CPUID page.\r
	323	//\r
67484aed BS	324	return gBS->InstallConfigurationTable (\r
	325	&gConfidentialComputingSevSnpBlobGuid,\r
	326	&mSnpBootDxeTable\r
	327	);\r
	328	}\r
	329	\r
24e4ad75 BS	330	return EFI_SUCCESS;\r
24e4ad75 BS	331	}\r