projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 57bcfc3b MX |
1 | /** @file\r |
| 2 | PlatformInitLib header file.\r | |
| 3 | \r | |
| 4 | Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>\r | |
| 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r | |
| 6 | \r | |
| 7 | **/\r | |
| 8 | \r | |
| 9 | #ifndef PLATFORM_INIT_LIB_H_\r | |
| 10 | #define PLATFORM_INIT_LIB_H_\r | |
| 11 | \r | |
| 12 | #include <PiPei.h>\r | |
| 13 | \r | |
| 14 | #pragma pack(1)\r | |
| 15 | typedef struct {\r | |
| 16 | EFI_HOB_GUID_TYPE GuidHeader;\r | |
| 17 | UINT16 HostBridgeDevId;\r | |
| 18 | \r | |
| 19 | UINT64 PcdConfidentialComputingGuestAttr;\r | |
| 20 | BOOLEAN SevEsIsEnabled;\r | |
| 21 | \r | |
| 22 | UINT32 BootMode;\r | |
| 23 | BOOLEAN S3Supported;\r | |
| 24 | \r | |
| 25 | BOOLEAN SmmSmramRequire;\r | |
| 26 | BOOLEAN Q35SmramAtDefaultSmbase;\r | |
| 27 | UINT16 Q35TsegMbytes;\r | |
| 28 | \r | |
| 29 | UINT64 FirstNonAddress;\r | |
| 30 | UINT8 PhysMemAddressWidth;\r | |
| 31 | UINT32 Uc32Base;\r | |
| 32 | UINT32 Uc32Size;\r | |
| 33 | \r | |
| 34 | BOOLEAN PcdSetNxForStack;\r | |
| 35 | UINT64 PcdTdxSharedBitMask;\r | |
| 36 | \r | |
| 37 | UINT64 PcdPciMmio64Base;\r | |
| 38 | UINT64 PcdPciMmio64Size;\r | |
| 39 | UINT32 PcdPciMmio32Base;\r | |
| 40 | UINT32 PcdPciMmio32Size;\r | |
| 41 | UINT64 PcdPciIoBase;\r | |
| 42 | UINT64 PcdPciIoSize;\r | |
| 43 | \r | |
| 44 | UINT64 PcdEmuVariableNvStoreReserved;\r | |
| 45 | UINT32 PcdCpuBootLogicalProcessorNumber;\r | |
| 46 | UINT32 PcdCpuMaxLogicalProcessorNumber;\r | |
| 47 | UINT32 DefaultMaxCpuNumber;\r | |
| 48 | \r | |
| 49 | UINT32 S3AcpiReservedMemoryBase;\r | |
| 50 | UINT32 S3AcpiReservedMemorySize;\r | |
| 51 | } EFI_HOB_PLATFORM_INFO;\r | |
| 52 | #pragma pack()\r | |
| 53 | \r | |
| 54 | /**\r | |
| 55 | Reads 8-bits of CMOS data.\r | |
| 56 | \r | |
| 57 | Reads the 8-bits of CMOS data at the location specified by Index.\r | |
| 58 | The 8-bit read value is returned.\r | |
| 59 | \r | |
| 60 | @param Index The CMOS location to read.\r | |
| 61 | \r | |
| 62 | @return The value read.\r | |
| 63 | \r | |
| 64 | **/\r | |
| 65 | UINT8\r | |
| 66 | EFIAPI\r | |
| 67 | PlatformCmosRead8 (\r | |
| 68 | IN UINTN Index\r | |
| 69 | );\r | |
| 70 | \r | |
| 71 | /**\r | |
| 72 | Writes 8-bits of CMOS data.\r | |
| 73 | \r | |
| 74 | Writes 8-bits of CMOS data to the location specified by Index\r | |
| 75 | with the value specified by Value and returns Value.\r | |
| 76 | \r | |
| 77 | @param Index The CMOS location to write.\r | |
| 78 | @param Value The value to write to CMOS.\r | |
| 79 | \r | |
| 80 | @return The value written to CMOS.\r | |
| 81 | \r | |
| 82 | **/\r | |
| 83 | UINT8\r | |
| 84 | EFIAPI\r | |
| 85 | PlatformCmosWrite8 (\r | |
| 86 | IN UINTN Index,\r | |
| 87 | IN UINT8 Value\r | |
| 88 | );\r | |
| 89 | \r | |
| 90 | /**\r | |
| 91 | Dump the CMOS content\r | |
| 92 | */\r | |
| 93 | VOID\r | |
| 94 | EFIAPI\r | |
| 95 | PlatformDebugDumpCmos (\r | |
| 96 | VOID\r | |
| 97 | );\r | |
| 98 | \r | |
| 102cafed MX |
99 | VOID\r |
| 100 | EFIAPI\r | |
| 101 | PlatformAddIoMemoryBaseSizeHob (\r | |
| 102 | IN EFI_PHYSICAL_ADDRESS MemoryBase,\r | |
| 103 | IN UINT64 MemorySize\r | |
| 104 | );\r | |
| 105 | \r | |
| 106 | VOID\r | |
| 107 | EFIAPI\r | |
| 108 | PlatformAddIoMemoryRangeHob (\r | |
| 109 | IN EFI_PHYSICAL_ADDRESS MemoryBase,\r | |
| 110 | IN EFI_PHYSICAL_ADDRESS MemoryLimit\r | |
| 111 | );\r | |
| 112 | \r | |
| 113 | VOID\r | |
| 114 | EFIAPI\r | |
| 115 | PlatformAddMemoryBaseSizeHob (\r | |
| 116 | IN EFI_PHYSICAL_ADDRESS MemoryBase,\r | |
| 117 | IN UINT64 MemorySize\r | |
| 118 | );\r | |
| 119 | \r | |
| 120 | VOID\r | |
| 121 | EFIAPI\r | |
| 122 | PlatformAddMemoryRangeHob (\r | |
| 123 | IN EFI_PHYSICAL_ADDRESS MemoryBase,\r | |
| 124 | IN EFI_PHYSICAL_ADDRESS MemoryLimit\r | |
| 125 | );\r | |
| 126 | \r | |
| 127 | VOID\r | |
| 128 | EFIAPI\r | |
| 129 | PlatformAddReservedMemoryBaseSizeHob (\r | |
| 130 | IN EFI_PHYSICAL_ADDRESS MemoryBase,\r | |
| 131 | IN UINT64 MemorySize,\r | |
| 132 | IN BOOLEAN Cacheable\r | |
| 133 | );\r | |
| 134 | \r | |
| 57bcfc3b | 135 | #endif // PLATFORM_INIT_LIB_H_\r |