OvmfPkg: Update PlatformInitLib for Tdx guest

[mirror_edk2.git] / OvmfPkg / Include / Library / PlatformInitLib.h

/** @file\r
  PlatformInitLib header file.\r
\r
  Copyright (c) 2021, Intel Corporation. All rights reserved.<BR>\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#ifndef PLATFORM_INIT_LIB_H_\r
#define PLATFORM_INIT_LIB_H_\r
\r
#include <PiPei.h>\r
\r
#pragma pack(1)\r
typedef struct {\r
  EFI_HOB_GUID_TYPE    GuidHeader;\r
  UINT16               HostBridgeDevId;\r
\r
  UINT64               PcdConfidentialComputingGuestAttr;\r
  BOOLEAN              SevEsIsEnabled;\r
\r
  UINT32               BootMode;\r
  BOOLEAN              S3Supported;\r
\r
  BOOLEAN              SmmSmramRequire;\r
  BOOLEAN              Q35SmramAtDefaultSmbase;\r
  UINT16               Q35TsegMbytes;\r
\r
  UINT64               FirstNonAddress;\r
  UINT8                PhysMemAddressWidth;\r
  UINT32               Uc32Base;\r
  UINT32               Uc32Size;\r
\r
  BOOLEAN              PcdSetNxForStack;\r
  UINT64               PcdTdxSharedBitMask;\r
\r
  UINT64               PcdPciMmio64Base;\r
  UINT64               PcdPciMmio64Size;\r
  UINT32               PcdPciMmio32Base;\r
  UINT32               PcdPciMmio32Size;\r
  UINT64               PcdPciIoBase;\r
  UINT64               PcdPciIoSize;\r
\r
  UINT64               PcdEmuVariableNvStoreReserved;\r
  UINT32               PcdCpuBootLogicalProcessorNumber;\r
  UINT32               PcdCpuMaxLogicalProcessorNumber;\r
  UINT32               DefaultMaxCpuNumber;\r
\r
  UINT32               S3AcpiReservedMemoryBase;\r
  UINT32               S3AcpiReservedMemorySize;\r
} EFI_HOB_PLATFORM_INFO;\r
#pragma pack()\r
\r
/**\r
  Reads 8-bits of CMOS data.\r
\r
  Reads the 8-bits of CMOS data at the location specified by Index.\r
  The 8-bit read value is returned.\r
\r
  @param  Index  The CMOS location to read.\r
\r
  @return The value read.\r
\r
**/\r
UINT8\r
EFIAPI\r
PlatformCmosRead8 (\r
  IN      UINTN  Index\r
  );\r
\r
/**\r
  Writes 8-bits of CMOS data.\r
\r
  Writes 8-bits of CMOS data to the location specified by Index\r
  with the value specified by Value and returns Value.\r
\r
  @param  Index  The CMOS location to write.\r
  @param  Value  The value to write to CMOS.\r
\r
  @return The value written to CMOS.\r
\r
**/\r
UINT8\r
EFIAPI\r
PlatformCmosWrite8 (\r
  IN      UINTN  Index,\r
  IN      UINT8  Value\r
  );\r
\r
/**\r
   Dump the CMOS content\r
 */\r
VOID\r
EFIAPI\r
PlatformDebugDumpCmos (\r
  VOID\r
  );\r
\r
VOID\r
EFIAPI\r
PlatformAddIoMemoryBaseSizeHob (\r
  IN EFI_PHYSICAL_ADDRESS  MemoryBase,\r
  IN UINT64                MemorySize\r
  );\r
\r
VOID\r
EFIAPI\r
PlatformAddIoMemoryRangeHob (\r
  IN EFI_PHYSICAL_ADDRESS  MemoryBase,\r
  IN EFI_PHYSICAL_ADDRESS  MemoryLimit\r
  );\r
\r
VOID\r
EFIAPI\r
PlatformAddMemoryBaseSizeHob (\r
  IN EFI_PHYSICAL_ADDRESS  MemoryBase,\r
  IN UINT64                MemorySize\r
  );\r
\r
VOID\r
EFIAPI\r
PlatformAddMemoryRangeHob (\r
  IN EFI_PHYSICAL_ADDRESS  MemoryBase,\r
  IN EFI_PHYSICAL_ADDRESS  MemoryLimit\r
  );\r
\r
VOID\r
EFIAPI\r
PlatformAddReservedMemoryBaseSizeHob (\r
  IN EFI_PHYSICAL_ADDRESS  MemoryBase,\r
  IN UINT64                MemorySize,\r
  IN BOOLEAN               Cacheable\r
  );\r
\r
VOID\r
EFIAPI\r
PlatformQemuUc32BaseInitialization (\r
  IN OUT EFI_HOB_PLATFORM_INFO  *PlatformInfoHob\r
  );\r
\r
UINT32\r
EFIAPI\r
PlatformGetSystemMemorySizeBelow4gb (\r
  IN EFI_HOB_PLATFORM_INFO  *PlatformInfoHob\r
  );\r
\r
/**\r
  Initialize the PhysMemAddressWidth field in PlatformInfoHob based on guest RAM size.\r
**/\r
VOID\r
EFIAPI\r
PlatformAddressWidthInitialization (\r
  IN OUT EFI_HOB_PLATFORM_INFO  *PlatformInfoHob\r
  );\r
\r
/**\r
  Peform Memory Detection for QEMU / KVM\r
\r
**/\r
VOID\r
EFIAPI\r
PlatformQemuInitializeRam (\r
  IN EFI_HOB_PLATFORM_INFO  *PlatformInfoHob\r
  );\r
\r
VOID\r
EFIAPI\r
PlatformQemuInitializeRamForS3 (\r
  IN EFI_HOB_PLATFORM_INFO  *PlatformInfoHob\r
  );\r
\r
VOID\r
EFIAPI\r
PlatformMemMapInitialization (\r
  IN OUT EFI_HOB_PLATFORM_INFO  *PlatformInfoHob\r
  );\r
\r
/**\r
 * Fetch "opt/ovmf/PcdSetNxForStack" from QEMU\r
 *\r
 * @param Setting     The pointer to the setting of "/opt/ovmf/PcdSetNxForStack".\r
 * @return EFI_SUCCESS  Successfully fetch the settings.\r
 */\r
EFI_STATUS\r
EFIAPI\r
PlatformNoexecDxeInitialization (\r
  IN OUT EFI_HOB_PLATFORM_INFO  *PlatformInfoHob\r
  );\r
\r
VOID\r
EFIAPI\r
PlatformMiscInitialization (\r
  IN EFI_HOB_PLATFORM_INFO  *PlatformInfoHob\r
  );\r
\r
/**\r
  Fetch the boot CPU count and the possible CPU count from QEMU, and expose\r
  them to UefiCpuPkg modules.\r
**/\r
VOID\r
EFIAPI\r
PlatformMaxCpuCountInitialization (\r
  IN OUT EFI_HOB_PLATFORM_INFO  *PlatformInfoHob\r
  );\r
\r
/**\r
  In Tdx guest, some information need to be passed from host VMM to guest\r
  firmware. For example, the memory resource, etc. These information are\r
  prepared by host VMM and put in HobList which is described in TdxMetadata.\r
\r
  Information in HobList is treated as external input. From the security\r
  perspective before it is consumed, it should be validated.\r
\r
  @retval   EFI_SUCCESS   Successfully process the hoblist\r
  @retval   Others        Other error as indicated\r
**/\r
EFI_STATUS\r
EFIAPI\r
ProcessTdxHobList (\r
  VOID\r
  );\r
\r
/**\r
  In Tdx guest, the system memory is passed in TdHob by host VMM. So\r
  the major task of PlatformTdxPublishRamRegions is to walk thru the\r
  TdHob list and transfer the ResourceDescriptorHob and MemoryAllocationHob\r
  to the hobs in DXE phase.\r
\r
  MemoryAllocationHob should also be created for Mailbox and Ovmf work area.\r
**/\r
VOID\r
EFIAPI\r
PlatformTdxPublishRamRegions (\r
  VOID\r
  );\r
\r
#endif // PLATFORM_INIT_LIB_H_\r