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1 | /** @file\r |
2 | OVMF Platform definitions\r | |
3 | \r | |
cb2e3007 | 4 | Copyright (C) 2015, Red Hat, Inc.\r |
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5 | Copyright (c) 2014, Gabriel L. Somlo <somlo@cmu.edu>\r |
6 | \r | |
b26f0cf9 | 7 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
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8 | **/\r |
9 | \r | |
10 | #ifndef __OVMF_PLATFORMS_H__\r | |
11 | #define __OVMF_PLATFORMS_H__\r | |
12 | \r | |
13 | #include <Library/PciLib.h>\r | |
14 | #include <IndustryStandard/Pci22.h>\r | |
cb2e3007 LE |
15 | #include <IndustryStandard/Q35MchIch9.h>\r |
16 | #include <IndustryStandard/I440FxPiix4.h>\r | |
91dee771 | 17 | #include <IndustryStandard/Bhyve.h>\r |
1d3e89f3 | 18 | #include <IndustryStandard/Microvm.h>\r |
9afcd48a | 19 | #include <IndustryStandard/CloudHv.h>\r |
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20 | \r |
21 | //\r | |
22 | // OVMF Host Bridge DID Address\r | |
23 | //\r | |
24 | #define OVMF_HOSTBRIDGE_DID \\r | |
25 | PCI_LIB_ADDRESS (0, 0, 0, PCI_DEVICE_ID_OFFSET)\r | |
26 | \r | |
b2f4da39 LE |
27 | //\r |
28 | // Values we program into the PM base address registers\r | |
29 | //\r | |
ac0a286f MK |
30 | #define PIIX4_PMBA_VALUE 0xB000\r |
31 | #define ICH9_PMBASE_VALUE 0x0600\r | |
b2f4da39 | 32 | \r |
cc5e0aa9 LE |
33 | //\r |
34 | // Common bits in same-purpose registers\r | |
35 | //\r | |
ac0a286f | 36 | #define PMBA_RTE BIT0\r |
cc5e0aa9 LE |
37 | \r |
38 | //\r | |
39 | // Common IO ports relative to the Power Management Base Address\r | |
40 | //\r | |
ac0a286f | 41 | #define ACPI_TIMER_OFFSET 0x8\r |
cc5e0aa9 | 42 | \r |
4e48c72c | 43 | #endif\r |