[mirror_edk2.git] / OvmfPkg / Library / PciHostBridgeLib / PciHostBridgeLib.c

/** @file\r
  OVMF's instance of the PCI Host Bridge Library.\r
\r
  Copyright (C) 2016, Red Hat, Inc.\r
  Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
\r
  This program and the accompanying materials are licensed and made available\r
  under the terms and conditions of the BSD License which accompanies this\r
  distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php.\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT\r
  WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
#include <PiDxe.h>\r
\r
#include <IndustryStandard/Pci.h>\r
#include <IndustryStandard/Q35MchIch9.h>\r
\r
#include <Protocol/PciHostBridgeResourceAllocation.h>\r
#include <Protocol/PciRootBridgeIo.h>\r
\r
#include <Library/BaseMemoryLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/DevicePathLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
#include <Library/PciHostBridgeLib.h>\r
#include <Library/PciLib.h>\r
#include <Library/QemuFwCfgLib.h>\r
\r
\r
#pragma pack(1)\r
typedef struct {\r
  ACPI_HID_DEVICE_PATH     AcpiDevicePath;\r
  EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
} OVMF_PCI_ROOT_BRIDGE_DEVICE_PATH;\r
#pragma pack ()\r
\r
\r
GLOBAL_REMOVE_IF_UNREFERENCED\r
CHAR16 *mPciHostBridgeLibAcpiAddressSpaceTypeStr[] = {\r
  L"Mem", L"I/O", L"Bus"\r
};\r
\r
\r
STATIC\r
CONST\r
OVMF_PCI_ROOT_BRIDGE_DEVICE_PATH mRootBridgeDevicePathTemplate = {\r
  {\r
    {\r
      ACPI_DEVICE_PATH,\r
      ACPI_DP,\r
      {\r
        (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),\r
        (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)\r
      }\r
    },\r
    EISA_PNP_ID(0x0A03), // HID\r
    0                    // UID\r
  },\r
\r
  {\r
    END_DEVICE_PATH_TYPE,\r
    END_ENTIRE_DEVICE_PATH_SUBTYPE,\r
    {\r
      END_DEVICE_PATH_LENGTH,\r
      0\r
    }\r
  }\r
};\r
\r
\r
/**\r
  Initialize a PCI_ROOT_BRIDGE structure.\r
\r
  param[in]  RootBusNumber     The bus number to store in RootBus.\r
\r
  param[in]  MaxSubBusNumber   The inclusive maximum bus number that can be\r
                               assigned to any subordinate bus found behind any\r
                               PCI bridge hanging off this root bus.\r
\r
                               The caller is repsonsible for ensuring that\r
                               RootBusNumber <= MaxSubBusNumber. If\r
                               RootBusNumber equals MaxSubBusNumber, then the\r
                               root bus has no room for subordinate buses.\r
\r
  param[out] RootBus           The PCI_ROOT_BRIDGE structure (allocated by the\r
                               caller) that should be filled in by this\r
                               function.\r
\r
  @retval EFI_SUCCESS           Initialization successful. A device path\r
                                consisting of an ACPI device path node, with\r
                                UID = RootBusNumber, has been allocated and\r
                                linked into RootBus.\r
\r
  @retval EFI_OUT_OF_RESOURCES  Memory allocation failed.\r
**/\r
STATIC\r
EFI_STATUS\r
InitRootBridge (\r
  IN  UINT8           RootBusNumber,\r
  IN  UINT8           MaxSubBusNumber,\r
  OUT PCI_ROOT_BRIDGE *RootBus\r
  )\r
{\r
  OVMF_PCI_ROOT_BRIDGE_DEVICE_PATH *DevicePath;\r
\r
  //\r
  // Be safe if other fields are added to PCI_ROOT_BRIDGE later.\r
  //\r
  ZeroMem (RootBus, sizeof *RootBus);\r
\r
  RootBus->Segment = 0;\r
\r
  RootBus->Supports   = EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO |\r
                        EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO |\r
                        EFI_PCI_ATTRIBUTE_ISA_IO_16 |\r
                        EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO |\r
                        EFI_PCI_ATTRIBUTE_VGA_MEMORY |\r
                        EFI_PCI_ATTRIBUTE_VGA_IO_16  |\r
                        EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;\r
  RootBus->Attributes = RootBus->Supports;\r
\r
  RootBus->DmaAbove4G = FALSE;\r
\r
  RootBus->AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;\r
  RootBus->PMem.Base            = 0;\r
  RootBus->PMem.Limit           = 0;\r
  RootBus->PMemAbove4G.Base     = 0;\r
  RootBus->PMemAbove4G.Limit    = 0;\r
  RootBus->MemAbove4G.Base      = 0;\r
  RootBus->MemAbove4G.Limit     = 0;\r
\r
  RootBus->Bus.Base  = RootBusNumber;\r
  RootBus->Bus.Limit = MaxSubBusNumber;\r
  RootBus->Io.Base   = PcdGet64 (PcdPciIoBase);\r
  RootBus->Io.Limit  = PcdGet64 (PcdPciIoBase) + (PcdGet64 (PcdPciIoSize) - 1);\r
  RootBus->Mem.Base  = PcdGet64 (PcdPciMmio32Base);\r
  RootBus->Mem.Limit = PcdGet64 (PcdPciMmio32Base) +\r
                       (PcdGet64 (PcdPciMmio32Size) - 1);\r
\r
  RootBus->NoExtendedConfigSpace = (PcdGet16 (PcdOvmfHostBridgePciDevId) !=\r
                                    INTEL_Q35_MCH_DEVICE_ID);\r
\r
  DevicePath = AllocateCopyPool (sizeof mRootBridgeDevicePathTemplate,\r
                 &mRootBridgeDevicePathTemplate);\r
  if (DevicePath == NULL) {\r
    DEBUG ((EFI_D_ERROR, "%a: %r\n", __FUNCTION__, EFI_OUT_OF_RESOURCES));\r
    return EFI_OUT_OF_RESOURCES;\r
  }\r
  DevicePath->AcpiDevicePath.UID = RootBusNumber;\r
  RootBus->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)DevicePath;\r
\r
  DEBUG ((EFI_D_INFO,\r
    "%a: populated root bus %d, with room for %d subordinate bus(es)\n",\r
    __FUNCTION__, RootBusNumber, MaxSubBusNumber - RootBusNumber));\r
  return EFI_SUCCESS;\r
}\r
\r
\r
/**\r
  Uninitialize a PCI_ROOT_BRIDGE structure set up with InitRootBridge().\r
\r
  param[in] RootBus  The PCI_ROOT_BRIDGE structure, allocated by the caller and\r
                     initialized with InitRootBridge(), that should be\r
                     uninitialized. This function doesn't free RootBus.\r
**/\r
STATIC\r
VOID\r
UninitRootBridge (\r
  IN PCI_ROOT_BRIDGE *RootBus\r
  )\r
{\r
  FreePool (RootBus->DevicePath);\r
}\r
\r
\r
/**\r
  Return all the root bridge instances in an array.\r
\r
  @param Count  Return the count of root bridge instances.\r
\r
  @return All the root bridge instances in an array.\r
          The array should be passed into PciHostBridgeFreeRootBridges()\r
          when it's not used.\r
**/\r
PCI_ROOT_BRIDGE *\r
EFIAPI\r
PciHostBridgeGetRootBridges (\r
  UINTN *Count\r
  )\r
{\r
  EFI_STATUS           Status;\r
  FIRMWARE_CONFIG_ITEM FwCfgItem;\r
  UINTN                FwCfgSize;\r
  UINT64               ExtraRootBridges;\r
  PCI_ROOT_BRIDGE      *Bridges;\r
  UINTN                Initialized;\r
  UINTN                LastRootBridgeNumber;\r
  UINTN                RootBridgeNumber;\r
\r
  *Count = 0;\r
\r
  //\r
  // QEMU provides the number of extra root buses, shortening the exhaustive\r
  // search below. If there is no hint, the feature is missing.\r
  //\r
  Status = QemuFwCfgFindFile ("etc/extra-pci-roots", &FwCfgItem, &FwCfgSize);\r
  if (EFI_ERROR (Status) || FwCfgSize != sizeof ExtraRootBridges) {\r
    ExtraRootBridges = 0;\r
  } else {\r
    QemuFwCfgSelectItem (FwCfgItem);\r
    QemuFwCfgReadBytes (FwCfgSize, &ExtraRootBridges);\r
\r
    if (ExtraRootBridges > PCI_MAX_BUS) {\r
      DEBUG ((EFI_D_ERROR, "%a: invalid count of extra root buses (%Lu) "\r
        "reported by QEMU\n", __FUNCTION__, ExtraRootBridges));\r
      return NULL;\r
    }\r
    DEBUG ((EFI_D_INFO, "%a: %Lu extra root buses reported by QEMU\n",\r
      __FUNCTION__, ExtraRootBridges));\r
  }\r
\r
  //\r
  // Allocate the "main" root bridge, and any extra root bridges.\r
  //\r
  Bridges = AllocatePool ((1 + (UINTN)ExtraRootBridges) * sizeof *Bridges);\r
  if (Bridges == NULL) {\r
    DEBUG ((EFI_D_ERROR, "%a: %r\n", __FUNCTION__, EFI_OUT_OF_RESOURCES));\r
    return NULL;\r
  }\r
  Initialized = 0;\r
\r
  //\r
  // The "main" root bus is always there.\r
  //\r
  LastRootBridgeNumber = 0;\r
\r
  //\r
  // Scan all other root buses. If function 0 of any device on a bus returns a\r
  // VendorId register value different from all-bits-one, then that bus is\r
  // alive.\r
  //\r
  for (RootBridgeNumber = 1;\r
       RootBridgeNumber <= PCI_MAX_BUS && Initialized < ExtraRootBridges;\r
       ++RootBridgeNumber) {\r
    UINTN Device;\r
\r
    for (Device = 0; Device <= PCI_MAX_DEVICE; ++Device) {\r
      if (PciRead16 (PCI_LIB_ADDRESS (RootBridgeNumber, Device, 0,\r
                       PCI_VENDOR_ID_OFFSET)) != MAX_UINT16) {\r
        break;\r
      }\r
    }\r
    if (Device <= PCI_MAX_DEVICE) {\r
      //\r
      // Found the next root bus. We can now install the *previous* one,\r
      // because now we know how big a bus number range *that* one has, for any\r
      // subordinate buses that might exist behind PCI bridges hanging off it.\r
      //\r
      Status = InitRootBridge ((UINT8)LastRootBridgeNumber,\r
                 (UINT8)(RootBridgeNumber - 1), &Bridges[Initialized]);\r
      if (EFI_ERROR (Status)) {\r
        goto FreeBridges;\r
      }\r
      ++Initialized;\r
      LastRootBridgeNumber = RootBridgeNumber;\r
    }\r
  }\r
\r
  //\r
  // Install the last root bus (which might be the only, ie. main, root bus, if\r
  // we've found no extra root buses).\r
  //\r
  Status = InitRootBridge ((UINT8)LastRootBridgeNumber, PCI_MAX_BUS,\r
             &Bridges[Initialized]);\r
  if (EFI_ERROR (Status)) {\r
    goto FreeBridges;\r
  }\r
  ++Initialized;\r
\r
  *Count = Initialized;\r
  return Bridges;\r
\r
FreeBridges:\r
  while (Initialized > 0) {\r
    --Initialized;\r
    UninitRootBridge (&Bridges[Initialized]);\r
  }\r
\r
  FreePool (Bridges);\r
  return NULL;\r
}\r
\r
\r
/**\r
  Free the root bridge instances array returned from\r
  PciHostBridgeGetRootBridges().\r
\r
  @param  The root bridge instances array.\r
  @param  The count of the array.\r
**/\r
VOID\r
EFIAPI\r
PciHostBridgeFreeRootBridges (\r
  PCI_ROOT_BRIDGE *Bridges,\r
  UINTN           Count\r
  )\r
{\r
  if (Bridges == NULL && Count == 0) {\r
    return;\r
  }\r
  ASSERT (Bridges != NULL && Count > 0);\r
\r
  do {\r
    --Count;\r
    UninitRootBridge (&Bridges[Count]);\r
  } while (Count > 0);\r
\r
  FreePool (Bridges);\r
}\r
\r
\r
/**\r
  Inform the platform that the resource conflict happens.\r
\r
  @param HostBridgeHandle Handle of the Host Bridge.\r
  @param Configuration    Pointer to PCI I/O and PCI memory resource\r
                          descriptors. The Configuration contains the resources\r
                          for all the root bridges. The resource for each root\r
                          bridge is terminated with END descriptor and an\r
                          additional END is appended indicating the end of the\r
                          entire resources. The resource descriptor field\r
                          values follow the description in\r
                          EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
                          .SubmitResources().\r
**/\r
VOID\r
EFIAPI\r
PciHostBridgeResourceConflict (\r
  EFI_HANDLE                        HostBridgeHandle,\r
  VOID                              *Configuration\r
  )\r
{\r
  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;\r
  UINTN                             RootBridgeIndex;\r
  DEBUG ((EFI_D_ERROR, "PciHostBridge: Resource conflict happens!\n"));\r
\r
  RootBridgeIndex = 0;\r
  Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration;\r
  while (Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) {\r
    DEBUG ((EFI_D_ERROR, "RootBridge[%d]:\n", RootBridgeIndex++));\r
    for (; Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR; Descriptor++) {\r
      ASSERT (Descriptor->ResType <\r
              (sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr) /\r
               sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr[0])\r
               )\r
              );\r
      DEBUG ((EFI_D_ERROR, " %s: Length/Alignment = 0x%lx / 0x%lx\n",\r
              mPciHostBridgeLibAcpiAddressSpaceTypeStr[Descriptor->ResType],\r
              Descriptor->AddrLen, Descriptor->AddrRangeMax\r
              ));\r
      if (Descriptor->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) {\r
        DEBUG ((EFI_D_ERROR, "     Granularity/SpecificFlag = %ld / %02x%s\n",\r
                Descriptor->AddrSpaceGranularity, Descriptor->SpecificFlag,\r
                ((Descriptor->SpecificFlag &\r
                  EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE\r
                  ) != 0) ? L" (Prefetchable)" : L""\r
                ));\r
      }\r
    }\r
    //\r
    // Skip the END descriptor for root bridge\r
    //\r
    ASSERT (Descriptor->Desc == ACPI_END_TAG_DESCRIPTOR);\r
    Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)(\r
                   (EFI_ACPI_END_TAG_DESCRIPTOR *)Descriptor + 1\r
                   );\r
  }\r
}\r
Commit	Line	Data
d85861d7 LE	1	/** @file\r
	2	OVMF's instance of the PCI Host Bridge Library.\r
	3	\r
	4	Copyright (C) 2016, Red Hat, Inc.\r
	5	Copyright (c) 2016, Intel Corporation. All rights reserved.<BR>\r
	6	\r
	7	This program and the accompanying materials are licensed and made available\r
	8	under the terms and conditions of the BSD License which accompanies this\r
	9	distribution. The full text of the license may be found at\r
	10	http://opensource.org/licenses/bsd-license.php.\r
	11	\r
	12	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, WITHOUT\r
	13	WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	14	\r
	15	**/\r
	16	#include <PiDxe.h>\r
46e46eaf LE	17	\r
46e46eaf LE	18	#include <IndustryStandard/Pci.h>\r
7daf2401	19	#include <IndustryStandard/Q35MchIch9.h>\r
46e46eaf	20	\r
0dcd1b1b	21	#include <Protocol/PciHostBridgeResourceAllocation.h>\r
a5ece62d LE	22	#include <Protocol/PciRootBridgeIo.h>\r
a5ece62d LE	23	\r
65de2ef5	24	#include <Library/BaseMemoryLib.h>\r
d85861d7	25	#include <Library/DebugLib.h>\r
1f4e2299	26	#include <Library/DevicePathLib.h>\r
46e46eaf LE	27	#include <Library/MemoryAllocationLib.h>\r
	28	#include <Library/PciHostBridgeLib.h>\r
	29	#include <Library/PciLib.h>\r
	30	#include <Library/QemuFwCfgLib.h>\r
	31	\r
d85861d7	32	\r
1f4e2299 LE	33	#pragma pack(1)\r
	34	typedef struct {\r
	35	ACPI_HID_DEVICE_PATH AcpiDevicePath;\r
	36	EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
	37	} OVMF_PCI_ROOT_BRIDGE_DEVICE_PATH;\r
	38	#pragma pack ()\r
	39	\r
	40	\r
d85861d7 LE	41	GLOBAL_REMOVE_IF_UNREFERENCED\r
	42	CHAR16 *mPciHostBridgeLibAcpiAddressSpaceTypeStr[] = {\r
	43	L"Mem", L"I/O", L"Bus"\r
	44	};\r
	45	\r
46e46eaf	46	\r
1f4e2299 LE	47	STATIC\r
	48	CONST\r
	49	OVMF_PCI_ROOT_BRIDGE_DEVICE_PATH mRootBridgeDevicePathTemplate = {\r
	50	{\r
	51	{\r
	52	ACPI_DEVICE_PATH,\r
	53	ACPI_DP,\r
	54	{\r
	55	(UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),\r
	56	(UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8)\r
	57	}\r
	58	},\r
	59	EISA_PNP_ID(0x0A03), // HID\r
	60	0 // UID\r
	61	},\r
	62	\r
	63	{\r
	64	END_DEVICE_PATH_TYPE,\r
	65	END_ENTIRE_DEVICE_PATH_SUBTYPE,\r
	66	{\r
	67	END_DEVICE_PATH_LENGTH,\r
	68	0\r
	69	}\r
	70	}\r
	71	};\r
	72	\r
	73	\r
46e46eaf LE	74	/**\r
	75	Initialize a PCI_ROOT_BRIDGE structure.\r
	76	\r
	77	param[in] RootBusNumber The bus number to store in RootBus.\r
	78	\r
	79	param[in] MaxSubBusNumber The inclusive maximum bus number that can be\r
	80	assigned to any subordinate bus found behind any\r
	81	PCI bridge hanging off this root bus.\r
	82	\r
	83	The caller is repsonsible for ensuring that\r
	84	RootBusNumber <= MaxSubBusNumber. If\r
	85	RootBusNumber equals MaxSubBusNumber, then the\r
	86	root bus has no room for subordinate buses.\r
	87	\r
	88	param[out] RootBus The PCI_ROOT_BRIDGE structure (allocated by the\r
	89	caller) that should be filled in by this\r
	90	function.\r
	91	\r
	92	@retval EFI_SUCCESS Initialization successful. A device path\r
	93	consisting of an ACPI device path node, with\r
	94	UID = RootBusNumber, has been allocated and\r
	95	linked into RootBus.\r
	96	\r
	97	@retval EFI_OUT_OF_RESOURCES Memory allocation failed.\r
	98	**/\r
	99	STATIC\r
	100	EFI_STATUS\r
	101	InitRootBridge (\r
	102	IN UINT8 RootBusNumber,\r
	103	IN UINT8 MaxSubBusNumber,\r
	104	OUT PCI_ROOT_BRIDGE *RootBus\r
	105	)\r
	106	{\r
1f4e2299 LE	107	OVMF_PCI_ROOT_BRIDGE_DEVICE_PATH *DevicePath;\r
1f4e2299 LE	108	\r
65de2ef5 LE	109	//\r
	110	// Be safe if other fields are added to PCI_ROOT_BRIDGE later.\r
	111	//\r
	112	ZeroMem (RootBus, sizeof *RootBus);\r
	113	\r
	114	RootBus->Segment = 0;\r
	115	\r
a5ece62d LE	116	RootBus->Supports = EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO \|\r
	117	EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO \|\r
	118	EFI_PCI_ATTRIBUTE_ISA_IO_16 \|\r
	119	EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO \|\r
	120	EFI_PCI_ATTRIBUTE_VGA_MEMORY \|\r
	121	EFI_PCI_ATTRIBUTE_VGA_IO_16 \|\r
	122	EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16;\r
	123	RootBus->Attributes = RootBus->Supports;\r
	124	\r
c789d61d LE	125	RootBus->DmaAbove4G = FALSE;\r
c789d61d LE	126	\r
0dcd1b1b LE	127	RootBus->AllocationAttributes = EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM;\r
	128	RootBus->PMem.Base = 0;\r
	129	RootBus->PMem.Limit = 0;\r
	130	RootBus->PMemAbove4G.Base = 0;\r
	131	RootBus->PMemAbove4G.Limit = 0;\r
	132	RootBus->MemAbove4G.Base = 0;\r
	133	RootBus->MemAbove4G.Limit = 0;\r
	134	\r
390951c2 LE	135	RootBus->Bus.Base = RootBusNumber;\r
	136	RootBus->Bus.Limit = MaxSubBusNumber;\r
	137	RootBus->Io.Base = PcdGet64 (PcdPciIoBase);\r
	138	RootBus->Io.Limit = PcdGet64 (PcdPciIoBase) + (PcdGet64 (PcdPciIoSize) - 1);\r
	139	RootBus->Mem.Base = PcdGet64 (PcdPciMmio32Base);\r
	140	RootBus->Mem.Limit = PcdGet64 (PcdPciMmio32Base) +\r
	141	(PcdGet64 (PcdPciMmio32Size) - 1);\r
	142	\r
7daf2401 LE	143	RootBus->NoExtendedConfigSpace = (PcdGet16 (PcdOvmfHostBridgePciDevId) !=\r
7daf2401 LE	144	INTEL_Q35_MCH_DEVICE_ID);\r
cb81595b	145	\r
1f4e2299 LE	146	DevicePath = AllocateCopyPool (sizeof mRootBridgeDevicePathTemplate,\r
	147	&mRootBridgeDevicePathTemplate);\r
	148	if (DevicePath == NULL) {\r
	149	DEBUG ((EFI_D_ERROR, "%a: %r\n", __FUNCTION__, EFI_OUT_OF_RESOURCES));\r
	150	return EFI_OUT_OF_RESOURCES;\r
	151	}\r
	152	DevicePath->AcpiDevicePath.UID = RootBusNumber;\r
	153	RootBus->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)DevicePath;\r
	154	\r
	155	DEBUG ((EFI_D_INFO,\r
	156	"%a: populated root bus %d, with room for %d subordinate bus(es)\n",\r
	157	__FUNCTION__, RootBusNumber, MaxSubBusNumber - RootBusNumber));\r
	158	return EFI_SUCCESS;\r
46e46eaf LE	159	}\r
	160	\r
	161	\r
	162	/**\r
	163	Uninitialize a PCI_ROOT_BRIDGE structure set up with InitRootBridge().\r
	164	\r
	165	param[in] RootBus The PCI_ROOT_BRIDGE structure, allocated by the caller and\r
	166	initialized with InitRootBridge(), that should be\r
	167	uninitialized. This function doesn't free RootBus.\r
	168	**/\r
	169	STATIC\r
	170	VOID\r
	171	UninitRootBridge (\r
	172	IN PCI_ROOT_BRIDGE *RootBus\r
	173	)\r
	174	{\r
1f4e2299	175	FreePool (RootBus->DevicePath);\r
46e46eaf LE	176	}\r
	177	\r
	178	\r
d85861d7 LE	179	/**\r
	180	Return all the root bridge instances in an array.\r
	181	\r
	182	@param Count Return the count of root bridge instances.\r
	183	\r
	184	@return All the root bridge instances in an array.\r
	185	The array should be passed into PciHostBridgeFreeRootBridges()\r
	186	when it's not used.\r
	187	**/\r
	188	PCI_ROOT_BRIDGE *\r
	189	EFIAPI\r
	190	PciHostBridgeGetRootBridges (\r
	191	UINTN *Count\r
	192	)\r
	193	{\r
46e46eaf LE	194	EFI_STATUS Status;\r
	195	FIRMWARE_CONFIG_ITEM FwCfgItem;\r
	196	UINTN FwCfgSize;\r
	197	UINT64 ExtraRootBridges;\r
	198	PCI_ROOT_BRIDGE *Bridges;\r
	199	UINTN Initialized;\r
	200	UINTN LastRootBridgeNumber;\r
	201	UINTN RootBridgeNumber;\r
	202	\r
d85861d7	203	*Count = 0;\r
46e46eaf LE	204	\r
	205	//\r
	206	// QEMU provides the number of extra root buses, shortening the exhaustive\r
	207	// search below. If there is no hint, the feature is missing.\r
	208	//\r
	209	Status = QemuFwCfgFindFile ("etc/extra-pci-roots", &FwCfgItem, &FwCfgSize);\r
	210	if (EFI_ERROR (Status) \|\| FwCfgSize != sizeof ExtraRootBridges) {\r
	211	ExtraRootBridges = 0;\r
	212	} else {\r
	213	QemuFwCfgSelectItem (FwCfgItem);\r
	214	QemuFwCfgReadBytes (FwCfgSize, &ExtraRootBridges);\r
	215	\r
	216	if (ExtraRootBridges > PCI_MAX_BUS) {\r
	217	DEBUG ((EFI_D_ERROR, "%a: invalid count of extra root buses (%Lu) "\r
	218	"reported by QEMU\n", __FUNCTION__, ExtraRootBridges));\r
	219	return NULL;\r
	220	}\r
	221	DEBUG ((EFI_D_INFO, "%a: %Lu extra root buses reported by QEMU\n",\r
	222	__FUNCTION__, ExtraRootBridges));\r
	223	}\r
	224	\r
	225	//\r
	226	// Allocate the "main" root bridge, and any extra root bridges.\r
	227	//\r
	228	Bridges = AllocatePool ((1 + (UINTN)ExtraRootBridges) * sizeof *Bridges);\r
	229	if (Bridges == NULL) {\r
	230	DEBUG ((EFI_D_ERROR, "%a: %r\n", __FUNCTION__, EFI_OUT_OF_RESOURCES));\r
	231	return NULL;\r
	232	}\r
	233	Initialized = 0;\r
	234	\r
	235	//\r
	236	// The "main" root bus is always there.\r
	237	//\r
	238	LastRootBridgeNumber = 0;\r
	239	\r
	240	//\r
	241	// Scan all other root buses. If function 0 of any device on a bus returns a\r
	242	// VendorId register value different from all-bits-one, then that bus is\r
	243	// alive.\r
	244	//\r
	245	for (RootBridgeNumber = 1;\r
	246	RootBridgeNumber <= PCI_MAX_BUS && Initialized < ExtraRootBridges;\r
	247	++RootBridgeNumber) {\r
	248	UINTN Device;\r
	249	\r
	250	for (Device = 0; Device <= PCI_MAX_DEVICE; ++Device) {\r
	251	if (PciRead16 (PCI_LIB_ADDRESS (RootBridgeNumber, Device, 0,\r
	252	PCI_VENDOR_ID_OFFSET)) != MAX_UINT16) {\r
	253	break;\r
	254	}\r
	255	}\r
	256	if (Device <= PCI_MAX_DEVICE) {\r
	257	//\r
	258	// Found the next root bus. We can now install the previous one,\r
	259	// because now we know how big a bus number range that one has, for any\r
	260	// subordinate buses that might exist behind PCI bridges hanging off it.\r
	261	//\r
	262	Status = InitRootBridge ((UINT8)LastRootBridgeNumber,\r
	263	(UINT8)(RootBridgeNumber - 1), &Bridges[Initialized]);\r
	264	if (EFI_ERROR (Status)) {\r
	265	goto FreeBridges;\r
	266	}\r
	267	++Initialized;\r
268	LastRootBridgeNumber = RootBridgeNumber;\r
269	}\r
270	}\r
271	\r
272	//\r
273	// Install the last root bus (which might be the only, ie. main, root bus, if\r
274	// we've found no extra root buses).\r
275	//\r
276	Status = InitRootBridge ((UINT8)LastRootBridgeNumber, PCI_MAX_BUS,\r
277	&Bridges[Initialized]);\r
278	if (EFI_ERROR (Status)) {\r
279	goto FreeBridges;\r
280	}\r
281	++Initialized;\r
282	\r
283	*Count = Initialized;\r
284	return Bridges;\r
285	\r
286	FreeBridges:\r
287	while (Initialized > 0) {\r
288	--Initialized;\r
289	UninitRootBridge (&Bridges[Initialized]);\r
290	}\r
291	\r
292	FreePool (Bridges);\r
d85861d7 LE	293	return NULL;\r
	294	}\r
	295	\r
46e46eaf	296	\r
d85861d7 LE	297	/**\r
	298	Free the root bridge instances array returned from\r
	299	PciHostBridgeGetRootBridges().\r
	300	\r
	301	@param The root bridge instances array.\r
	302	@param The count of the array.\r
	303	**/\r
	304	VOID\r
	305	EFIAPI\r
	306	PciHostBridgeFreeRootBridges (\r
	307	PCI_ROOT_BRIDGE *Bridges,\r
	308	UINTN Count\r
	309	)\r
	310	{\r
dc4d6467 LE	311	if (Bridges == NULL && Count == 0) {\r
	312	return;\r
	313	}\r
	314	ASSERT (Bridges != NULL && Count > 0);\r
	315	\r
	316	do {\r
	317	--Count;\r
	318	UninitRootBridge (&Bridges[Count]);\r
	319	} while (Count > 0);\r
	320	\r
	321	FreePool (Bridges);\r
d85861d7 LE	322	}\r
d85861d7 LE	323	\r
46e46eaf	324	\r
d85861d7 LE	325	/**\r
	326	Inform the platform that the resource conflict happens.\r
	327	\r
	328	@param HostBridgeHandle Handle of the Host Bridge.\r
	329	@param Configuration Pointer to PCI I/O and PCI memory resource\r
	330	descriptors. The Configuration contains the resources\r
	331	for all the root bridges. The resource for each root\r
	332	bridge is terminated with END descriptor and an\r
	333	additional END is appended indicating the end of the\r
	334	entire resources. The resource descriptor field\r
	335	values follow the description in\r
	336	EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
	337	.SubmitResources().\r
	338	**/\r
	339	VOID\r
	340	EFIAPI\r
	341	PciHostBridgeResourceConflict (\r
	342	EFI_HANDLE HostBridgeHandle,\r
	343	VOID *Configuration\r
	344	)\r
	345	{\r
	346	EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *Descriptor;\r
	347	UINTN RootBridgeIndex;\r
	348	DEBUG ((EFI_D_ERROR, "PciHostBridge: Resource conflict happens!\n"));\r
	349	\r
	350	RootBridgeIndex = 0;\r
	351	Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Configuration;\r
	352	while (Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR) {\r
	353	DEBUG ((EFI_D_ERROR, "RootBridge[%d]:\n", RootBridgeIndex++));\r
	354	for (; Descriptor->Desc == ACPI_ADDRESS_SPACE_DESCRIPTOR; Descriptor++) {\r
	355	ASSERT (Descriptor->ResType <\r
	356	(sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr) /\r
	357	sizeof (mPciHostBridgeLibAcpiAddressSpaceTypeStr[0])\r
	358	)\r
	359	);\r
	360	DEBUG ((EFI_D_ERROR, " %s: Length/Alignment = 0x%lx / 0x%lx\n",\r
	361	mPciHostBridgeLibAcpiAddressSpaceTypeStr[Descriptor->ResType],\r
	362	Descriptor->AddrLen, Descriptor->AddrRangeMax\r
	363	));\r
	364	if (Descriptor->ResType == ACPI_ADDRESS_SPACE_TYPE_MEM) {\r
	365	DEBUG ((EFI_D_ERROR, " Granularity/SpecificFlag = %ld / %02x%s\n",\r
	366	Descriptor->AddrSpaceGranularity, Descriptor->SpecificFlag,\r
	367	((Descriptor->SpecificFlag &\r
	368	EFI_ACPI_MEMORY_RESOURCE_SPECIFIC_FLAG_CACHEABLE_PREFETCHABLE\r
	369	) != 0) ? L" (Prefetchable)" : L""\r
	370	));\r
	371	}\r
	372	}\r
	373	//\r
	374	// Skip the END descriptor for root bridge\r
	375	//\r
	376	ASSERT (Descriptor->Desc == ACPI_END_TAG_DESCRIPTOR);\r
	377	Descriptor = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)(\r
	378	(EFI_ACPI_END_TAG_DESCRIPTOR *)Descriptor + 1\r
	379	);\r
	380	}\r
	381	}\r