[mirror_edk2.git] / OvmfPkg / Library / SmmCpuFeaturesLib / SmmCpuFeaturesLib.c

/** @file\r
The CPU specific programming for PiSmmCpuDxeSmm module.\r
\r
Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution.  The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php\r
\r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#include <PiSmm.h>\r
#include <Library/SmmCpuFeaturesLib.h>\r
#include <Library/BaseLib.h>\r
#include <Library/PcdLib.h>\r
#include <Library/MemoryAllocationLib.h>\r
#include <Library/DebugLib.h>\r
#include <Register/SmramSaveStateMap.h>\r
\r
/**\r
  The constructor function\r
\r
  @param[in]  ImageHandle  The firmware allocated handle for the EFI image.\r
  @param[in]  SystemTable  A pointer to the EFI System Table.\r
\r
  @retval EFI_SUCCESS      The constructor always returns EFI_SUCCESS.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
SmmCpuFeaturesLibConstructor (\r
  IN EFI_HANDLE        ImageHandle,\r
  IN EFI_SYSTEM_TABLE  *SystemTable\r
  )\r
{\r
  //\r
  // No need to program SMRRs on our virtual platform.\r
  //\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Called during the very first SMI into System Management Mode to initialize\r
  CPU features, including SMBASE, for the currently executing CPU.  Since this\r
  is the first SMI, the SMRAM Save State Map is at the default address of\r
  SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET.  The currently executing\r
  CPU is specified by CpuIndex and CpuIndex can be used to access information\r
  about the currently executing CPU in the ProcessorInfo array and the\r
  HotPlugCpuData data structure.\r
\r
  @param[in] CpuIndex        The index of the CPU to initialize.  The value\r
                             must be between 0 and the NumberOfCpus field in\r
                             the System Management System Table (SMST).\r
  @param[in] IsMonarch       TRUE if the CpuIndex is the index of the CPU that\r
                             was elected as monarch during System Management\r
                             Mode initialization.\r
                             FALSE if the CpuIndex is not the index of the CPU\r
                             that was elected as monarch during System\r
                             Management Mode initialization.\r
  @param[in] ProcessorInfo   Pointer to an array of EFI_PROCESSOR_INFORMATION\r
                             structures.  ProcessorInfo[CpuIndex] contains the\r
                             information for the currently executing CPU.\r
  @param[in] CpuHotPlugData  Pointer to the CPU_HOT_PLUG_DATA structure that\r
                             contains the ApidId and SmBase arrays.\r
**/\r
VOID\r
EFIAPI\r
SmmCpuFeaturesInitializeProcessor (\r
  IN UINTN                      CpuIndex,\r
  IN BOOLEAN                    IsMonarch,\r
  IN EFI_PROCESSOR_INFORMATION  *ProcessorInfo,\r
  IN CPU_HOT_PLUG_DATA          *CpuHotPlugData\r
  )\r
{\r
  SMRAM_SAVE_STATE_MAP  *CpuState;\r
\r
  //\r
  // Configure SMBASE.\r
  //\r
  CpuState = (SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET);\r
  CpuState->x86.SMBASE = (UINT32)CpuHotPlugData->SmBase[CpuIndex];\r
\r
  //\r
  // No need to program SMRRs on our virtual platform.\r
  //\r
}\r
\r
/**\r
  This function updates the SMRAM save state on the currently executing CPU\r
  to resume execution at a specific address after an RSM instruction.  This\r
  function must evaluate the SMRAM save state to determine the execution mode\r
  the RSM instruction resumes and update the resume execution address with\r
  either NewInstructionPointer32 or NewInstructionPoint.  The auto HALT restart\r
  flag in the SMRAM save state must always be cleared.  This function returns\r
  the value of the instruction pointer from the SMRAM save state that was\r
  replaced.  If this function returns 0, then the SMRAM save state was not\r
  modified.\r
\r
  This function is called during the very first SMI on each CPU after\r
  SmmCpuFeaturesInitializeProcessor() to set a flag in normal execution mode\r
  to signal that the SMBASE of each CPU has been updated before the default\r
  SMBASE address is used for the first SMI to the next CPU.\r
\r
  @param[in] CpuIndex                 The index of the CPU to hook.  The value\r
                                      must be between 0 and the NumberOfCpus\r
                                      field in the System Management System Table\r
                                      (SMST).\r
  @param[in] CpuState                 Pointer to SMRAM Save State Map for the\r
                                      currently executing CPU.\r
  @param[in] NewInstructionPointer32  Instruction pointer to use if resuming to\r
                                      32-bit execution mode from 64-bit SMM.\r
  @param[in] NewInstructionPointer    Instruction pointer to use if resuming to\r
                                      same execution mode as SMM.\r
\r
  @retval 0    This function did modify the SMRAM save state.\r
  @retval > 0  The original instruction pointer value from the SMRAM save state\r
               before it was replaced.\r
**/\r
UINT64\r
EFIAPI\r
SmmCpuFeaturesHookReturnFromSmm (\r
  IN UINTN                 CpuIndex,\r
  IN SMRAM_SAVE_STATE_MAP  *CpuState,\r
  IN UINT64                NewInstructionPointer32,\r
  IN UINT64                NewInstructionPointer\r
  )\r
{\r
  return 0;\r
}\r
\r
/**\r
  Hook point in normal execution mode that allows the one CPU that was elected\r
  as monarch during System Management Mode initialization to perform additional\r
  initialization actions immediately after all of the CPUs have processed their\r
  first SMI and called SmmCpuFeaturesInitializeProcessor() relocating SMBASE\r
  into a buffer in SMRAM and called SmmCpuFeaturesHookReturnFromSmm().\r
**/\r
VOID\r
EFIAPI\r
SmmCpuFeaturesSmmRelocationComplete (\r
  VOID\r
  )\r
{\r
}\r
\r
/**\r
  Return the size, in bytes, of a custom SMI Handler in bytes.  If 0 is\r
  returned, then a custom SMI handler is not provided by this library,\r
  and the default SMI handler must be used.\r
\r
  @retval 0    Use the default SMI handler.\r
  @retval > 0  Use the SMI handler installed by SmmCpuFeaturesInstallSmiHandler()\r
               The caller is required to allocate enough SMRAM for each CPU to\r
               support the size of the custom SMI handler.\r
**/\r
UINTN\r
EFIAPI\r
SmmCpuFeaturesGetSmiHandlerSize (\r
  VOID\r
  )\r
{\r
  return 0;\r
}\r
\r
/**\r
  Install a custom SMI handler for the CPU specified by CpuIndex.  This function\r
  is only called if SmmCpuFeaturesGetSmiHandlerSize() returns a size is greater\r
  than zero and is called by the CPU that was elected as monarch during System\r
  Management Mode initialization.\r
\r
  @param[in] CpuIndex   The index of the CPU to install the custom SMI handler.\r
                        The value must be between 0 and the NumberOfCpus field\r
                        in the System Management System Table (SMST).\r
  @param[in] SmBase     The SMBASE address for the CPU specified by CpuIndex.\r
  @param[in] SmiStack   The stack to use when an SMI is processed by the\r
                        the CPU specified by CpuIndex.\r
  @param[in] StackSize  The size, in bytes, if the stack used when an SMI is\r
                        processed by the CPU specified by CpuIndex.\r
  @param[in] GdtBase    The base address of the GDT to use when an SMI is\r
                        processed by the CPU specified by CpuIndex.\r
  @param[in] GdtSize    The size, in bytes, of the GDT used when an SMI is\r
                        processed by the CPU specified by CpuIndex.\r
  @param[in] IdtBase    The base address of the IDT to use when an SMI is\r
                        processed by the CPU specified by CpuIndex.\r
  @param[in] IdtSize    The size, in bytes, of the IDT used when an SMI is\r
                        processed by the CPU specified by CpuIndex.\r
  @param[in] Cr3        The base address of the page tables to use when an SMI\r
                        is processed by the CPU specified by CpuIndex.\r
**/\r
VOID\r
EFIAPI\r
SmmCpuFeaturesInstallSmiHandler (\r
  IN UINTN   CpuIndex,\r
  IN UINT32  SmBase,\r
  IN VOID    *SmiStack,\r
  IN UINTN   StackSize,\r
  IN UINTN   GdtBase,\r
  IN UINTN   GdtSize,\r
  IN UINTN   IdtBase,\r
  IN UINTN   IdtSize,\r
  IN UINT32  Cr3\r
  )\r
{\r
}\r
\r
/**\r
  Determines if MTRR registers must be configured to set SMRAM cache-ability\r
  when executing in System Management Mode.\r
\r
  @retval TRUE   MTRR registers must be configured to set SMRAM cache-ability.\r
  @retval FALSE  MTRR registers do not need to be configured to set SMRAM\r
                 cache-ability.\r
**/\r
BOOLEAN\r
EFIAPI\r
SmmCpuFeaturesNeedConfigureMtrrs (\r
  VOID\r
  )\r
{\r
  return FALSE;\r
}\r
\r
/**\r
  Disable SMRR register if SMRR is supported and SmmCpuFeaturesNeedConfigureMtrrs()\r
  returns TRUE.\r
**/\r
VOID\r
EFIAPI\r
SmmCpuFeaturesDisableSmrr (\r
  VOID\r
  )\r
{\r
  //\r
  // No SMRR support, nothing to do\r
  //\r
}\r
\r
/**\r
  Enable SMRR register if SMRR is supported and SmmCpuFeaturesNeedConfigureMtrrs()\r
  returns TRUE.\r
**/\r
VOID\r
EFIAPI\r
SmmCpuFeaturesReenableSmrr (\r
  VOID\r
  )\r
{\r
  //\r
  // No SMRR support, nothing to do\r
  //\r
}\r
\r
/**\r
  Processor specific hook point each time a CPU enters System Management Mode.\r
\r
  @param[in] CpuIndex  The index of the CPU that has entered SMM.  The value\r
                       must be between 0 and the NumberOfCpus field in the\r
                       System Management System Table (SMST).\r
**/\r
VOID\r
EFIAPI\r
SmmCpuFeaturesRendezvousEntry (\r
  IN UINTN  CpuIndex\r
  )\r
{\r
  //\r
  // No SMRR support, nothing to do\r
  //\r
}\r
\r
/**\r
  Processor specific hook point each time a CPU exits System Management Mode.\r
\r
  @param[in] CpuIndex  The index of the CPU that is exiting SMM.  The value must\r
                       be between 0 and the NumberOfCpus field in the System\r
                       Management System Table (SMST).\r
**/\r
VOID\r
EFIAPI\r
SmmCpuFeaturesRendezvousExit (\r
  IN UINTN  CpuIndex\r
  )\r
{\r
}\r
\r
/**\r
  Check to see if an SMM register is supported by a specified CPU.\r
\r
  @param[in] CpuIndex  The index of the CPU to check for SMM register support.\r
                       The value must be between 0 and the NumberOfCpus field\r
                       in the System Management System Table (SMST).\r
  @param[in] RegName   Identifies the SMM register to check for support.\r
\r
  @retval TRUE   The SMM register specified by RegName is supported by the CPU\r
                 specified by CpuIndex.\r
  @retval FALSE  The SMM register specified by RegName is not supported by the\r
                 CPU specified by CpuIndex.\r
**/\r
BOOLEAN\r
EFIAPI\r
SmmCpuFeaturesIsSmmRegisterSupported (\r
  IN UINTN         CpuIndex,\r
  IN SMM_REG_NAME  RegName\r
  )\r
{\r
  ASSERT (RegName == SmmRegFeatureControl);\r
  return FALSE;\r
}\r
\r
/**\r
  Returns the current value of the SMM register for the specified CPU.\r
  If the SMM register is not supported, then 0 is returned.\r
\r
  @param[in] CpuIndex  The index of the CPU to read the SMM register.  The\r
                       value must be between 0 and the NumberOfCpus field in\r
                       the System Management System Table (SMST).\r
  @param[in] RegName   Identifies the SMM register to read.\r
\r
  @return  The value of the SMM register specified by RegName from the CPU\r
           specified by CpuIndex.\r
**/\r
UINT64\r
EFIAPI\r
SmmCpuFeaturesGetSmmRegister (\r
  IN UINTN         CpuIndex,\r
  IN SMM_REG_NAME  RegName\r
  )\r
{\r
  //\r
  // This is called for SmmRegSmmDelayed, SmmRegSmmBlocked, SmmRegSmmEnable.\r
  // The last of these should actually be SmmRegSmmDisable, so we can just\r
  // return FALSE.\r
  //\r
  return 0;\r
}\r
\r
/**\r
  Sets the value of an SMM register on a specified CPU.\r
  If the SMM register is not supported, then no action is performed.\r
\r
  @param[in] CpuIndex  The index of the CPU to write the SMM register.  The\r
                       value must be between 0 and the NumberOfCpus field in\r
                       the System Management System Table (SMST).\r
  @param[in] RegName   Identifies the SMM register to write.\r
                       registers are read-only.\r
  @param[in] Value     The value to write to the SMM register.\r
**/\r
VOID\r
EFIAPI\r
SmmCpuFeaturesSetSmmRegister (\r
  IN UINTN         CpuIndex,\r
  IN SMM_REG_NAME  RegName,\r
  IN UINT64        Value\r
  )\r
{\r
  ASSERT (FALSE);\r
}\r
\r
/**\r
  Read an SMM Save State register on the target processor.  If this function\r
  returns EFI_UNSUPPORTED, then the caller is responsible for reading the\r
  SMM Save Sate register.\r
\r
  @param[in]  CpuIndex  The index of the CPU to read the SMM Save State.  The\r
                        value must be between 0 and the NumberOfCpus field in\r
                        the System Management System Table (SMST).\r
  @param[in]  Register  The SMM Save State register to read.\r
  @param[in]  Width     The number of bytes to read from the CPU save state.\r
  @param[out] Buffer    Upon return, this holds the CPU register value read\r
                        from the save state.\r
\r
  @retval EFI_SUCCESS           The register was read from Save State.\r
  @retval EFI_INVALID_PARAMTER  Buffer is NULL.\r
  @retval EFI_UNSUPPORTED       This function does not support reading Register.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
SmmCpuFeaturesReadSaveStateRegister (\r
  IN  UINTN                        CpuIndex,\r
  IN  EFI_SMM_SAVE_STATE_REGISTER  Register,\r
  IN  UINTN                        Width,\r
  OUT VOID                         *Buffer\r
  )\r
{\r
  return EFI_UNSUPPORTED;\r
}\r
\r
/**\r
  Writes an SMM Save State register on the target processor.  If this function\r
  returns EFI_UNSUPPORTED, then the caller is responsible for writing the\r
  SMM Save Sate register.\r
\r
  @param[in] CpuIndex  The index of the CPU to write the SMM Save State.  The\r
                       value must be between 0 and the NumberOfCpus field in\r
                       the System Management System Table (SMST).\r
  @param[in] Register  The SMM Save State register to write.\r
  @param[in] Width     The number of bytes to write to the CPU save state.\r
  @param[in] Buffer    Upon entry, this holds the new CPU register value.\r
\r
  @retval EFI_SUCCESS           The register was written to Save State.\r
  @retval EFI_INVALID_PARAMTER  Buffer is NULL.\r
  @retval EFI_UNSUPPORTED       This function does not support writing Register.\r
**/\r
EFI_STATUS\r
EFIAPI\r
SmmCpuFeaturesWriteSaveStateRegister (\r
  IN UINTN                        CpuIndex,\r
  IN EFI_SMM_SAVE_STATE_REGISTER  Register,\r
  IN UINTN                        Width,\r
  IN CONST VOID                   *Buffer\r
  )\r
{\r
  return EFI_UNSUPPORTED;\r
}\r
\r
/**\r
  This function is hook point called after the gEfiSmmReadyToLockProtocolGuid\r
  notification is completely processed.\r
**/\r
VOID\r
EFIAPI\r
SmmCpuFeaturesCompleteSmmReadyToLock (\r
  VOID\r
  )\r
{\r
}\r
\r
/**\r
  This API provides a method for a CPU to allocate a specific region for storing page tables.\r
\r
  This API can be called more once to allocate memory for page tables.\r
\r
  Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the\r
  allocated buffer.  The buffer returned is aligned on a 4KB boundary.  If Pages is 0, then NULL\r
  is returned.  If there is not enough memory remaining to satisfy the request, then NULL is\r
  returned.\r
\r
  This function can also return NULL if there is no preference on where the page tables are allocated in SMRAM.\r
\r
  @param  Pages                 The number of 4 KB pages to allocate.\r
\r
  @return A pointer to the allocated buffer for page tables.\r
  @retval NULL      Fail to allocate a specific region for storing page tables,\r
                    Or there is no preference on where the page tables are allocated in SMRAM.\r
\r
**/\r
VOID *\r
EFIAPI\r
SmmCpuFeaturesAllocatePageTableMemory (\r
  IN UINTN           Pages\r
  )\r
{\r
  return NULL;\r
}\r
\r
Commit	Line	Data
86d71589 PB	1	/** @file\r
	2	The CPU specific programming for PiSmmCpuDxeSmm module.\r
	3	\r
	4	Copyright (c) 2010 - 2015, Intel Corporation. All rights reserved.<BR>\r
	5	This program and the accompanying materials\r
	6	are licensed and made available under the terms and conditions of the BSD License\r
	7	which accompanies this distribution. The full text of the license may be found at\r
	8	http://opensource.org/licenses/bsd-license.php\r
	9	\r
	10	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	11	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	12	\r
	13	**/\r
	14	\r
	15	#include <PiSmm.h>\r
	16	#include <Library/SmmCpuFeaturesLib.h>\r
	17	#include <Library/BaseLib.h>\r
86d71589 PB	18	#include <Library/PcdLib.h>\r
	19	#include <Library/MemoryAllocationLib.h>\r
	20	#include <Library/DebugLib.h>\r
86d71589 PB	21	#include <Register/SmramSaveStateMap.h>\r
86d71589 PB	22	\r
86d71589 PB	23	/**\r
	24	The constructor function\r
	25	\r
	26	@param[in] ImageHandle The firmware allocated handle for the EFI image.\r
	27	@param[in] SystemTable A pointer to the EFI System Table.\r
	28	\r
	29	@retval EFI_SUCCESS The constructor always returns EFI_SUCCESS.\r
	30	\r
	31	**/\r
	32	EFI_STATUS\r
	33	EFIAPI\r
	34	SmmCpuFeaturesLibConstructor (\r
	35	IN EFI_HANDLE ImageHandle,\r
	36	IN EFI_SYSTEM_TABLE *SystemTable\r
	37	)\r
	38	{\r
86d71589	39	//\r
d7e71b29	40	// No need to program SMRRs on our virtual platform.\r
86d71589	41	//\r
86d71589 PB	42	return EFI_SUCCESS;\r
	43	}\r
	44	\r
	45	/**\r
	46	Called during the very first SMI into System Management Mode to initialize\r
	47	CPU features, including SMBASE, for the currently executing CPU. Since this\r
	48	is the first SMI, the SMRAM Save State Map is at the default address of\r
	49	SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET. The currently executing\r
	50	CPU is specified by CpuIndex and CpuIndex can be used to access information\r
	51	about the currently executing CPU in the ProcessorInfo array and the\r
	52	HotPlugCpuData data structure.\r
	53	\r
	54	@param[in] CpuIndex The index of the CPU to initialize. The value\r
	55	must be between 0 and the NumberOfCpus field in\r
	56	the System Management System Table (SMST).\r
	57	@param[in] IsMonarch TRUE if the CpuIndex is the index of the CPU that\r
	58	was elected as monarch during System Management\r
	59	Mode initialization.\r
	60	FALSE if the CpuIndex is not the index of the CPU\r
	61	that was elected as monarch during System\r
	62	Management Mode initialization.\r
	63	@param[in] ProcessorInfo Pointer to an array of EFI_PROCESSOR_INFORMATION\r
	64	structures. ProcessorInfo[CpuIndex] contains the\r
	65	information for the currently executing CPU.\r
	66	@param[in] CpuHotPlugData Pointer to the CPU_HOT_PLUG_DATA structure that\r
	67	contains the ApidId and SmBase arrays.\r
	68	**/\r
	69	VOID\r
	70	EFIAPI\r
	71	SmmCpuFeaturesInitializeProcessor (\r
	72	IN UINTN CpuIndex,\r
	73	IN BOOLEAN IsMonarch,\r
	74	IN EFI_PROCESSOR_INFORMATION *ProcessorInfo,\r
	75	IN CPU_HOT_PLUG_DATA *CpuHotPlugData\r
	76	)\r
	77	{\r
	78	SMRAM_SAVE_STATE_MAP *CpuState;\r
86d71589 PB	79	\r
	80	//\r
	81	// Configure SMBASE.\r
	82	//\r
	83	CpuState = (SMRAM_SAVE_STATE_MAP *)(UINTN)(SMM_DEFAULT_SMBASE + SMRAM_SAVE_STATE_MAP_OFFSET);\r
	84	CpuState->x86.SMBASE = (UINT32)CpuHotPlugData->SmBase[CpuIndex];\r
	85	\r
	86	//\r
d7e71b29	87	// No need to program SMRRs on our virtual platform.\r
86d71589	88	//\r
86d71589 PB	89	}\r
	90	\r
	91	/**\r
	92	This function updates the SMRAM save state on the currently executing CPU\r
	93	to resume execution at a specific address after an RSM instruction. This\r
	94	function must evaluate the SMRAM save state to determine the execution mode\r
	95	the RSM instruction resumes and update the resume execution address with\r
	96	either NewInstructionPointer32 or NewInstructionPoint. The auto HALT restart\r
	97	flag in the SMRAM save state must always be cleared. This function returns\r
	98	the value of the instruction pointer from the SMRAM save state that was\r
	99	replaced. If this function returns 0, then the SMRAM save state was not\r
	100	modified.\r
	101	\r
	102	This function is called during the very first SMI on each CPU after\r
	103	SmmCpuFeaturesInitializeProcessor() to set a flag in normal execution mode\r
	104	to signal that the SMBASE of each CPU has been updated before the default\r
	105	SMBASE address is used for the first SMI to the next CPU.\r
	106	\r
	107	@param[in] CpuIndex The index of the CPU to hook. The value\r
	108	must be between 0 and the NumberOfCpus\r
	109	field in the System Management System Table\r
	110	(SMST).\r
	111	@param[in] CpuState Pointer to SMRAM Save State Map for the\r
	112	currently executing CPU.\r
	113	@param[in] NewInstructionPointer32 Instruction pointer to use if resuming to\r
	114	32-bit execution mode from 64-bit SMM.\r
	115	@param[in] NewInstructionPointer Instruction pointer to use if resuming to\r
	116	same execution mode as SMM.\r
	117	\r
	118	@retval 0 This function did modify the SMRAM save state.\r
	119	@retval > 0 The original instruction pointer value from the SMRAM save state\r
	120	before it was replaced.\r
	121	**/\r
	122	UINT64\r
	123	EFIAPI\r
	124	SmmCpuFeaturesHookReturnFromSmm (\r
	125	IN UINTN CpuIndex,\r
	126	IN SMRAM_SAVE_STATE_MAP *CpuState,\r
	127	IN UINT64 NewInstructionPointer32,\r
	128	IN UINT64 NewInstructionPointer\r
	129	)\r
	130	{\r
	131	return 0;\r
	132	}\r
	133	\r
	134	/**\r
	135	Hook point in normal execution mode that allows the one CPU that was elected\r
	136	as monarch during System Management Mode initialization to perform additional\r
	137	initialization actions immediately after all of the CPUs have processed their\r
	138	first SMI and called SmmCpuFeaturesInitializeProcessor() relocating SMBASE\r
	139	into a buffer in SMRAM and called SmmCpuFeaturesHookReturnFromSmm().\r
	140	**/\r
	141	VOID\r
	142	EFIAPI\r
	143	SmmCpuFeaturesSmmRelocationComplete (\r
	144	VOID\r
	145	)\r
	146	{\r
	147	}\r
	148	\r
	149	/**\r
	150	Return the size, in bytes, of a custom SMI Handler in bytes. If 0 is\r
	151	returned, then a custom SMI handler is not provided by this library,\r
	152	and the default SMI handler must be used.\r
153	\r
154	@retval 0 Use the default SMI handler.\r
155	@retval > 0 Use the SMI handler installed by SmmCpuFeaturesInstallSmiHandler()\r
156	The caller is required to allocate enough SMRAM for each CPU to\r
157	support the size of the custom SMI handler.\r
158	**/\r
159	UINTN\r
160	EFIAPI\r
161	SmmCpuFeaturesGetSmiHandlerSize (\r
162	VOID\r
163	)\r
164	{\r
165	return 0;\r
166	}\r
167	\r
168	/**\r
169	Install a custom SMI handler for the CPU specified by CpuIndex. This function\r
170	is only called if SmmCpuFeaturesGetSmiHandlerSize() returns a size is greater\r
171	than zero and is called by the CPU that was elected as monarch during System\r
172	Management Mode initialization.\r
173	\r
174	@param[in] CpuIndex The index of the CPU to install the custom SMI handler.\r
175	The value must be between 0 and the NumberOfCpus field\r
176	in the System Management System Table (SMST).\r
177	@param[in] SmBase The SMBASE address for the CPU specified by CpuIndex.\r
178	@param[in] SmiStack The stack to use when an SMI is processed by the\r
179	the CPU specified by CpuIndex.\r
180	@param[in] StackSize The size, in bytes, if the stack used when an SMI is\r
181	processed by the CPU specified by CpuIndex.\r
182	@param[in] GdtBase The base address of the GDT to use when an SMI is\r
183	processed by the CPU specified by CpuIndex.\r
184	@param[in] GdtSize The size, in bytes, of the GDT used when an SMI is\r
185	processed by the CPU specified by CpuIndex.\r
186	@param[in] IdtBase The base address of the IDT to use when an SMI is\r
187	processed by the CPU specified by CpuIndex.\r
188	@param[in] IdtSize The size, in bytes, of the IDT used when an SMI is\r
189	processed by the CPU specified by CpuIndex.\r
190	@param[in] Cr3 The base address of the page tables to use when an SMI\r
191	is processed by the CPU specified by CpuIndex.\r
192	**/\r
193	VOID\r
194	EFIAPI\r
195	SmmCpuFeaturesInstallSmiHandler (\r
196	IN UINTN CpuIndex,\r
197	IN UINT32 SmBase,\r
198	IN VOID *SmiStack,\r
199	IN UINTN StackSize,\r
200	IN UINTN GdtBase,\r
201	IN UINTN GdtSize,\r
202	IN UINTN IdtBase,\r
203	IN UINTN IdtSize,\r
204	IN UINT32 Cr3\r
205	)\r
206	{\r
207	}\r
208	\r
209	/**\r
210	Determines if MTRR registers must be configured to set SMRAM cache-ability\r
211	when executing in System Management Mode.\r
212	\r
213	@retval TRUE MTRR registers must be configured to set SMRAM cache-ability.\r
214	@retval FALSE MTRR registers do not need to be configured to set SMRAM\r
215	cache-ability.\r
216	**/\r
217	BOOLEAN\r
218	EFIAPI\r
219	SmmCpuFeaturesNeedConfigureMtrrs (\r
220	VOID\r
221	)\r
222	{\r
d7e71b29	223	return FALSE;\r
86d71589 PB	224	}\r
	225	\r
	226	/**\r
	227	Disable SMRR register if SMRR is supported and SmmCpuFeaturesNeedConfigureMtrrs()\r
	228	returns TRUE.\r
	229	**/\r
	230	VOID\r
	231	EFIAPI\r
	232	SmmCpuFeaturesDisableSmrr (\r
	233	VOID\r
	234	)\r
	235	{\r
d7e71b29 PB	236	//\r
	237	// No SMRR support, nothing to do\r
	238	//\r
86d71589 PB	239	}\r
	240	\r
	241	/**\r
	242	Enable SMRR register if SMRR is supported and SmmCpuFeaturesNeedConfigureMtrrs()\r
	243	returns TRUE.\r
	244	**/\r
	245	VOID\r
	246	EFIAPI\r
	247	SmmCpuFeaturesReenableSmrr (\r
	248	VOID\r
	249	)\r
	250	{\r
d7e71b29 PB	251	//\r
	252	// No SMRR support, nothing to do\r
	253	//\r
86d71589 PB	254	}\r
	255	\r
	256	/**\r
	257	Processor specific hook point each time a CPU enters System Management Mode.\r
	258	\r
	259	@param[in] CpuIndex The index of the CPU that has entered SMM. The value\r
	260	must be between 0 and the NumberOfCpus field in the\r
	261	System Management System Table (SMST).\r
	262	**/\r
	263	VOID\r
	264	EFIAPI\r
	265	SmmCpuFeaturesRendezvousEntry (\r
	266	IN UINTN CpuIndex\r
	267	)\r
	268	{\r
	269	//\r
d7e71b29	270	// No SMRR support, nothing to do\r
86d71589	271	//\r
86d71589 PB	272	}\r
	273	\r
	274	/**\r
	275	Processor specific hook point each time a CPU exits System Management Mode.\r
	276	\r
	277	@param[in] CpuIndex The index of the CPU that is exiting SMM. The value must\r
	278	be between 0 and the NumberOfCpus field in the System\r
	279	Management System Table (SMST).\r
	280	**/\r
	281	VOID\r
	282	EFIAPI\r
	283	SmmCpuFeaturesRendezvousExit (\r
	284	IN UINTN CpuIndex\r
	285	)\r
	286	{\r
	287	}\r
	288	\r
	289	/**\r
	290	Check to see if an SMM register is supported by a specified CPU.\r
	291	\r
	292	@param[in] CpuIndex The index of the CPU to check for SMM register support.\r
	293	The value must be between 0 and the NumberOfCpus field\r
	294	in the System Management System Table (SMST).\r
	295	@param[in] RegName Identifies the SMM register to check for support.\r
	296	\r
	297	@retval TRUE The SMM register specified by RegName is supported by the CPU\r
	298	specified by CpuIndex.\r
	299	@retval FALSE The SMM register specified by RegName is not supported by the\r
	300	CPU specified by CpuIndex.\r
	301	**/\r
	302	BOOLEAN\r
	303	EFIAPI\r
	304	SmmCpuFeaturesIsSmmRegisterSupported (\r
	305	IN UINTN CpuIndex,\r
	306	IN SMM_REG_NAME RegName\r
	307	)\r
	308	{\r
d7e71b29	309	ASSERT (RegName == SmmRegFeatureControl);\r
86d71589 PB	310	return FALSE;\r
	311	}\r
	312	\r
	313	/**\r
	314	Returns the current value of the SMM register for the specified CPU.\r
	315	If the SMM register is not supported, then 0 is returned.\r
	316	\r
	317	@param[in] CpuIndex The index of the CPU to read the SMM register. The\r
	318	value must be between 0 and the NumberOfCpus field in\r
	319	the System Management System Table (SMST).\r
	320	@param[in] RegName Identifies the SMM register to read.\r
	321	\r
	322	@return The value of the SMM register specified by RegName from the CPU\r
	323	specified by CpuIndex.\r
	324	**/\r
	325	UINT64\r
	326	EFIAPI\r
	327	SmmCpuFeaturesGetSmmRegister (\r
	328	IN UINTN CpuIndex,\r
	329	IN SMM_REG_NAME RegName\r
	330	)\r
	331	{\r
d7e71b29 PB	332	//\r
	333	// This is called for SmmRegSmmDelayed, SmmRegSmmBlocked, SmmRegSmmEnable.\r
	334	// The last of these should actually be SmmRegSmmDisable, so we can just\r
	335	// return FALSE.\r
	336	//\r
86d71589 PB	337	return 0;\r
	338	}\r
	339	\r
	340	/**\r
	341	Sets the value of an SMM register on a specified CPU.\r
	342	If the SMM register is not supported, then no action is performed.\r
	343	\r
	344	@param[in] CpuIndex The index of the CPU to write the SMM register. The\r
	345	value must be between 0 and the NumberOfCpus field in\r
	346	the System Management System Table (SMST).\r
	347	@param[in] RegName Identifies the SMM register to write.\r
	348	registers are read-only.\r
	349	@param[in] Value The value to write to the SMM register.\r
	350	**/\r
	351	VOID\r
	352	EFIAPI\r
	353	SmmCpuFeaturesSetSmmRegister (\r
	354	IN UINTN CpuIndex,\r
	355	IN SMM_REG_NAME RegName,\r
	356	IN UINT64 Value\r
	357	)\r
	358	{\r
d7e71b29	359	ASSERT (FALSE);\r
86d71589 PB	360	}\r
	361	\r
	362	/**\r
	363	Read an SMM Save State register on the target processor. If this function\r
	364	returns EFI_UNSUPPORTED, then the caller is responsible for reading the\r
	365	SMM Save Sate register.\r
	366	\r
	367	@param[in] CpuIndex The index of the CPU to read the SMM Save State. The\r
	368	value must be between 0 and the NumberOfCpus field in\r
	369	the System Management System Table (SMST).\r
	370	@param[in] Register The SMM Save State register to read.\r
	371	@param[in] Width The number of bytes to read from the CPU save state.\r
	372	@param[out] Buffer Upon return, this holds the CPU register value read\r
	373	from the save state.\r
	374	\r
	375	@retval EFI_SUCCESS The register was read from Save State.\r
	376	@retval EFI_INVALID_PARAMTER Buffer is NULL.\r
	377	@retval EFI_UNSUPPORTED This function does not support reading Register.\r
	378	\r
	379	**/\r
	380	EFI_STATUS\r
	381	EFIAPI\r
	382	SmmCpuFeaturesReadSaveStateRegister (\r
	383	IN UINTN CpuIndex,\r
	384	IN EFI_SMM_SAVE_STATE_REGISTER Register,\r
	385	IN UINTN Width,\r
	386	OUT VOID *Buffer\r
	387	)\r
	388	{\r
	389	return EFI_UNSUPPORTED;\r
	390	}\r
	391	\r
	392	/**\r
	393	Writes an SMM Save State register on the target processor. If this function\r
	394	returns EFI_UNSUPPORTED, then the caller is responsible for writing the\r
	395	SMM Save Sate register.\r
	396	\r
	397	@param[in] CpuIndex The index of the CPU to write the SMM Save State. The\r
	398	value must be between 0 and the NumberOfCpus field in\r
	399	the System Management System Table (SMST).\r
	400	@param[in] Register The SMM Save State register to write.\r
	401	@param[in] Width The number of bytes to write to the CPU save state.\r
	402	@param[in] Buffer Upon entry, this holds the new CPU register value.\r
	403	\r
	404	@retval EFI_SUCCESS The register was written to Save State.\r
	405	@retval EFI_INVALID_PARAMTER Buffer is NULL.\r
	406	@retval EFI_UNSUPPORTED This function does not support writing Register.\r
	407	**/\r
	408	EFI_STATUS\r
	409	EFIAPI\r
	410	SmmCpuFeaturesWriteSaveStateRegister (\r
	411	IN UINTN CpuIndex,\r
	412	IN EFI_SMM_SAVE_STATE_REGISTER Register,\r
	413	IN UINTN Width,\r
	414	IN CONST VOID *Buffer\r
	415	)\r
	416	{\r
	417	return EFI_UNSUPPORTED;\r
	418	}\r
	419	\r
	420	/**\r
	421	This function is hook point called after the gEfiSmmReadyToLockProtocolGuid\r
	422	notification is completely processed.\r
	423	**/\r
424	VOID\r
425	EFIAPI\r
426	SmmCpuFeaturesCompleteSmmReadyToLock (\r
427	VOID\r
428	)\r
429	{\r
430	}\r
431	\r
432	/**\r
433	This API provides a method for a CPU to allocate a specific region for storing page tables.\r
434	\r
435	This API can be called more once to allocate memory for page tables.\r
436	\r
437	Allocates the number of 4KB pages of type EfiRuntimeServicesData and returns a pointer to the\r
438	allocated buffer. The buffer returned is aligned on a 4KB boundary. If Pages is 0, then NULL\r
439	is returned. If there is not enough memory remaining to satisfy the request, then NULL is\r
440	returned.\r
441	\r
442	This function can also return NULL if there is no preference on where the page tables are allocated in SMRAM.\r
443	\r
444	@param Pages The number of 4 KB pages to allocate.\r
445	\r
446	@return A pointer to the allocated buffer for page tables.\r
447	@retval NULL Fail to allocate a specific region for storing page tables,\r
448	Or there is no preference on where the page tables are allocated in SMRAM.\r
449	\r
450	**/\r
451	VOID *\r
452	EFIAPI\r
453	SmmCpuFeaturesAllocatePageTableMemory (\r
454	IN UINTN Pages\r
455	)\r
456	{\r
457	return NULL;\r
458	}\r
459	\r