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7b202cb0 1## @file\r
49ba9447 2# Open Virtual Machine Firmware: FDF\r
3#\r
56d7640a 4# Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>\r
49ba9447 5#\r
56d7640a 6# This program and the accompanying materials\r
49ba9447 7# are licensed and made available under the terms and conditions of the BSD License\r
8# which accompanies this distribution. The full text of the license may be found at\r
9# http://opensource.org/licenses/bsd-license.php\r
10#\r
11# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13#\r
7b202cb0 14##\r
49ba9447 15\r
16################################################################################\r
c1c2669c 17[FD.SEC]\r
18BaseAddress = 0xFFFEE000\r
19Size = 0x00012000\r
20ErasePolarity = 1\r
21BlockSize = 0x1000\r
22NumBlocks = 0x12\r
23\r
240x0|0x12000\r
25FV = SECFV\r
26\r
49ba9447 27################################################################################\r
c1c2669c 28\r
29[FD.MEMFD]\r
30BaseAddress = 0x800000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvBase\r
31Size = 0x400000|gUefiOvmfPkgTokenSpaceGuid.PcdOvmfMemFvSize\r
49ba9447 32ErasePolarity = 1\r
33BlockSize = 0x10000\r
c1c2669c 34NumBlocks = 0x40\r
49ba9447 35\r
c1c2669c 360x0|0x400000\r
49ba9447 37FV = MAINFV\r
38\r
39################################################################################\r
c1c2669c 40\r
41[FV.SECFV]\r
42BlockSize = 0x1000\r
43FvAlignment = 16\r
44ERASE_POLARITY = 1\r
45MEMORY_MAPPED = TRUE\r
46STICKY_WRITE = TRUE\r
47LOCK_CAP = TRUE\r
48LOCK_STATUS = TRUE\r
49WRITE_DISABLED_CAP = TRUE\r
50WRITE_ENABLED_CAP = TRUE\r
51WRITE_STATUS = TRUE\r
52WRITE_LOCK_CAP = TRUE\r
53WRITE_LOCK_STATUS = TRUE\r
54READ_DISABLED_CAP = TRUE\r
55READ_ENABLED_CAP = TRUE\r
56READ_STATUS = TRUE\r
57READ_LOCK_CAP = TRUE\r
58READ_LOCK_STATUS = TRUE\r
59\r
49ba9447 60#\r
c1c2669c 61# SEC Phase modules\r
49ba9447 62#\r
c1c2669c 63# The code in this FV handles the initial firmware startup, and\r
64# decompresses the MAINFV which handles the majority of the boot sequence.\r
49ba9447 65#\r
c1c2669c 66INF OvmfPkg/Sec/SecMain.inf\r
67\r
d79d2cd2 68INF RuleOverride=RESET_VECTOR UefiCpuPkg/ResetVector/Vtf0/Bin/ResetVector.inf\r
c1c2669c 69\r
49ba9447 70################################################################################\r
c1c2669c 71[FV.MAINFV]\r
72BlockSize = 0x10000\r
73FvAlignment = 16\r
49ba9447 74ERASE_POLARITY = 1\r
75MEMORY_MAPPED = TRUE\r
76STICKY_WRITE = TRUE\r
77LOCK_CAP = TRUE\r
78LOCK_STATUS = TRUE\r
79WRITE_DISABLED_CAP = TRUE\r
80WRITE_ENABLED_CAP = TRUE\r
81WRITE_STATUS = TRUE\r
82WRITE_LOCK_CAP = TRUE\r
83WRITE_LOCK_STATUS = TRUE\r
84READ_DISABLED_CAP = TRUE\r
85READ_ENABLED_CAP = TRUE\r
86READ_STATUS = TRUE\r
87READ_LOCK_CAP = TRUE\r
88READ_LOCK_STATUS = TRUE\r
89\r
90#\r
c1c2669c 91# Files to be placed in MAIN FV\r
49ba9447 92#\r
93# This firmware volume will have files placed in it uncompressed,\r
94# and then then entire firmware volume will be compressed in a\r
95# single compression operation in order to achieve better\r
96# overall compression.\r
97#\r
98\r
c1c2669c 99APRIORI PEI {\r
100 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
101}\r
102\r
c1c2669c 103#\r
104# PEI Phase modules\r
105#\r
106INF MdeModulePkg/Core/Pei/PeiMain.inf\r
107INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
108INF IntelFrameworkModulePkg/Universal/StatusCode/Pei/StatusCodePei.inf\r
109INF OvmfPkg/PlatformPei/PlatformPei.inf\r
110INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
111\r
2ec2dee3
LG		 112FILE FV_IMAGE = A4EF5A93-3F1B-4232-A1C4-F0910E6D1D9C {\r
113 SECTION COMPRESS PI_NONE {\r
114 SECTION FV_IMAGE = DXEFV\r
115 }\r
c29f6c05 116}\r
117\r
118################################################################################\r
119\r
120[FV.DXEFV]\r
121BlockSize = 0x10000\r
122FvAlignment = 16\r
123ERASE_POLARITY = 1\r
124MEMORY_MAPPED = TRUE\r
125STICKY_WRITE = TRUE\r
126LOCK_CAP = TRUE\r
127LOCK_STATUS = TRUE\r
128WRITE_DISABLED_CAP = TRUE\r
129WRITE_ENABLED_CAP = TRUE\r
130WRITE_STATUS = TRUE\r
131WRITE_LOCK_CAP = TRUE\r
132WRITE_LOCK_STATUS = TRUE\r
133READ_DISABLED_CAP = TRUE\r
134READ_ENABLED_CAP = TRUE\r
135READ_STATUS = TRUE\r
136READ_LOCK_CAP = TRUE\r
137READ_LOCK_STATUS = TRUE\r
138\r
139APRIORI DXE {\r
140 INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
c29f6c05 141}\r
142\r
49ba9447 143#\r
144# DXE Phase modules\r
145#\r
146INF MdeModulePkg/Core/Dxe/DxeMain.inf\r
147\r
148INF IntelFrameworkModulePkg/Universal/StatusCode/RuntimeDxe/StatusCodeRuntimeDxe.inf\r
149INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
150\r
151INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
152INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
c1c2669c 153INF MdeModulePkg/Universal/EbcDxe/EbcDxe.inf\r
e471bf1f 154INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf\r
49ba9447 155INF PcAtChipsetPkg/8259InterruptControllerDxe/8259.inf\r
afbb91aa 156INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf\r
49ba9447 157INF UefiCpuPkg/CpuDxe/CpuDxe.inf\r
158INF PcAtChipsetPkg/8254TimerDxe/8254Timer.inf\r
159INF PcAtChipsetPkg/PciHostBridgeDxe/PciHostBridgeDxe.inf\r
4ad90a84 160INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf\r
49ba9447 161INF PcAtChipsetPkg/KbcResetDxe/Reset.inf\r
162INF MdeModulePkg/Universal/Metronome/Metronome.inf\r
71095b27 163INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf\r
49ba9447 164\r
efd82c57 165INF OvmfPkg/BlockMmioToBlockIoDxe/BlockIo.inf\r
27f58ea1 166INF OvmfPkg/EmuVariableFvbRuntimeDxe/Fvb.inf\r
167INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteDxe.inf\r
168INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableRuntimeDxe.inf\r
49ba9447 169INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
170INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
171INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
172INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
173INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
174INF MdeModulePkg/Universal/Console/GraphicsConsoleDxe/GraphicsConsoleDxe.inf\r
175INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
176INF IntelFrameworkModulePkg/Universal/BdsDxe/BdsDxe.inf\r
177INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
86fef5b4 178INF MdeModulePkg/Universal/PrintDxe/PrintDxe.inf\r
49ba9447 179INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
180INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
181INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
182INF MdeModulePkg/Bus/Scsi/ScsiBusDxe/ScsiBusDxe.inf\r
183INF MdeModulePkg/Bus/Scsi/ScsiDiskDxe/ScsiDiskDxe.inf\r
184INF IntelFrameworkModulePkg/Bus/Pci/IdeBusDxe/IdeBusDxe.inf\r
185INF PcAtChipsetPkg/Bus/Pci/IdeControllerDxe/IdeControllerDxe.inf\r
186INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
187INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r
188\r
49ba9447 189INF PcAtChipsetPkg/IsaAcpiDxe/IsaAcpi.inf\r
190INF IntelFrameworkModulePkg/Bus/Isa/IsaBusDxe/IsaBusDxe.inf\r
191INF IntelFrameworkModulePkg/Bus/Isa/IsaSerialDxe/IsaSerialDxe.inf\r
192INF IntelFrameworkModulePkg/Bus/Isa/Ps2KeyboardDxe/Ps2keyboardDxe.inf\r
193INF IntelFrameworkModulePkg/Bus/Isa/IsaFloppyDxe/IsaFloppyDxe.inf\r
194\r
195INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf\r
196INF MdeModulePkg/Universal/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf\r
197INF RuleOverride=ACPITABLE OvmfPkg/AcpiTables/AcpiTables.inf\r
198\r
d989c453 199INF RuleOverride=BINARY FatBinPkg/EnhancedFatDxe/Fat.inf\r
49ba9447 200\r
d989c453 201INF RuleOverride=BINARY EdkShellBinPkg/FullShell/FullShell.inf\r
49ba9447 202\r
d46f3632 203FILE FREEFORM = PCD(gEfiIntelFrameworkModulePkgTokenSpaceGuid.PcdLogoFile) {\r
49ba9447 204 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { # LzmaCompress\r
205 SECTION RAW = MdeModulePkg/Logo/Logo.bmp\r
206 }\r
207 }\r
208\r
209################################################################################\r
210\r
c1c2669c 211[FV.OVMF]\r
212BlockSize = 0x10000\r
49ba9447 213FvAlignment = 16\r
214ERASE_POLARITY = 1\r
215MEMORY_MAPPED = TRUE\r
216STICKY_WRITE = TRUE\r
217LOCK_CAP = TRUE\r
218LOCK_STATUS = TRUE\r
219WRITE_DISABLED_CAP = TRUE\r
220WRITE_ENABLED_CAP = TRUE\r
221WRITE_STATUS = TRUE\r
222WRITE_LOCK_CAP = TRUE\r
223WRITE_LOCK_STATUS = TRUE\r
224READ_DISABLED_CAP = TRUE\r
225READ_ENABLED_CAP = TRUE\r
226READ_STATUS = TRUE\r
227READ_LOCK_CAP = TRUE\r
228READ_LOCK_STATUS = TRUE\r
229\r
230#\r
c1c2669c 231# This file contains the compressed MAINFV, which is compressed\r
49ba9447 232# in a single compression operation in order to achieve better\r
233# overall compression.\r
234#\r
235FILE FV_IMAGE = 20bc8ac9-94d1-4208-ab28-5d673fd73486 {\r
236 SECTION GUIDED EE4E5898-3914-4259-9D6E-DC7BD79403CF PROCESSING_REQUIRED = TRUE { # LzmaCompress\r
c1c2669c 237 SECTION FV_IMAGE = MAINFV\r
49ba9447 238 }\r
239 }\r
240\r
49ba9447 241#\r
c1c2669c 242# This file contains the uncompressed SECFV, which contains the initial\r
243# boot code. The code in this FV decompresses the MAINFV.\r
244#\r
245# It uses the Volume Top File (VTF) GUID so it will be placed at the\r
246# end of the FV.\r
49ba9447 247#\r
c1c2669c 248FILE FREEFORM = 1BA0062E-C779-4582-8566-336AE8F78F09 {\r
249 SECTION Align=16 FV_IMAGE = SECFV\r
250}\r
251\r
49ba9447 252################################################################################\r
253\r
254[Rule.Common.PEI_CORE]\r
255 FILE PEI_CORE = $(NAMED_GUID) {\r
2014a81a 256 PE32 PE32 Align=32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
49ba9447 257 UI STRING ="$(MODULE_NAME)" Optional\r
258 VERSION STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
259 }\r
260\r
261[Rule.Common.SEC]\r
262 FILE SEC = $(NAMED_GUID) {\r
2014a81a 263 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
49ba9447 264 UI STRING ="$(MODULE_NAME)" Optional\r
265 VERSION STRING ="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
266 }\r
267\r
d40d3ba4 268[Rule.Common.PEIM.NORELOC]\r
269 FILE PEIM = $(NAMED_GUID) RELOCS_STRIPPED {\r
2014a81a
LG		 270 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
271 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r
d40d3ba4 272 UI STRING="$(MODULE_NAME)" Optional\r
273 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
274 }\r
275\r
49ba9447 276[Rule.Common.PEIM]\r
277 FILE PEIM = $(NAMED_GUID) {\r
2014a81a
LG		 278 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
279 PE32 PE32 Align=32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
49ba9447 280 UI STRING="$(MODULE_NAME)" Optional\r
281 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
282 }\r
283\r
284[Rule.Common.PEIM.TIANOCOMPRESSED]\r
285 FILE PEIM = $(NAMED_GUID) {\r
2014a81a 286 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
49ba9447 287 GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE {\r
2014a81a 288 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
49ba9447 289 UI STRING="$(MODULE_NAME)" Optional\r
290 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
291 }\r
292 }\r
293\r
294[Rule.Common.DXE_CORE]\r
295 FILE DXE_CORE = $(NAMED_GUID) {\r
2014a81a 296 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
49ba9447 297 UI STRING="$(MODULE_NAME)" Optional\r
298 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
299 }\r
300\r
301[Rule.Common.UEFI_DRIVER]\r
302 FILE DRIVER = $(NAMED_GUID) {\r
2014a81a
LG		 303 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
304 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
49ba9447 305 UI STRING="$(MODULE_NAME)" Optional\r
306 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
307 }\r
308\r
309[Rule.Common.DXE_DRIVER]\r
310 FILE DRIVER = $(NAMED_GUID) {\r
2014a81a
LG		 311 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
312 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
49ba9447 313 UI STRING="$(MODULE_NAME)" Optional\r
314 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
315 }\r
316\r
317[Rule.Common.DXE_RUNTIME_DRIVER]\r
318 FILE DRIVER = $(NAMED_GUID) {\r
2014a81a
LG		 319 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
320 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
49ba9447 321 UI STRING="$(MODULE_NAME)" Optional\r
322 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
323 }\r
324\r
325[Rule.Common.UEFI_APPLICATION]\r
326 FILE APPLICATION = $(NAMED_GUID) {\r
2014a81a 327 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
49ba9447 328 UI STRING="$(MODULE_NAME)" Optional\r
329 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
330 }\r
331\r
d989c453
LG		 332[Rule.Common.UEFI_DRIVER.BINARY]\r
333 FILE DRIVER = $(NAMED_GUID) {\r
334 DXE_DEPEX DXE_DEPEX Optional |.depex\r
335 PE32 PE32 |.efi\r
336 UI STRING="$(MODULE_NAME)" Optional\r
337 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
338 }\r
339\r
340[Rule.Common.UEFI_APPLICATION.BINARY]\r
341 FILE APPLICATION = $(NAMED_GUID) {\r
342 PE32 PE32 |.efi\r
343 UI STRING="$(MODULE_NAME)" Optional\r
344 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
345 }\r
346\r
48889990 347[Rule.Common.USER_DEFINED.ACPITABLE]\r
49ba9447 348 FILE FREEFORM = $(NAMED_GUID) {\r
349 RAW ACPI |.acpi\r
350 RAW ASL |.aml\r
351 }\r
352\r
353[Rule.Common.SEC.RESET_VECTOR]\r
354 FILE RAW = $(NAMED_GUID) {\r
355 RAW RAW |.raw\r
356 }\r
357\r
712bd83b 358[OptionRom.CirrusLogic5446]\r
359INF OptionRomPkg/CirrusLogic5430Dxe/CirrusLogic5430Dxe.inf {\r
360 PCI_DEVICE_ID = 0x00B8\r
361 }\r
362\r
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