projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 49ba9447 | 1 | /**@file\r |
| 2 | Platform PEI driver\r | |
| 3 | \r | |
| eec7d420 | 4 | Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r |
| 5 | Copyright (c) 2011, Andrei Warkentin <andreiw@motorola.com>\r | |
| 6 | \r | |
| 56d7640a | 7 | This program and the accompanying materials\r |
| 49ba9447 | 8 | are licensed and made available under the terms and conditions of the BSD License\r |
| 9 | which accompanies this distribution. The full text of the license may be found at\r | |
| 10 | http://opensource.org/licenses/bsd-license.php\r | |
| 11 | \r | |
| 12 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 13 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 14 | \r | |
| 15 | **/\r | |
| 16 | \r | |
| 17 | //\r | |
| 18 | // The package level header files this module uses\r | |
| 19 | //\r | |
| 20 | #include <PiPei.h>\r | |
| 21 | \r | |
| 22 | //\r | |
| 23 | // The Library classes this module consumes\r | |
| 24 | //\r | |
| 25 | #include <Library/DebugLib.h>\r | |
| 26 | #include <Library/HobLib.h>\r | |
| 27 | #include <Library/IoLib.h>\r | |
| 77ba993c | 28 | #include <Library/MemoryAllocationLib.h>\r |
| 29 | #include <Library/PcdLib.h>\r | |
| 49ba9447 | 30 | #include <Library/PciLib.h>\r |
| 31 | #include <Library/PeimEntryPoint.h>\r | |
| 9ed65b10 | 32 | #include <Library/PeiServicesLib.h>\r |
| 49ba9447 | 33 | #include <Library/ResourcePublicationLib.h>\r |
| 34 | #include <Guid/MemoryTypeInformation.h>\r | |
| 9ed65b10 | 35 | #include <Ppi/MasterBootMode.h>\r |
| 931a0c74 | 36 | #include <IndustryStandard/Pci22.h>\r |
| bb6a9a93 WL |
37 | #include <Guid/XenInfo.h>\r |
| 38 | #include <IndustryStandard/E820.h>\r | |
| 39 | #include <Library/ResourcePublicationLib.h>\r | |
| 40 | #include <Library/MtrrLib.h>\r | |
| 49ba9447 | 41 | \r |
| 42 | #include "Platform.h"\r | |
| 3ca15914 | 43 | #include "Cmos.h"\r |
| 49ba9447 | 44 | \r |
| 45 | EFI_MEMORY_TYPE_INFORMATION mDefaultMemoryTypeInformation[] = {\r | |
| 46 | { EfiACPIMemoryNVS, 0x004 },\r | |
| 991d9563 | 47 | { EfiACPIReclaimMemory, 0x008 },\r |
| 55cdb67a | 48 | { EfiReservedMemoryType, 0x004 },\r |
| 991d9563 | 49 | { EfiRuntimeServicesData, 0x024 },\r |
| 50 | { EfiRuntimeServicesCode, 0x030 },\r | |
| 51 | { EfiBootServicesCode, 0x180 },\r | |
| 52 | { EfiBootServicesData, 0xF00 },\r | |
| 49ba9447 | 53 | { EfiMaxMemoryType, 0x000 }\r |
| 54 | };\r | |
| 55 | \r | |
| 56 | \r | |
| 9ed65b10 | 57 | EFI_PEI_PPI_DESCRIPTOR mPpiBootMode[] = {\r |
| 58 | {\r | |
| 59 | EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST,\r | |
| 60 | &gEfiPeiMasterBootModePpiGuid,\r | |
| 61 | NULL\r | |
| 62 | }\r | |
| 63 | };\r | |
| 64 | \r | |
| 65 | \r | |
| 49ba9447 | 66 | VOID\r |
| 67 | AddIoMemoryBaseSizeHob (\r | |
| 68 | EFI_PHYSICAL_ADDRESS MemoryBase,\r | |
| 69 | UINT64 MemorySize\r | |
| 70 | )\r | |
| 71 | {\r | |
| 991d9563 | 72 | BuildResourceDescriptorHob (\r |
| 73 | EFI_RESOURCE_MEMORY_MAPPED_IO,\r | |
| 49ba9447 | 74 | EFI_RESOURCE_ATTRIBUTE_PRESENT |\r |
| 75 | EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r | |
| 76 | EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r | |
| 991d9563 | 77 | EFI_RESOURCE_ATTRIBUTE_TESTED,\r |
| 49ba9447 | 78 | MemoryBase,\r |
| 79 | MemorySize\r | |
| 80 | );\r | |
| 81 | }\r | |
| 82 | \r | |
| eec7d420 | 83 | VOID\r |
| 84 | AddReservedMemoryBaseSizeHob (\r | |
| 85 | EFI_PHYSICAL_ADDRESS MemoryBase,\r | |
| 86 | UINT64 MemorySize\r | |
| 87 | )\r | |
| 88 | {\r | |
| 89 | BuildResourceDescriptorHob (\r | |
| 90 | EFI_RESOURCE_MEMORY_RESERVED,\r | |
| 91 | EFI_RESOURCE_ATTRIBUTE_PRESENT |\r | |
| 92 | EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r | |
| 93 | EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r | |
| 94 | EFI_RESOURCE_ATTRIBUTE_TESTED,\r | |
| 95 | MemoryBase,\r | |
| 96 | MemorySize\r | |
| 97 | );\r | |
| 98 | }\r | |
| 49ba9447 | 99 | \r |
| 100 | VOID\r | |
| 101 | AddIoMemoryRangeHob (\r | |
| 102 | EFI_PHYSICAL_ADDRESS MemoryBase,\r | |
| 103 | EFI_PHYSICAL_ADDRESS MemoryLimit\r | |
| 104 | )\r | |
| 105 | {\r | |
| 106 | AddIoMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));\r | |
| 107 | }\r | |
| 108 | \r | |
| 109 | \r | |
| 110 | VOID\r | |
| 111 | AddMemoryBaseSizeHob (\r | |
| 112 | EFI_PHYSICAL_ADDRESS MemoryBase,\r | |
| 113 | UINT64 MemorySize\r | |
| 114 | )\r | |
| 115 | {\r | |
| 991d9563 | 116 | BuildResourceDescriptorHob (\r |
| 117 | EFI_RESOURCE_SYSTEM_MEMORY,\r | |
| 49ba9447 | 118 | EFI_RESOURCE_ATTRIBUTE_PRESENT |\r |
| 119 | EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r | |
| 120 | EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r | |
| 121 | EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |\r | |
| 122 | EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |\r | |
| 123 | EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE |\r | |
| 991d9563 | 124 | EFI_RESOURCE_ATTRIBUTE_TESTED,\r |
| 49ba9447 | 125 | MemoryBase,\r |
| 126 | MemorySize\r | |
| 127 | );\r | |
| 128 | }\r | |
| 129 | \r | |
| 130 | \r | |
| 131 | VOID\r | |
| 132 | AddMemoryRangeHob (\r | |
| 133 | EFI_PHYSICAL_ADDRESS MemoryBase,\r | |
| 134 | EFI_PHYSICAL_ADDRESS MemoryLimit\r | |
| 135 | )\r | |
| 136 | {\r | |
| 137 | AddMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));\r | |
| 138 | }\r | |
| 139 | \r | |
| c0e10976 | 140 | \r |
| 141 | VOID\r | |
| 142 | AddUntestedMemoryBaseSizeHob (\r | |
| 143 | EFI_PHYSICAL_ADDRESS MemoryBase,\r | |
| 144 | UINT64 MemorySize\r | |
| 145 | )\r | |
| 146 | {\r | |
| 147 | BuildResourceDescriptorHob (\r | |
| 148 | EFI_RESOURCE_SYSTEM_MEMORY,\r | |
| 149 | EFI_RESOURCE_ATTRIBUTE_PRESENT |\r | |
| 150 | EFI_RESOURCE_ATTRIBUTE_INITIALIZED |\r | |
| 151 | EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |\r | |
| 152 | EFI_RESOURCE_ATTRIBUTE_WRITE_COMBINEABLE |\r | |
| 153 | EFI_RESOURCE_ATTRIBUTE_WRITE_THROUGH_CACHEABLE |\r | |
| 154 | EFI_RESOURCE_ATTRIBUTE_WRITE_BACK_CACHEABLE,\r | |
| 155 | MemoryBase,\r | |
| 156 | MemorySize\r | |
| 157 | );\r | |
| 158 | }\r | |
| 159 | \r | |
| 160 | \r | |
| 161 | VOID\r | |
| 162 | AddUntestedMemoryRangeHob (\r | |
| 163 | EFI_PHYSICAL_ADDRESS MemoryBase,\r | |
| 164 | EFI_PHYSICAL_ADDRESS MemoryLimit\r | |
| 165 | )\r | |
| 166 | {\r | |
| 167 | AddUntestedMemoryBaseSizeHob (MemoryBase, (UINT64)(MemoryLimit - MemoryBase));\r | |
| 168 | }\r | |
| 169 | \r | |
| bb6a9a93 WL |
170 | VOID\r |
| 171 | XenMemMapInitialization (\r | |
| 172 | VOID\r | |
| 173 | )\r | |
| 174 | {\r | |
| 175 | EFI_E820_ENTRY64 *E820Map;\r | |
| 176 | UINT32 E820EntriesCount;\r | |
| 177 | EFI_STATUS Status;\r | |
| 178 | \r | |
| 179 | DEBUG ((EFI_D_INFO, "Using memory map provided by Xen\n"));\r | |
| 180 | \r | |
| 181 | //\r | |
| 182 | // Create Memory Type Information HOB\r | |
| 183 | //\r | |
| 184 | BuildGuidDataHob (\r | |
| 185 | &gEfiMemoryTypeInformationGuid,\r | |
| 186 | mDefaultMemoryTypeInformation,\r | |
| 187 | sizeof(mDefaultMemoryTypeInformation)\r | |
| 188 | );\r | |
| 189 | \r | |
| 190 | //\r | |
| 191 | // Add PCI IO Port space available for PCI resource allocations.\r | |
| 192 | //\r | |
| 193 | BuildResourceDescriptorHob (\r | |
| 194 | EFI_RESOURCE_IO,\r | |
| 195 | EFI_RESOURCE_ATTRIBUTE_PRESENT |\r | |
| 196 | EFI_RESOURCE_ATTRIBUTE_INITIALIZED,\r | |
| 197 | 0xC000,\r | |
| 198 | 0x4000\r | |
| 199 | );\r | |
| 200 | \r | |
| 201 | //\r | |
| 202 | // Video memory + Legacy BIOS region\r | |
| 203 | //\r | |
| 204 | AddIoMemoryRangeHob (0x0A0000, BASE_1MB);\r | |
| 205 | \r | |
| 206 | //\r | |
| 207 | // Parse RAM in E820 map\r | |
| 208 | //\r | |
| 209 | Status = XenGetE820Map(&E820Map, &E820EntriesCount);\r | |
| 210 | \r | |
| 211 | ASSERT_EFI_ERROR (Status);\r | |
| 212 | \r | |
| 213 | if (E820EntriesCount > 0) {\r | |
| 214 | EFI_E820_ENTRY64 *Entry;\r | |
| 215 | UINT32 Loop;\r | |
| 216 | \r | |
| 217 | for (Loop = 0; Loop < E820EntriesCount; Loop++) {\r | |
| 218 | Entry = E820Map + Loop;\r | |
| 219 | \r | |
| 220 | //\r | |
| 221 | // Only care about RAM\r | |
| 222 | //\r | |
| 223 | if (Entry->Type != EfiAcpiAddressRangeMemory) {\r | |
| 224 | continue;\r | |
| 225 | }\r | |
| 226 | \r | |
| 227 | if (Entry->BaseAddr >= BASE_4GB) {\r | |
| 228 | AddUntestedMemoryBaseSizeHob (Entry->BaseAddr, Entry->Length);\r | |
| 229 | } else {\r | |
| 230 | AddMemoryBaseSizeHob (Entry->BaseAddr, Entry->Length);\r | |
| 231 | }\r | |
| 232 | \r | |
| 233 | MtrrSetMemoryAttribute (Entry->BaseAddr, Entry->Length, CacheWriteBack);\r | |
| 234 | }\r | |
| 235 | }\r | |
| 236 | }\r | |
| 237 | \r | |
| c0e10976 | 238 | \r |
| 49ba9447 | 239 | VOID\r |
| 240 | MemMapInitialization (\r | |
| 55cdb67a | 241 | EFI_PHYSICAL_ADDRESS TopOfMemory\r |
| 49ba9447 | 242 | )\r |
| 243 | {\r | |
| 244 | //\r | |
| 245 | // Create Memory Type Information HOB\r | |
| 246 | //\r | |
| 247 | BuildGuidDataHob (\r | |
| 248 | &gEfiMemoryTypeInformationGuid,\r | |
| 249 | mDefaultMemoryTypeInformation,\r | |
| 250 | sizeof(mDefaultMemoryTypeInformation)\r | |
| 251 | );\r | |
| 252 | \r | |
| 991d9563 | 253 | //\r |
| 254 | // Add PCI IO Port space available for PCI resource allocations.\r | |
| 255 | //\r | |
| 256 | BuildResourceDescriptorHob (\r | |
| 257 | EFI_RESOURCE_IO,\r | |
| eec7d420 | 258 | EFI_RESOURCE_ATTRIBUTE_PRESENT |\r |
| 259 | EFI_RESOURCE_ATTRIBUTE_INITIALIZED,\r | |
| 260 | 0xC000,\r | |
| 261 | 0x4000\r | |
| 991d9563 | 262 | );\r |
| 263 | \r | |
| 264 | //\r | |
| cb678aa8 | 265 | // Video memory + Legacy BIOS region\r |
| 49ba9447 | 266 | //\r |
| cb678aa8 | 267 | AddIoMemoryRangeHob (0x0A0000, BASE_1MB);\r |
| 49ba9447 | 268 | \r |
| 269 | //\r | |
| cb678aa8 | 270 | // address purpose size\r |
| 271 | // ------------ -------- -------------------------\r | |
| 67fe5bed | 272 | // max(top, 2g) PCI MMIO 0xFC000000 - max(top, 2g)\r |
| 273 | // 0xFC000000 gap 44 MB\r | |
| cb678aa8 | 274 | // 0xFEC00000 IO-APIC 4 KB\r |
| 275 | // 0xFEC01000 gap 1020 KB\r | |
| 276 | // 0xFED00000 HPET 1 KB\r | |
| 277 | // 0xFED00400 gap 1023 KB\r | |
| 278 | // 0xFEE00000 LAPIC 1 MB\r | |
| 49ba9447 | 279 | //\r |
| 67fe5bed | 280 | AddIoMemoryRangeHob (TopOfMemory < BASE_2GB ? BASE_2GB : TopOfMemory, 0xFC000000);\r |
| cb678aa8 | 281 | AddIoMemoryBaseSizeHob (0xFEC00000, SIZE_4KB);\r |
| 282 | AddIoMemoryBaseSizeHob (0xFED00000, SIZE_1KB);\r | |
| 283 | AddIoMemoryBaseSizeHob (PcdGet32(PcdCpuLocalApicBaseAddress), SIZE_1MB);\r | |
| 49ba9447 | 284 | }\r |
| 285 | \r | |
| 286 | \r | |
| 287 | VOID\r | |
| 288 | MiscInitialization (\r | |
| 0e20a186 | 289 | VOID\r |
| 49ba9447 | 290 | )\r |
| 291 | {\r | |
| 292 | //\r | |
| 293 | // Disable A20 Mask\r | |
| 294 | //\r | |
| 55cdb67a | 295 | IoOr8 (0x92, BIT1);\r |
| 49ba9447 | 296 | \r |
| 297 | //\r | |
| 298 | // Build the CPU hob with 36-bit addressing and 16-bits of IO space.\r | |
| 299 | //\r | |
| 300 | BuildCpuHob (36, 16);\r | |
| c756b2ab | 301 | \r |
| 0e20a186 | 302 | //\r |
| 303 | // If PMREGMISC/PMIOSE is set, assume the ACPI PMBA has been configured (for\r | |
| 304 | // example by Xen) and skip the setup here. This matches the logic in\r | |
| 305 | // AcpiTimerLibConstructor ().\r | |
| 306 | //\r | |
| 307 | if ((PciRead8 (PCI_LIB_ADDRESS (0, 1, 3, 0x80)) & 0x01) == 0) {\r | |
| eec7d420 | 308 | //\r |
| 931a0c74 | 309 | // The PEI phase should be exited with fully accessibe PIIX4 IO space:\r |
| 310 | // 1. set PMBA\r | |
| eec7d420 | 311 | //\r |
| 931a0c74 | 312 | PciAndThenOr32 (\r |
| 313 | PCI_LIB_ADDRESS (0, 1, 3, 0x40),\r | |
| 314 | (UINT32) ~0xFFC0,\r | |
| 315 | PcdGet16 (PcdAcpiPmBaseAddress)\r | |
| 316 | );\r | |
| 317 | \r | |
| 318 | //\r | |
| 319 | // 2. set PCICMD/IOSE\r | |
| 320 | //\r | |
| 321 | PciOr8 (\r | |
| 322 | PCI_LIB_ADDRESS (0, 1, 3, PCI_COMMAND_OFFSET),\r | |
| 323 | EFI_PCI_COMMAND_IO_SPACE\r | |
| 324 | );\r | |
| 325 | \r | |
| 326 | //\r | |
| 327 | // 3. set PMREGMISC/PMIOSE\r | |
| 328 | //\r | |
| 329 | PciOr8 (PCI_LIB_ADDRESS (0, 1, 3, 0x80), 0x01);\r | |
| eec7d420 | 330 | }\r |
| 49ba9447 | 331 | }\r |
| 332 | \r | |
| 333 | \r | |
| 9ed65b10 | 334 | VOID\r |
| 335 | BootModeInitialization (\r | |
| 336 | )\r | |
| 337 | {\r | |
| 667bf1e4 | 338 | EFI_STATUS Status;\r |
| 339 | \r | |
| 340 | Status = PeiServicesSetBootMode (BOOT_WITH_FULL_CONFIGURATION);\r | |
| 341 | ASSERT_EFI_ERROR (Status);\r | |
| 342 | \r | |
| 343 | Status = PeiServicesInstallPpi (mPpiBootMode);\r | |
| 344 | ASSERT_EFI_ERROR (Status);\r | |
| 9ed65b10 | 345 | }\r |
| 346 | \r | |
| 347 | \r | |
| 77ba993c | 348 | VOID\r |
| 349 | ReserveEmuVariableNvStore (\r | |
| 350 | )\r | |
| 351 | {\r | |
| 352 | EFI_PHYSICAL_ADDRESS VariableStore;\r | |
| 353 | \r | |
| 354 | //\r | |
| 355 | // Allocate storage for NV variables early on so it will be\r | |
| 356 | // at a consistent address. Since VM memory is preserved\r | |
| 357 | // across reboots, this allows the NV variable storage to survive\r | |
| 358 | // a VM reboot.\r | |
| 359 | //\r | |
| 360 | VariableStore =\r | |
| 361 | (EFI_PHYSICAL_ADDRESS)(UINTN)\r | |
| 9edb2933 | 362 | AllocateAlignedRuntimePages (\r |
| cce992ac WL |
363 | EFI_SIZE_TO_PAGES (2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)),\r |
| 364 | PcdGet32 (PcdFlashNvStorageFtwSpareSize)\r | |
| 27f58ea1 | 365 | );\r |
| 77ba993c | 366 | DEBUG ((EFI_D_INFO,\r |
| 367 | "Reserved variable store memory: 0x%lX; size: %dkb\n",\r | |
| 368 | VariableStore,\r | |
| 29a3f139 | 369 | (2 * PcdGet32 (PcdFlashNvStorageFtwSpareSize)) / 1024\r |
| 77ba993c | 370 | ));\r |
| 371 | PcdSet64 (PcdEmuVariableNvStoreReserved, VariableStore);\r | |
| 372 | }\r | |
| 373 | \r | |
| 374 | \r | |
| 3ca15914 | 375 | VOID\r |
| 376 | DebugDumpCmos (\r | |
| 377 | VOID\r | |
| 378 | )\r | |
| 379 | {\r | |
| 380 | UINTN Loop;\r | |
| 381 | \r | |
| 382 | DEBUG ((EFI_D_INFO, "CMOS:\n"));\r | |
| 383 | \r | |
| 384 | for (Loop = 0; Loop < 0x80; Loop++) {\r | |
| 385 | if ((Loop % 0x10) == 0) {\r | |
| 386 | DEBUG ((EFI_D_INFO, "%02x:", Loop));\r | |
| 387 | }\r | |
| 388 | DEBUG ((EFI_D_INFO, " %02x", CmosRead8 (Loop)));\r | |
| 389 | if ((Loop % 0x10) == 0xf) {\r | |
| 390 | DEBUG ((EFI_D_INFO, "\n"));\r | |
| 391 | }\r | |
| 392 | }\r | |
| 393 | }\r | |
| 394 | \r | |
| 395 | \r | |
| 49ba9447 | 396 | /**\r |
| 397 | Perform Platform PEI initialization.\r | |
| 398 | \r | |
| 399 | @param FileHandle Handle of the file being invoked.\r | |
| 400 | @param PeiServices Describes the list of possible PEI Services.\r | |
| 401 | \r | |
| 402 | @return EFI_SUCCESS The PEIM initialized successfully.\r | |
| 403 | \r | |
| 404 | **/\r | |
| 405 | EFI_STATUS\r | |
| 406 | EFIAPI\r | |
| 407 | InitializePlatform (\r | |
| 408 | IN EFI_PEI_FILE_HANDLE FileHandle,\r | |
| 409 | IN CONST EFI_PEI_SERVICES **PeiServices\r | |
| 410 | )\r | |
| 411 | {\r | |
| 55cdb67a | 412 | EFI_PHYSICAL_ADDRESS TopOfMemory;\r |
| c7ea55b9 | 413 | UINT32 XenLeaf;\r |
| 55cdb67a | 414 | \r |
| 447d2641 WL |
415 | TopOfMemory = 0;\r |
| 416 | \r | |
| 49ba9447 | 417 | DEBUG ((EFI_D_ERROR, "Platform PEIM Loaded\n"));\r |
| 418 | \r | |
| 3ca15914 | 419 | DebugDumpCmos ();\r |
| 420 | \r | |
| c7ea55b9 WL |
421 | XenLeaf = XenDetect ();\r |
| 422 | \r | |
| 447d2641 WL |
423 | if (XenLeaf != 0) {\r |
| 424 | PublishPeiMemory ();\r | |
| 425 | PcdSetBool (PcdPciDisableBusEnumeration, TRUE);\r | |
| 426 | } else {\r | |
| 427 | TopOfMemory = MemDetect ();\r | |
| 428 | }\r | |
| 49ba9447 | 429 | \r |
| c7ea55b9 WL |
430 | if (XenLeaf != 0) {\r |
| 431 | DEBUG ((EFI_D_INFO, "Xen was detected\n"));\r | |
| 432 | InitializeXen (XenLeaf);\r | |
| 433 | }\r | |
| eec7d420 | 434 | \r |
| 77ba993c | 435 | ReserveEmuVariableNvStore ();\r |
| 436 | \r | |
| 49ba9447 | 437 | PeiFvInitialization ();\r |
| 438 | \r | |
| 447d2641 WL |
439 | if (XenLeaf != 0) {\r |
| 440 | XenMemMapInitialization ();\r | |
| 441 | } else {\r | |
| 442 | MemMapInitialization (TopOfMemory);\r | |
| 443 | }\r | |
| 49ba9447 | 444 | \r |
| 0e20a186 | 445 | MiscInitialization ();\r |
| 49ba9447 | 446 | \r |
| 9ed65b10 | 447 | BootModeInitialization ();\r |
| 448 | \r | |
| 49ba9447 | 449 | return EFI_SUCCESS;\r |
| 450 | }\r |