[mirror_edk2.git] / PcAtChipsetPkg / Library / AcpiTimerLib / AcpiTimerLib.c

/** @file\r
  ACPI Timer implements one instance of Timer Library.\r
\r
  Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>\r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#include <Base.h>\r
#include <Library/TimerLib.h>\r
#include <Library/BaseLib.h>\r
#include <Library/PcdLib.h>\r
#include <Library/PciLib.h>\r
#include <Library/IoLib.h>\r
#include <Library/DebugLib.h>\r
#include <IndustryStandard/Acpi.h>\r
\r
GUID mFrequencyHobGuid = { 0x3fca54f6, 0xe1a2, 0x4b20, { 0xbe, 0x76, 0x92, 0x6b, 0x4b, 0x48, 0xbf, 0xaa }};\r
\r
/**\r
  Internal function to retrieves the 64-bit frequency in Hz.\r
\r
  Internal function to retrieves the 64-bit frequency in Hz.\r
\r
  @return The frequency in Hz.\r
\r
**/\r
UINT64\r
InternalGetPerformanceCounterFrequency (\r
  VOID\r
  );\r
\r
/**\r
  The constructor function enables ACPI IO space.\r
\r
  If ACPI I/O space not enabled, this function will enable it.\r
  It will always return RETURN_SUCCESS.\r
\r
  @retval EFI_SUCCESS   The constructor always returns RETURN_SUCCESS.\r
\r
**/\r
RETURN_STATUS\r
EFIAPI\r
AcpiTimerLibConstructor (\r
  VOID\r
  )\r
{\r
  UINTN   Bus;\r
  UINTN   Device;\r
  UINTN   Function;\r
  UINTN   EnableRegister;\r
  UINT8   EnableMask;\r
\r
  //\r
  // ASSERT for the invalid PCD values. They must be configured to the real value.\r
  //\r
  ASSERT (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) != 0xFFFF);\r
  ASSERT (PcdGet16 (PcdAcpiIoPortBaseAddress)      != 0xFFFF);\r
\r
  //\r
  // If the register offset to the BAR for the ACPI I/O Port Base Address is 0x0000, then\r
  // no PCI register programming is required to enable access to the the ACPI registers\r
  // specified by PcdAcpiIoPortBaseAddress\r
  //\r
  if (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) == 0x0000) {\r
    return RETURN_SUCCESS;\r
  }\r
\r
  //\r
  // ASSERT for the invalid PCD values. They must be configured to the real value.\r
  //\r
  ASSERT (PcdGet8  (PcdAcpiIoPciDeviceNumber)   != 0xFF);\r
  ASSERT (PcdGet8  (PcdAcpiIoPciFunctionNumber) != 0xFF);\r
  ASSERT (PcdGet16 (PcdAcpiIoPciEnableRegisterOffset) != 0xFFFF);\r
\r
  //\r
  // Retrieve the PCD values for the PCI configuration space required to program the ACPI I/O Port Base Address\r
  //\r
  Bus            = PcdGet8  (PcdAcpiIoPciBusNumber);\r
  Device         = PcdGet8  (PcdAcpiIoPciDeviceNumber);\r
  Function       = PcdGet8  (PcdAcpiIoPciFunctionNumber);\r
  EnableRegister = PcdGet16 (PcdAcpiIoPciEnableRegisterOffset);\r
  EnableMask     = PcdGet8  (PcdAcpiIoBarEnableMask);\r
\r
  //\r
  // If ACPI I/O space is not enabled yet, program ACPI I/O base address and enable it.\r
  //\r
  if ((PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, EnableRegister)) & EnableMask) != EnableMask) {\r
    PciWrite16 (\r
      PCI_LIB_ADDRESS (Bus, Device, Function, PcdGet16 (PcdAcpiIoPciBarRegisterOffset)),\r
      PcdGet16 (PcdAcpiIoPortBaseAddress)\r
      );\r
    PciOr8 (\r
      PCI_LIB_ADDRESS (Bus, Device, Function, EnableRegister),\r
      EnableMask\r
      );\r
  }\r
\r
  return RETURN_SUCCESS;\r
}\r
\r
/**\r
  Internal function to retrieve the ACPI I/O Port Base Address.\r
\r
  Internal function to retrieve the ACPI I/O Port Base Address.\r
\r
  @return The 16-bit ACPI I/O Port Base Address.\r
\r
**/\r
UINT16\r
InternalAcpiGetAcpiTimerIoPort (\r
  VOID\r
  )\r
{\r
  UINT16  Port;\r
\r
  Port = PcdGet16 (PcdAcpiIoPortBaseAddress);\r
\r
  //\r
  // If the register offset to the BAR for the ACPI I/O Port Base Address is not 0x0000, then\r
  // read the PCI register for the ACPI BAR value in case the BAR has been programmed to a\r
  // value other than PcdAcpiIoPortBaseAddress\r
  //\r
  if (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) != 0x0000) {\r
    Port = PciRead16 (PCI_LIB_ADDRESS (\r
                        PcdGet8  (PcdAcpiIoPciBusNumber),\r
                        PcdGet8  (PcdAcpiIoPciDeviceNumber),\r
                        PcdGet8  (PcdAcpiIoPciFunctionNumber),\r
                        PcdGet16 (PcdAcpiIoPciBarRegisterOffset)\r
                        ));\r
  }\r
\r
  return (Port & PcdGet16 (PcdAcpiIoPortBaseAddressMask)) + PcdGet16 (PcdAcpiPm1TmrOffset);\r
}\r
\r
/**\r
  Stalls the CPU for at least the given number of ticks.\r
\r
  Stalls the CPU for at least the given number of ticks. It's invoked by\r
  MicroSecondDelay() and NanoSecondDelay().\r
\r
  @param  Delay     A period of time to delay in ticks.\r
\r
**/\r
VOID\r
InternalAcpiDelay (\r
  IN UINT32  Delay\r
  )\r
{\r
  UINT16   Port;\r
  UINT32   Ticks;\r
  UINT32   Times;\r
\r
  Port   = InternalAcpiGetAcpiTimerIoPort ();\r
  Times  = Delay >> 22;\r
  Delay &= BIT22 - 1;\r
  do {\r
    //\r
    // The target timer count is calculated here\r
    //\r
    Ticks = IoBitFieldRead32 (Port, 0, 23) + Delay;\r
    Delay = BIT22;\r
    //\r
    // Wait until time out\r
    // Delay >= 2^23 could not be handled by this function\r
    // Timer wrap-arounds are handled correctly by this function\r
    //\r
    while (((Ticks - IoBitFieldRead32 (Port, 0, 23)) & BIT23) == 0) {\r
      CpuPause ();\r
    }\r
  } while (Times-- > 0);\r
}\r
\r
/**\r
  Stalls the CPU for at least the given number of microseconds.\r
\r
  Stalls the CPU for the number of microseconds specified by MicroSeconds.\r
\r
  @param  MicroSeconds  The minimum number of microseconds to delay.\r
\r
  @return MicroSeconds\r
\r
**/\r
UINTN\r
EFIAPI\r
MicroSecondDelay (\r
  IN UINTN  MicroSeconds\r
  )\r
{\r
  InternalAcpiDelay (\r
    (UINT32)DivU64x32 (\r
              MultU64x32 (\r
                MicroSeconds,\r
                ACPI_TIMER_FREQUENCY\r
                ),\r
              1000000u\r
              )\r
    );\r
  return MicroSeconds;\r
}\r
\r
/**\r
  Stalls the CPU for at least the given number of nanoseconds.\r
\r
  Stalls the CPU for the number of nanoseconds specified by NanoSeconds.\r
\r
  @param  NanoSeconds The minimum number of nanoseconds to delay.\r
\r
  @return NanoSeconds\r
\r
**/\r
UINTN\r
EFIAPI\r
NanoSecondDelay (\r
  IN UINTN  NanoSeconds\r
  )\r
{\r
  InternalAcpiDelay (\r
    (UINT32)DivU64x32 (\r
              MultU64x32 (\r
                NanoSeconds,\r
                ACPI_TIMER_FREQUENCY\r
                ),\r
              1000000000u\r
              )\r
    );\r
  return NanoSeconds;\r
}\r
\r
/**\r
  Retrieves the current value of a 64-bit free running performance counter.\r
\r
  Retrieves the current value of a 64-bit free running performance counter. The\r
  counter can either count up by 1 or count down by 1. If the physical\r
  performance counter counts by a larger increment, then the counter values\r
  must be translated. The properties of the counter can be retrieved from\r
  GetPerformanceCounterProperties().\r
\r
  @return The current value of the free running performance counter.\r
\r
**/\r
UINT64\r
EFIAPI\r
GetPerformanceCounter (\r
  VOID\r
  )\r
{\r
  return AsmReadTsc ();\r
}\r
\r
/**\r
  Retrieves the 64-bit frequency in Hz and the range of performance counter\r
  values.\r
\r
  If StartValue is not NULL, then the value that the performance counter starts\r
  with immediately after is it rolls over is returned in StartValue. If\r
  EndValue is not NULL, then the value that the performance counter end with\r
  immediately before it rolls over is returned in EndValue. The 64-bit\r
  frequency of the performance counter in Hz is always returned. If StartValue\r
  is less than EndValue, then the performance counter counts up. If StartValue\r
  is greater than EndValue, then the performance counter counts down. For\r
  example, a 64-bit free running counter that counts up would have a StartValue\r
  of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter\r
  that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.\r
\r
  @param  StartValue  The value the performance counter starts with when it\r
                      rolls over.\r
  @param  EndValue    The value that the performance counter ends with before\r
                      it rolls over.\r
\r
  @return The frequency in Hz.\r
\r
**/\r
UINT64\r
EFIAPI\r
GetPerformanceCounterProperties (\r
  OUT UINT64  *StartValue,  OPTIONAL\r
  OUT UINT64  *EndValue     OPTIONAL\r
  )\r
{\r
  if (StartValue != NULL) {\r
    *StartValue = 0;\r
  }\r
\r
  if (EndValue != NULL) {\r
    *EndValue = 0xffffffffffffffffULL;\r
  }\r
  return InternalGetPerformanceCounterFrequency ();\r
}\r
\r
/**\r
  Converts elapsed ticks of performance counter to time in nanoseconds.\r
\r
  This function converts the elapsed ticks of running performance counter to\r
  time value in unit of nanoseconds.\r
\r
  @param  Ticks     The number of elapsed ticks of running performance counter.\r
\r
  @return The elapsed time in nanoseconds.\r
\r
**/\r
UINT64\r
EFIAPI\r
GetTimeInNanoSecond (\r
  IN UINT64  Ticks\r
  )\r
{\r
  UINT64  Frequency;\r
  UINT64  NanoSeconds;\r
  UINT64  Remainder;\r
  INTN    Shift;\r
\r
  Frequency = GetPerformanceCounterProperties (NULL, NULL);\r
\r
  //\r
  //          Ticks\r
  // Time = --------- x 1,000,000,000\r
  //        Frequency\r
  //\r
  NanoSeconds = MultU64x32 (DivU64x64Remainder (Ticks, Frequency, &Remainder), 1000000000u);\r
\r
  //\r
  // Ensure (Remainder * 1,000,000,000) will not overflow 64-bit.\r
  // Since 2^29 < 1,000,000,000 = 0x3B9ACA00 < 2^30, Remainder should < 2^(64-30) = 2^34,\r
  // i.e. highest bit set in Remainder should <= 33.\r
  //\r
  Shift = MAX (0, HighBitSet64 (Remainder) - 33);\r
  Remainder = RShiftU64 (Remainder, (UINTN) Shift);\r
  Frequency = RShiftU64 (Frequency, (UINTN) Shift);\r
  NanoSeconds += DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u), Frequency, NULL);\r
\r
  return NanoSeconds;\r
}\r
\r
/**\r
  Calculate TSC frequency.\r
\r
  The TSC counting frequency is determined by comparing how far it counts\r
  during a 101.4 us period as determined by the ACPI timer.\r
  The ACPI timer is used because it counts at a known frequency.\r
  The TSC is sampled, followed by waiting 363 counts of the ACPI timer,\r
  or 101.4 us. The TSC is then sampled again. The difference multiplied by\r
  9861 is the TSC frequency. There will be a small error because of the\r
  overhead of reading the ACPI timer. An attempt is made to determine and\r
  compensate for this error.\r
\r
  @return The number of TSC counts per second.\r
\r
**/\r
UINT64\r
InternalCalculateTscFrequency (\r
  VOID\r
  )\r
{\r
  UINT64      StartTSC;\r
  UINT64      EndTSC;\r
  UINT16      TimerAddr;\r
  UINT32      Ticks;\r
  UINT64      TscFrequency;\r
  BOOLEAN     InterruptState;\r
\r
  InterruptState = SaveAndDisableInterrupts ();\r
\r
  TimerAddr = InternalAcpiGetAcpiTimerIoPort ();\r
  //\r
  // Compute the number of ticks to wait to measure TSC frequency.\r
  // Use 363 * 9861 = 3579543 Hz which is within 2 Hz of ACPI_TIMER_FREQUENCY.\r
  // 363 counts is a calibration time of 101.4 uS.\r
  //\r
  Ticks = IoBitFieldRead32 (TimerAddr, 0, 23) + 363;\r
\r
  StartTSC = AsmReadTsc ();                                         // Get base value for the TSC\r
  //\r
  // Wait until the ACPI timer has counted 101.4 us.\r
  // Timer wrap-arounds are handled correctly by this function.\r
  // When the current ACPI timer value is greater than 'Ticks',\r
  // the while loop will exit.\r
  //\r
  while (((Ticks - IoBitFieldRead32 (TimerAddr, 0, 23)) & BIT23) == 0) {\r
    CpuPause();\r
  }\r
  EndTSC = AsmReadTsc ();                                           // TSC value 101.4 us later\r
\r
  TscFrequency = MultU64x32 (\r
                   (EndTSC - StartTSC),                             // Number of TSC counts in 101.4 us\r
                   9861                                             // Number of 101.4 us in a second\r
                   );\r
\r
  SetInterruptState (InterruptState);\r
\r
  return TscFrequency;\r
}\r
\r
Commit	Line	Data
83d1ffb9 LG	1	/** @file\r
	2	ACPI Timer implements one instance of Timer Library.\r
	3	\r
fd501a79	4	Copyright (c) 2013 - 2018, Intel Corporation. All rights reserved.<BR>\r
83d1ffb9 LG	5	This program and the accompanying materials\r
	6	are licensed and made available under the terms and conditions of the BSD License\r
	7	which accompanies this distribution. The full text of the license may be found at\r
	8	http://opensource.org/licenses/bsd-license.php\r
	9	\r
	10	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	11	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	12	\r
	13	**/\r
	14	\r
	15	#include <Base.h>\r
	16	#include <Library/TimerLib.h>\r
	17	#include <Library/BaseLib.h>\r
	18	#include <Library/PcdLib.h>\r
	19	#include <Library/PciLib.h>\r
	20	#include <Library/IoLib.h>\r
	21	#include <Library/DebugLib.h>\r
	22	#include <IndustryStandard/Acpi.h>\r
	23	\r
fd501a79 LG	24	GUID mFrequencyHobGuid = { 0x3fca54f6, 0xe1a2, 0x4b20, { 0xbe, 0x76, 0x92, 0x6b, 0x4b, 0x48, 0xbf, 0xaa }};\r
fd501a79 LG	25	\r
83d1ffb9 LG	26	/**\r
	27	Internal function to retrieves the 64-bit frequency in Hz.\r
	28	\r
	29	Internal function to retrieves the 64-bit frequency in Hz.\r
	30	\r
	31	@return The frequency in Hz.\r
	32	\r
	33	**/\r
	34	UINT64\r
	35	InternalGetPerformanceCounterFrequency (\r
	36	VOID\r
	37	);\r
	38	\r
	39	/**\r
	40	The constructor function enables ACPI IO space.\r
	41	\r
	42	If ACPI I/O space not enabled, this function will enable it.\r
	43	It will always return RETURN_SUCCESS.\r
	44	\r
	45	@retval EFI_SUCCESS The constructor always returns RETURN_SUCCESS.\r
	46	\r
	47	**/\r
	48	RETURN_STATUS\r
	49	EFIAPI\r
	50	AcpiTimerLibConstructor (\r
	51	VOID\r
	52	)\r
	53	{\r
	54	UINTN Bus;\r
	55	UINTN Device;\r
	56	UINTN Function;\r
	57	UINTN EnableRegister;\r
	58	UINT8 EnableMask;\r
	59	\r
	60	//\r
5a702acd	61	// ASSERT for the invalid PCD values. They must be configured to the real value.\r
83d1ffb9 LG	62	//\r
	63	ASSERT (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) != 0xFFFF);\r
	64	ASSERT (PcdGet16 (PcdAcpiIoPortBaseAddress) != 0xFFFF);\r
	65	\r
	66	//\r
5a702acd	67	// If the register offset to the BAR for the ACPI I/O Port Base Address is 0x0000, then\r
83d1ffb9 LG	68	// no PCI register programming is required to enable access to the the ACPI registers\r
	69	// specified by PcdAcpiIoPortBaseAddress\r
	70	//\r
	71	if (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) == 0x0000) {\r
	72	return RETURN_SUCCESS;\r
	73	}\r
	74	\r
	75	//\r
5a702acd	76	// ASSERT for the invalid PCD values. They must be configured to the real value.\r
83d1ffb9 LG	77	//\r
	78	ASSERT (PcdGet8 (PcdAcpiIoPciDeviceNumber) != 0xFF);\r
	79	ASSERT (PcdGet8 (PcdAcpiIoPciFunctionNumber) != 0xFF);\r
	80	ASSERT (PcdGet16 (PcdAcpiIoPciEnableRegisterOffset) != 0xFFFF);\r
	81	\r
	82	//\r
	83	// Retrieve the PCD values for the PCI configuration space required to program the ACPI I/O Port Base Address\r
	84	//\r
	85	Bus = PcdGet8 (PcdAcpiIoPciBusNumber);\r
	86	Device = PcdGet8 (PcdAcpiIoPciDeviceNumber);\r
	87	Function = PcdGet8 (PcdAcpiIoPciFunctionNumber);\r
	88	EnableRegister = PcdGet16 (PcdAcpiIoPciEnableRegisterOffset);\r
	89	EnableMask = PcdGet8 (PcdAcpiIoBarEnableMask);\r
	90	\r
	91	//\r
	92	// If ACPI I/O space is not enabled yet, program ACPI I/O base address and enable it.\r
	93	//\r
dde4aedc	94	if ((PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, EnableRegister)) & EnableMask) != EnableMask) {\r
83d1ffb9 LG	95	PciWrite16 (\r
	96	PCI_LIB_ADDRESS (Bus, Device, Function, PcdGet16 (PcdAcpiIoPciBarRegisterOffset)),\r
	97	PcdGet16 (PcdAcpiIoPortBaseAddress)\r
	98	);\r
	99	PciOr8 (\r
	100	PCI_LIB_ADDRESS (Bus, Device, Function, EnableRegister),\r
	101	EnableMask\r
	102	);\r
	103	}\r
5a702acd	104	\r
83d1ffb9 LG	105	return RETURN_SUCCESS;\r
	106	}\r
	107	\r
	108	/**\r
	109	Internal function to retrieve the ACPI I/O Port Base Address.\r
	110	\r
	111	Internal function to retrieve the ACPI I/O Port Base Address.\r
	112	\r
	113	@return The 16-bit ACPI I/O Port Base Address.\r
	114	\r
	115	**/\r
	116	UINT16\r
	117	InternalAcpiGetAcpiTimerIoPort (\r
	118	VOID\r
	119	)\r
	120	{\r
	121	UINT16 Port;\r
5a702acd	122	\r
9ff926d6	123	Port = PcdGet16 (PcdAcpiIoPortBaseAddress);\r
5a702acd	124	\r
83d1ffb9	125	//\r
5a702acd LG	126	// If the register offset to the BAR for the ACPI I/O Port Base Address is not 0x0000, then\r
5a702acd LG	127	// read the PCI register for the ACPI BAR value in case the BAR has been programmed to a\r
83d1ffb9 LG	128	// value other than PcdAcpiIoPortBaseAddress\r
	129	//\r
	130	if (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) != 0x0000) {\r
	131	Port = PciRead16 (PCI_LIB_ADDRESS (\r
5a702acd LG	132	PcdGet8 (PcdAcpiIoPciBusNumber),\r
	133	PcdGet8 (PcdAcpiIoPciDeviceNumber),\r
	134	PcdGet8 (PcdAcpiIoPciFunctionNumber),\r
83d1ffb9 LG	135	PcdGet16 (PcdAcpiIoPciBarRegisterOffset)\r
	136	));\r
	137	}\r
5a702acd	138	\r
9ff926d6	139	return (Port & PcdGet16 (PcdAcpiIoPortBaseAddressMask)) + PcdGet16 (PcdAcpiPm1TmrOffset);\r
83d1ffb9 LG	140	}\r
	141	\r
	142	/**\r
	143	Stalls the CPU for at least the given number of ticks.\r
	144	\r
	145	Stalls the CPU for at least the given number of ticks. It's invoked by\r
	146	MicroSecondDelay() and NanoSecondDelay().\r
	147	\r
	148	@param Delay A period of time to delay in ticks.\r
	149	\r
	150	**/\r
	151	VOID\r
	152	InternalAcpiDelay (\r
	153	IN UINT32 Delay\r
	154	)\r
	155	{\r
	156	UINT16 Port;\r
	157	UINT32 Ticks;\r
	158	UINT32 Times;\r
	159	\r
	160	Port = InternalAcpiGetAcpiTimerIoPort ();\r
	161	Times = Delay >> 22;\r
	162	Delay &= BIT22 - 1;\r
	163	do {\r
	164	//\r
	165	// The target timer count is calculated here\r
	166	//\r
b3b58d4d	167	Ticks = IoBitFieldRead32 (Port, 0, 23) + Delay;\r
83d1ffb9 LG	168	Delay = BIT22;\r
	169	//\r
	170	// Wait until time out\r
	171	// Delay >= 2^23 could not be handled by this function\r
	172	// Timer wrap-arounds are handled correctly by this function\r
	173	//\r
b3b58d4d	174	while (((Ticks - IoBitFieldRead32 (Port, 0, 23)) & BIT23) == 0) {\r
83d1ffb9 LG	175	CpuPause ();\r
	176	}\r
	177	} while (Times-- > 0);\r
	178	}\r
	179	\r
	180	/**\r
	181	Stalls the CPU for at least the given number of microseconds.\r
	182	\r
	183	Stalls the CPU for the number of microseconds specified by MicroSeconds.\r
	184	\r
	185	@param MicroSeconds The minimum number of microseconds to delay.\r
	186	\r
	187	@return MicroSeconds\r
	188	\r
	189	**/\r
	190	UINTN\r
	191	EFIAPI\r
	192	MicroSecondDelay (\r
	193	IN UINTN MicroSeconds\r
	194	)\r
	195	{\r
	196	InternalAcpiDelay (\r
	197	(UINT32)DivU64x32 (\r
	198	MultU64x32 (\r
	199	MicroSeconds,\r
	200	ACPI_TIMER_FREQUENCY\r
	201	),\r
	202	1000000u\r
	203	)\r
	204	);\r
	205	return MicroSeconds;\r
	206	}\r
	207	\r
	208	/**\r
	209	Stalls the CPU for at least the given number of nanoseconds.\r
	210	\r
	211	Stalls the CPU for the number of nanoseconds specified by NanoSeconds.\r
	212	\r
	213	@param NanoSeconds The minimum number of nanoseconds to delay.\r
	214	\r
	215	@return NanoSeconds\r
	216	\r
	217	**/\r
	218	UINTN\r
	219	EFIAPI\r
	220	NanoSecondDelay (\r
	221	IN UINTN NanoSeconds\r
	222	)\r
	223	{\r
	224	InternalAcpiDelay (\r
	225	(UINT32)DivU64x32 (\r
	226	MultU64x32 (\r
	227	NanoSeconds,\r
	228	ACPI_TIMER_FREQUENCY\r
	229	),\r
	230	1000000000u\r
	231	)\r
	232	);\r
	233	return NanoSeconds;\r
	234	}\r
	235	\r
	236	/**\r
	237	Retrieves the current value of a 64-bit free running performance counter.\r
	238	\r
239	Retrieves the current value of a 64-bit free running performance counter. The\r
240	counter can either count up by 1 or count down by 1. If the physical\r
241	performance counter counts by a larger increment, then the counter values\r
242	must be translated. The properties of the counter can be retrieved from\r
243	GetPerformanceCounterProperties().\r
244	\r
245	@return The current value of the free running performance counter.\r
246	\r
247	**/\r
248	UINT64\r
249	EFIAPI\r
250	GetPerformanceCounter (\r
251	VOID\r
252	)\r
253	{\r
254	return AsmReadTsc ();\r
255	}\r
256	\r
257	/**\r
258	Retrieves the 64-bit frequency in Hz and the range of performance counter\r
259	values.\r
260	\r
261	If StartValue is not NULL, then the value that the performance counter starts\r
262	with immediately after is it rolls over is returned in StartValue. If\r
263	EndValue is not NULL, then the value that the performance counter end with\r
264	immediately before it rolls over is returned in EndValue. The 64-bit\r
265	frequency of the performance counter in Hz is always returned. If StartValue\r
266	is less than EndValue, then the performance counter counts up. If StartValue\r
267	is greater than EndValue, then the performance counter counts down. For\r
268	example, a 64-bit free running counter that counts up would have a StartValue\r
269	of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter\r
270	that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.\r
271	\r
272	@param StartValue The value the performance counter starts with when it\r
273	rolls over.\r
274	@param EndValue The value that the performance counter ends with before\r
275	it rolls over.\r
276	\r
277	@return The frequency in Hz.\r
278	\r
279	**/\r
280	UINT64\r
281	EFIAPI\r
282	GetPerformanceCounterProperties (\r
283	OUT UINT64 *StartValue, OPTIONAL\r
284	OUT UINT64 *EndValue OPTIONAL\r
285	)\r
286	{\r
287	if (StartValue != NULL) {\r
288	*StartValue = 0;\r
289	}\r
290	\r
291	if (EndValue != NULL) {\r
292	*EndValue = 0xffffffffffffffffULL;\r
293	}\r
294	return InternalGetPerformanceCounterFrequency ();\r
295	}\r
296	\r
297	/**\r
298	Converts elapsed ticks of performance counter to time in nanoseconds.\r
299	\r
300	This function converts the elapsed ticks of running performance counter to\r
301	time value in unit of nanoseconds.\r
302	\r
303	@param Ticks The number of elapsed ticks of running performance counter.\r
304	\r
305	@return The elapsed time in nanoseconds.\r
306	\r
307	**/\r
308	UINT64\r
309	EFIAPI\r
310	GetTimeInNanoSecond (\r
311	IN UINT64 Ticks\r
312	)\r
313	{\r
314	UINT64 Frequency;\r
315	UINT64 NanoSeconds;\r
316	UINT64 Remainder;\r
317	INTN Shift;\r
318	\r
319	Frequency = GetPerformanceCounterProperties (NULL, NULL);\r
320	\r
321	//\r
322	// Ticks\r
323	// Time = --------- x 1,000,000,000\r
324	// Frequency\r
325	//\r
326	NanoSeconds = MultU64x32 (DivU64x64Remainder (Ticks, Frequency, &Remainder), 1000000000u);\r
327	\r
328	//\r
329	// Ensure (Remainder * 1,000,000,000) will not overflow 64-bit.\r
330	// Since 2^29 < 1,000,000,000 = 0x3B9ACA00 < 2^30, Remainder should < 2^(64-30) = 2^34,\r
331	// i.e. highest bit set in Remainder should <= 33.\r
332	//\r
333	Shift = MAX (0, HighBitSet64 (Remainder) - 33);\r
334	Remainder = RShiftU64 (Remainder, (UINTN) Shift);\r
335	Frequency = RShiftU64 (Frequency, (UINTN) Shift);\r
336	NanoSeconds += DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u), Frequency, NULL);\r
337	\r
338	return NanoSeconds;\r
339	}\r
62b8b5be SZ	340	\r
	341	/**\r
	342	Calculate TSC frequency.\r
	343	\r
	344	The TSC counting frequency is determined by comparing how far it counts\r
a012df5e SZ	345	during a 101.4 us period as determined by the ACPI timer.\r
	346	The ACPI timer is used because it counts at a known frequency.\r
	347	The TSC is sampled, followed by waiting 363 counts of the ACPI timer,\r
	348	or 101.4 us. The TSC is then sampled again. The difference multiplied by\r
	349	9861 is the TSC frequency. There will be a small error because of the\r
	350	overhead of reading the ACPI timer. An attempt is made to determine and\r
	351	compensate for this error.\r
62b8b5be SZ	352	\r
	353	@return The number of TSC counts per second.\r
	354	\r
	355	**/\r
	356	UINT64\r
	357	InternalCalculateTscFrequency (\r
	358	VOID\r
	359	)\r
	360	{\r
	361	UINT64 StartTSC;\r
	362	UINT64 EndTSC;\r
	363	UINT16 TimerAddr;\r
	364	UINT32 Ticks;\r
	365	UINT64 TscFrequency;\r
	366	BOOLEAN InterruptState;\r
	367	\r
	368	InterruptState = SaveAndDisableInterrupts ();\r
	369	\r
	370	TimerAddr = InternalAcpiGetAcpiTimerIoPort ();\r
a012df5e SZ	371	//\r
	372	// Compute the number of ticks to wait to measure TSC frequency.\r
	373	// Use 363 * 9861 = 3579543 Hz which is within 2 Hz of ACPI_TIMER_FREQUENCY.\r
	374	// 363 counts is a calibration time of 101.4 uS.\r
	375	//\r
b3b58d4d	376	Ticks = IoBitFieldRead32 (TimerAddr, 0, 23) + 363;\r
62b8b5be SZ	377	\r
	378	StartTSC = AsmReadTsc (); // Get base value for the TSC\r
	379	//\r
a012df5e	380	// Wait until the ACPI timer has counted 101.4 us.\r
62b8b5be	381	// Timer wrap-arounds are handled correctly by this function.\r
a012df5e SZ	382	// When the current ACPI timer value is greater than 'Ticks',\r
a012df5e SZ	383	// the while loop will exit.\r
62b8b5be	384	//\r
b3b58d4d	385	while (((Ticks - IoBitFieldRead32 (TimerAddr, 0, 23)) & BIT23) == 0) {\r
62b8b5be SZ	386	CpuPause();\r
62b8b5be SZ	387	}\r
a012df5e	388	EndTSC = AsmReadTsc (); // TSC value 101.4 us later\r
62b8b5be SZ	389	\r
62b8b5be SZ	390	TscFrequency = MultU64x32 (\r
a012df5e SZ	391	(EndTSC - StartTSC), // Number of TSC counts in 101.4 us\r
a012df5e SZ	392	9861 // Number of 101.4 us in a second\r
62b8b5be SZ	393	);\r
	394	\r
	395	SetInterruptState (InterruptState);\r
	396	\r
	397	return TscFrequency;\r
	398	}\r
	399	\r