[mirror_edk2.git] / PcAtChipsetPkg / Library / AcpiTimerLib / AcpiTimerLib.c

/** @file\r
  ACPI Timer implements one instance of Timer Library.\r
\r
  Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>\r
  This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#include <Base.h>\r
#include <Library/TimerLib.h>\r
#include <Library/BaseLib.h>\r
#include <Library/PcdLib.h>\r
#include <Library/PciLib.h>\r
#include <Library/IoLib.h>\r
#include <Library/DebugLib.h>\r
#include <IndustryStandard/Acpi.h>\r
\r
/**\r
  Internal function to retrieves the 64-bit frequency in Hz.\r
\r
  Internal function to retrieves the 64-bit frequency in Hz.\r
\r
  @return The frequency in Hz.\r
\r
**/\r
UINT64\r
InternalGetPerformanceCounterFrequency (\r
  VOID\r
  );\r
\r
/**\r
  The constructor function enables ACPI IO space.\r
\r
  If ACPI I/O space not enabled, this function will enable it.\r
  It will always return RETURN_SUCCESS.\r
\r
  @retval EFI_SUCCESS   The constructor always returns RETURN_SUCCESS.\r
\r
**/\r
RETURN_STATUS\r
EFIAPI\r
AcpiTimerLibConstructor (\r
  VOID\r
  )\r
{\r
  UINTN   Bus;\r
  UINTN   Device;\r
  UINTN   Function;\r
  UINTN   EnableRegister;\r
  UINT8   EnableMask;\r
\r
  //\r
  // ASSERT for the invalid PCD values. They must be configured to the real value. \r
  //\r
  ASSERT (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) != 0xFFFF);\r
  ASSERT (PcdGet16 (PcdAcpiIoPortBaseAddress)      != 0xFFFF);\r
\r
  //\r
  // If the register offset to the BAR for the ACPI I/O Port Base Address is 0x0000, then \r
  // no PCI register programming is required to enable access to the the ACPI registers\r
  // specified by PcdAcpiIoPortBaseAddress\r
  //\r
  if (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) == 0x0000) {\r
    return RETURN_SUCCESS;\r
  }\r
\r
  //\r
  // ASSERT for the invalid PCD values. They must be configured to the real value. \r
  //\r
  ASSERT (PcdGet8  (PcdAcpiIoPciDeviceNumber)   != 0xFF);\r
  ASSERT (PcdGet8  (PcdAcpiIoPciFunctionNumber) != 0xFF);\r
  ASSERT (PcdGet16 (PcdAcpiIoPciEnableRegisterOffset) != 0xFFFF);\r
\r
  //\r
  // Retrieve the PCD values for the PCI configuration space required to program the ACPI I/O Port Base Address\r
  //\r
  Bus            = PcdGet8  (PcdAcpiIoPciBusNumber);\r
  Device         = PcdGet8  (PcdAcpiIoPciDeviceNumber);\r
  Function       = PcdGet8  (PcdAcpiIoPciFunctionNumber);\r
  EnableRegister = PcdGet16 (PcdAcpiIoPciEnableRegisterOffset);\r
  EnableMask     = PcdGet8  (PcdAcpiIoBarEnableMask);\r
\r
  //\r
  // If ACPI I/O space is not enabled yet, program ACPI I/O base address and enable it.\r
  //\r
  if ((PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, EnableRegister)) & EnableMask) != EnableMask) {\r
    PciWrite16 (\r
      PCI_LIB_ADDRESS (Bus, Device, Function, PcdGet16 (PcdAcpiIoPciBarRegisterOffset)),\r
      PcdGet16 (PcdAcpiIoPortBaseAddress)\r
      );\r
    PciOr8 (\r
      PCI_LIB_ADDRESS (Bus, Device, Function, EnableRegister),\r
      EnableMask\r
      );\r
  }\r
  \r
  return RETURN_SUCCESS;\r
}\r
\r
/**\r
  Internal function to retrieve the ACPI I/O Port Base Address.\r
\r
  Internal function to retrieve the ACPI I/O Port Base Address.\r
\r
  @return The 16-bit ACPI I/O Port Base Address.\r
\r
**/\r
UINT16\r
InternalAcpiGetAcpiTimerIoPort (\r
  VOID\r
  )\r
{\r
  UINT16  Port;\r
  \r
  Port = PcdGet16 (PcdAcpiIoPortBaseAddress);\r
  \r
  //\r
  // If the register offset to the BAR for the ACPI I/O Port Base Address is not 0x0000, then \r
  // read the PCI register for the ACPI BAR value in case the BAR has been programmed to a \r
  // value other than PcdAcpiIoPortBaseAddress\r
  //\r
  if (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) != 0x0000) {\r
    Port = PciRead16 (PCI_LIB_ADDRESS (\r
                        PcdGet8  (PcdAcpiIoPciBusNumber), \r
                        PcdGet8  (PcdAcpiIoPciDeviceNumber), \r
                        PcdGet8  (PcdAcpiIoPciFunctionNumber), \r
                        PcdGet16 (PcdAcpiIoPciBarRegisterOffset)\r
                        ));\r
  }\r
  \r
  return (Port & PcdGet16 (PcdAcpiIoPortBaseAddressMask)) + PcdGet16 (PcdAcpiPm1TmrOffset);\r
}\r
\r
/**\r
  Stalls the CPU for at least the given number of ticks.\r
\r
  Stalls the CPU for at least the given number of ticks. It's invoked by\r
  MicroSecondDelay() and NanoSecondDelay().\r
\r
  @param  Delay     A period of time to delay in ticks.\r
\r
**/\r
VOID\r
InternalAcpiDelay (\r
  IN UINT32  Delay\r
  )\r
{\r
  UINT16   Port;\r
  UINT32   Ticks;\r
  UINT32   Times;\r
\r
  Port   = InternalAcpiGetAcpiTimerIoPort ();\r
  Times  = Delay >> 22;\r
  Delay &= BIT22 - 1;\r
  do {\r
    //\r
    // The target timer count is calculated here\r
    //\r
    Ticks = IoRead32 (Port) + Delay;\r
    Delay = BIT22;\r
    //\r
    // Wait until time out\r
    // Delay >= 2^23 could not be handled by this function\r
    // Timer wrap-arounds are handled correctly by this function\r
    //\r
    while (((Ticks - IoRead32 (Port)) & BIT23) == 0) {\r
      CpuPause ();\r
    }\r
  } while (Times-- > 0);\r
}\r
\r
/**\r
  Stalls the CPU for at least the given number of microseconds.\r
\r
  Stalls the CPU for the number of microseconds specified by MicroSeconds.\r
\r
  @param  MicroSeconds  The minimum number of microseconds to delay.\r
\r
  @return MicroSeconds\r
\r
**/\r
UINTN\r
EFIAPI\r
MicroSecondDelay (\r
  IN UINTN  MicroSeconds\r
  )\r
{\r
  InternalAcpiDelay (\r
    (UINT32)DivU64x32 (\r
              MultU64x32 (\r
                MicroSeconds,\r
                ACPI_TIMER_FREQUENCY\r
                ),\r
              1000000u\r
              )\r
    );\r
  return MicroSeconds;\r
}\r
\r
/**\r
  Stalls the CPU for at least the given number of nanoseconds.\r
\r
  Stalls the CPU for the number of nanoseconds specified by NanoSeconds.\r
\r
  @param  NanoSeconds The minimum number of nanoseconds to delay.\r
\r
  @return NanoSeconds\r
\r
**/\r
UINTN\r
EFIAPI\r
NanoSecondDelay (\r
  IN UINTN  NanoSeconds\r
  )\r
{\r
  InternalAcpiDelay (\r
    (UINT32)DivU64x32 (\r
              MultU64x32 (\r
                NanoSeconds,\r
                ACPI_TIMER_FREQUENCY\r
                ),\r
              1000000000u\r
              )\r
    );\r
  return NanoSeconds;\r
}\r
\r
/**\r
  Retrieves the current value of a 64-bit free running performance counter.\r
\r
  Retrieves the current value of a 64-bit free running performance counter. The\r
  counter can either count up by 1 or count down by 1. If the physical\r
  performance counter counts by a larger increment, then the counter values\r
  must be translated. The properties of the counter can be retrieved from\r
  GetPerformanceCounterProperties().\r
\r
  @return The current value of the free running performance counter.\r
\r
**/\r
UINT64\r
EFIAPI\r
GetPerformanceCounter (\r
  VOID\r
  )\r
{\r
  return AsmReadTsc ();\r
}\r
\r
/**\r
  Retrieves the 64-bit frequency in Hz and the range of performance counter\r
  values.\r
\r
  If StartValue is not NULL, then the value that the performance counter starts\r
  with immediately after is it rolls over is returned in StartValue. If\r
  EndValue is not NULL, then the value that the performance counter end with\r
  immediately before it rolls over is returned in EndValue. The 64-bit\r
  frequency of the performance counter in Hz is always returned. If StartValue\r
  is less than EndValue, then the performance counter counts up. If StartValue\r
  is greater than EndValue, then the performance counter counts down. For\r
  example, a 64-bit free running counter that counts up would have a StartValue\r
  of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter\r
  that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.\r
\r
  @param  StartValue  The value the performance counter starts with when it\r
                      rolls over.\r
  @param  EndValue    The value that the performance counter ends with before\r
                      it rolls over.\r
\r
  @return The frequency in Hz.\r
\r
**/\r
UINT64\r
EFIAPI\r
GetPerformanceCounterProperties (\r
  OUT UINT64  *StartValue,  OPTIONAL\r
  OUT UINT64  *EndValue     OPTIONAL\r
  )\r
{\r
  if (StartValue != NULL) {\r
    *StartValue = 0;\r
  }\r
\r
  if (EndValue != NULL) {\r
    *EndValue = 0xffffffffffffffffULL;\r
  }\r
  return InternalGetPerformanceCounterFrequency ();\r
}\r
\r
/**\r
  Converts elapsed ticks of performance counter to time in nanoseconds.\r
\r
  This function converts the elapsed ticks of running performance counter to\r
  time value in unit of nanoseconds.\r
\r
  @param  Ticks     The number of elapsed ticks of running performance counter.\r
\r
  @return The elapsed time in nanoseconds.\r
\r
**/\r
UINT64\r
EFIAPI\r
GetTimeInNanoSecond (\r
  IN UINT64  Ticks\r
  )\r
{\r
  UINT64  Frequency;\r
  UINT64  NanoSeconds;\r
  UINT64  Remainder;\r
  INTN    Shift;\r
\r
  Frequency = GetPerformanceCounterProperties (NULL, NULL);\r
\r
  //\r
  //          Ticks\r
  // Time = --------- x 1,000,000,000\r
  //        Frequency\r
  //\r
  NanoSeconds = MultU64x32 (DivU64x64Remainder (Ticks, Frequency, &Remainder), 1000000000u);\r
\r
  //\r
  // Ensure (Remainder * 1,000,000,000) will not overflow 64-bit.\r
  // Since 2^29 < 1,000,000,000 = 0x3B9ACA00 < 2^30, Remainder should < 2^(64-30) = 2^34,\r
  // i.e. highest bit set in Remainder should <= 33.\r
  //\r
  Shift = MAX (0, HighBitSet64 (Remainder) - 33);\r
  Remainder = RShiftU64 (Remainder, (UINTN) Shift);\r
  Frequency = RShiftU64 (Frequency, (UINTN) Shift);\r
  NanoSeconds += DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u), Frequency, NULL);\r
\r
  return NanoSeconds;\r
}\r
\r
/**\r
  Calculate TSC frequency.\r
\r
  The TSC counting frequency is determined by comparing how far it counts\r
  during a 100us period as determined by the ACPI timer. The ACPI timer is\r
  used because it counts at a known frequency.\r
  The TSC is sampled, followed by waiting for ACPI_TIMER_FREQUENCY / 10000\r
  clocks of the ACPI timer, or 100us. The TSC is then sampled again. The\r
  difference multiplied by 10000 is the TSC frequency. There will be a small\r
  error because of the overhead of reading the ACPI timer. An attempt is\r
  made to determine and compensate for this error.\r
\r
  @return The number of TSC counts per second.\r
\r
**/\r
UINT64\r
InternalCalculateTscFrequency (\r
  VOID\r
  )\r
{\r
  UINT64      StartTSC;\r
  UINT64      EndTSC;\r
  UINT16      TimerAddr;\r
  UINT32      Ticks;\r
  UINT64      TscFrequency;\r
  BOOLEAN     InterruptState;\r
\r
  InterruptState = SaveAndDisableInterrupts ();\r
\r
  TimerAddr = InternalAcpiGetAcpiTimerIoPort ();\r
  Ticks = IoRead32 (TimerAddr) + (ACPI_TIMER_FREQUENCY / 10000);    // Set Ticks to 100us in the future\r
\r
  StartTSC = AsmReadTsc ();                                         // Get base value for the TSC\r
  //\r
  // Wait until the ACPI timer has counted 100us.\r
  // Timer wrap-arounds are handled correctly by this function.\r
  // When the current ACPI timer value is greater than 'Ticks', the while loop will exit.\r
  //\r
  while (((Ticks - IoRead32 (TimerAddr)) & BIT23) == 0) {\r
    CpuPause();\r
  }\r
  EndTSC = AsmReadTsc ();                                           // TSC value 100us later\r
\r
  TscFrequency = MultU64x32 (\r
                   (EndTSC - StartTSC),                             // Number of TSC counts in 100us\r
                   10000                                            // Number of 100us in a second\r
                   );\r
\r
  SetInterruptState (InterruptState);\r
\r
  return TscFrequency;\r
}\r
\r
Commit	Line	Data
83d1ffb9 LG	1	/** @file\r
	2	ACPI Timer implements one instance of Timer Library.\r
	3	\r
62b8b5be	4	Copyright (c) 2013 - 2016, Intel Corporation. All rights reserved.<BR>\r
83d1ffb9 LG	5	This program and the accompanying materials\r
	6	are licensed and made available under the terms and conditions of the BSD License\r
	7	which accompanies this distribution. The full text of the license may be found at\r
	8	http://opensource.org/licenses/bsd-license.php\r
	9	\r
	10	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	11	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	12	\r
	13	**/\r
	14	\r
	15	#include <Base.h>\r
	16	#include <Library/TimerLib.h>\r
	17	#include <Library/BaseLib.h>\r
	18	#include <Library/PcdLib.h>\r
	19	#include <Library/PciLib.h>\r
	20	#include <Library/IoLib.h>\r
	21	#include <Library/DebugLib.h>\r
	22	#include <IndustryStandard/Acpi.h>\r
	23	\r
	24	/**\r
	25	Internal function to retrieves the 64-bit frequency in Hz.\r
	26	\r
	27	Internal function to retrieves the 64-bit frequency in Hz.\r
	28	\r
	29	@return The frequency in Hz.\r
	30	\r
	31	**/\r
	32	UINT64\r
	33	InternalGetPerformanceCounterFrequency (\r
	34	VOID\r
	35	);\r
	36	\r
	37	/**\r
	38	The constructor function enables ACPI IO space.\r
	39	\r
	40	If ACPI I/O space not enabled, this function will enable it.\r
	41	It will always return RETURN_SUCCESS.\r
	42	\r
	43	@retval EFI_SUCCESS The constructor always returns RETURN_SUCCESS.\r
	44	\r
	45	**/\r
	46	RETURN_STATUS\r
	47	EFIAPI\r
	48	AcpiTimerLibConstructor (\r
	49	VOID\r
	50	)\r
	51	{\r
	52	UINTN Bus;\r
	53	UINTN Device;\r
	54	UINTN Function;\r
	55	UINTN EnableRegister;\r
	56	UINT8 EnableMask;\r
	57	\r
	58	//\r
	59	// ASSERT for the invalid PCD values. They must be configured to the real value. \r
	60	//\r
	61	ASSERT (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) != 0xFFFF);\r
	62	ASSERT (PcdGet16 (PcdAcpiIoPortBaseAddress) != 0xFFFF);\r
	63	\r
	64	//\r
	65	// If the register offset to the BAR for the ACPI I/O Port Base Address is 0x0000, then \r
	66	// no PCI register programming is required to enable access to the the ACPI registers\r
	67	// specified by PcdAcpiIoPortBaseAddress\r
	68	//\r
69	if (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) == 0x0000) {\r
70	return RETURN_SUCCESS;\r
71	}\r
72	\r
73	//\r
74	// ASSERT for the invalid PCD values. They must be configured to the real value. \r
75	//\r
76	ASSERT (PcdGet8 (PcdAcpiIoPciDeviceNumber) != 0xFF);\r
77	ASSERT (PcdGet8 (PcdAcpiIoPciFunctionNumber) != 0xFF);\r
78	ASSERT (PcdGet16 (PcdAcpiIoPciEnableRegisterOffset) != 0xFFFF);\r
79	\r
80	//\r
81	// Retrieve the PCD values for the PCI configuration space required to program the ACPI I/O Port Base Address\r
82	//\r
83	Bus = PcdGet8 (PcdAcpiIoPciBusNumber);\r
84	Device = PcdGet8 (PcdAcpiIoPciDeviceNumber);\r
85	Function = PcdGet8 (PcdAcpiIoPciFunctionNumber);\r
86	EnableRegister = PcdGet16 (PcdAcpiIoPciEnableRegisterOffset);\r
87	EnableMask = PcdGet8 (PcdAcpiIoBarEnableMask);\r
88	\r
89	//\r
90	// If ACPI I/O space is not enabled yet, program ACPI I/O base address and enable it.\r
91	//\r
dde4aedc	92	if ((PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, EnableRegister)) & EnableMask) != EnableMask) {\r
83d1ffb9 LG	93	PciWrite16 (\r
	94	PCI_LIB_ADDRESS (Bus, Device, Function, PcdGet16 (PcdAcpiIoPciBarRegisterOffset)),\r
	95	PcdGet16 (PcdAcpiIoPortBaseAddress)\r
	96	);\r
	97	PciOr8 (\r
	98	PCI_LIB_ADDRESS (Bus, Device, Function, EnableRegister),\r
	99	EnableMask\r
	100	);\r
	101	}\r
	102	\r
	103	return RETURN_SUCCESS;\r
	104	}\r
	105	\r
	106	/**\r
	107	Internal function to retrieve the ACPI I/O Port Base Address.\r
	108	\r
	109	Internal function to retrieve the ACPI I/O Port Base Address.\r
	110	\r
	111	@return The 16-bit ACPI I/O Port Base Address.\r
	112	\r
	113	**/\r
	114	UINT16\r
	115	InternalAcpiGetAcpiTimerIoPort (\r
	116	VOID\r
	117	)\r
	118	{\r
	119	UINT16 Port;\r
	120	\r
9ff926d6	121	Port = PcdGet16 (PcdAcpiIoPortBaseAddress);\r
83d1ffb9 LG	122	\r
	123	//\r
	124	// If the register offset to the BAR for the ACPI I/O Port Base Address is not 0x0000, then \r
9ff926d6	125	// read the PCI register for the ACPI BAR value in case the BAR has been programmed to a \r
83d1ffb9 LG	126	// value other than PcdAcpiIoPortBaseAddress\r
	127	//\r
	128	if (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) != 0x0000) {\r
	129	Port = PciRead16 (PCI_LIB_ADDRESS (\r
	130	PcdGet8 (PcdAcpiIoPciBusNumber), \r
	131	PcdGet8 (PcdAcpiIoPciDeviceNumber), \r
	132	PcdGet8 (PcdAcpiIoPciFunctionNumber), \r
	133	PcdGet16 (PcdAcpiIoPciBarRegisterOffset)\r
	134	));\r
	135	}\r
	136	\r
9ff926d6	137	return (Port & PcdGet16 (PcdAcpiIoPortBaseAddressMask)) + PcdGet16 (PcdAcpiPm1TmrOffset);\r
83d1ffb9 LG	138	}\r
	139	\r
	140	/**\r
	141	Stalls the CPU for at least the given number of ticks.\r
	142	\r
	143	Stalls the CPU for at least the given number of ticks. It's invoked by\r
	144	MicroSecondDelay() and NanoSecondDelay().\r
	145	\r
	146	@param Delay A period of time to delay in ticks.\r
	147	\r
	148	**/\r
	149	VOID\r
	150	InternalAcpiDelay (\r
	151	IN UINT32 Delay\r
	152	)\r
	153	{\r
	154	UINT16 Port;\r
	155	UINT32 Ticks;\r
	156	UINT32 Times;\r
	157	\r
	158	Port = InternalAcpiGetAcpiTimerIoPort ();\r
	159	Times = Delay >> 22;\r
	160	Delay &= BIT22 - 1;\r
	161	do {\r
	162	//\r
	163	// The target timer count is calculated here\r
	164	//\r
	165	Ticks = IoRead32 (Port) + Delay;\r
	166	Delay = BIT22;\r
	167	//\r
	168	// Wait until time out\r
	169	// Delay >= 2^23 could not be handled by this function\r
	170	// Timer wrap-arounds are handled correctly by this function\r
	171	//\r
	172	while (((Ticks - IoRead32 (Port)) & BIT23) == 0) {\r
	173	CpuPause ();\r
	174	}\r
	175	} while (Times-- > 0);\r
	176	}\r
	177	\r
	178	/**\r
	179	Stalls the CPU for at least the given number of microseconds.\r
	180	\r
	181	Stalls the CPU for the number of microseconds specified by MicroSeconds.\r
	182	\r
	183	@param MicroSeconds The minimum number of microseconds to delay.\r
	184	\r
	185	@return MicroSeconds\r
	186	\r
	187	**/\r
	188	UINTN\r
	189	EFIAPI\r
	190	MicroSecondDelay (\r
	191	IN UINTN MicroSeconds\r
	192	)\r
	193	{\r
	194	InternalAcpiDelay (\r
	195	(UINT32)DivU64x32 (\r
	196	MultU64x32 (\r
	197	MicroSeconds,\r
	198	ACPI_TIMER_FREQUENCY\r
	199	),\r
	200	1000000u\r
	201	)\r
202	);\r
203	return MicroSeconds;\r
204	}\r
205	\r
206	/**\r
207	Stalls the CPU for at least the given number of nanoseconds.\r
208	\r
209	Stalls the CPU for the number of nanoseconds specified by NanoSeconds.\r
210	\r
211	@param NanoSeconds The minimum number of nanoseconds to delay.\r
212	\r
213	@return NanoSeconds\r
214	\r
215	**/\r
216	UINTN\r
217	EFIAPI\r
218	NanoSecondDelay (\r
219	IN UINTN NanoSeconds\r
220	)\r
221	{\r
222	InternalAcpiDelay (\r
223	(UINT32)DivU64x32 (\r
224	MultU64x32 (\r
225	NanoSeconds,\r
226	ACPI_TIMER_FREQUENCY\r
227	),\r
228	1000000000u\r
229	)\r
230	);\r
231	return NanoSeconds;\r
232	}\r
233	\r
234	/**\r
235	Retrieves the current value of a 64-bit free running performance counter.\r
236	\r
237	Retrieves the current value of a 64-bit free running performance counter. The\r
238	counter can either count up by 1 or count down by 1. If the physical\r
239	performance counter counts by a larger increment, then the counter values\r
240	must be translated. The properties of the counter can be retrieved from\r
241	GetPerformanceCounterProperties().\r
242	\r
243	@return The current value of the free running performance counter.\r
244	\r
245	**/\r
246	UINT64\r
247	EFIAPI\r
248	GetPerformanceCounter (\r
249	VOID\r
250	)\r
251	{\r
252	return AsmReadTsc ();\r
253	}\r
254	\r
255	/**\r
256	Retrieves the 64-bit frequency in Hz and the range of performance counter\r
257	values.\r
258	\r
259	If StartValue is not NULL, then the value that the performance counter starts\r
260	with immediately after is it rolls over is returned in StartValue. If\r
261	EndValue is not NULL, then the value that the performance counter end with\r
262	immediately before it rolls over is returned in EndValue. The 64-bit\r
263	frequency of the performance counter in Hz is always returned. If StartValue\r
264	is less than EndValue, then the performance counter counts up. If StartValue\r
265	is greater than EndValue, then the performance counter counts down. For\r
266	example, a 64-bit free running counter that counts up would have a StartValue\r
267	of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter\r
268	that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.\r
269	\r
270	@param StartValue The value the performance counter starts with when it\r
271	rolls over.\r
272	@param EndValue The value that the performance counter ends with before\r
273	it rolls over.\r
274	\r
275	@return The frequency in Hz.\r
276	\r
277	**/\r
278	UINT64\r
279	EFIAPI\r
280	GetPerformanceCounterProperties (\r
281	OUT UINT64 *StartValue, OPTIONAL\r
282	OUT UINT64 *EndValue OPTIONAL\r
283	)\r
284	{\r
285	if (StartValue != NULL) {\r
286	*StartValue = 0;\r
287	}\r
288	\r
289	if (EndValue != NULL) {\r
290	*EndValue = 0xffffffffffffffffULL;\r
291	}\r
292	return InternalGetPerformanceCounterFrequency ();\r
293	}\r
294	\r
295	/**\r
296	Converts elapsed ticks of performance counter to time in nanoseconds.\r
297	\r
298	This function converts the elapsed ticks of running performance counter to\r
299	time value in unit of nanoseconds.\r
300	\r
301	@param Ticks The number of elapsed ticks of running performance counter.\r
302	\r
303	@return The elapsed time in nanoseconds.\r
304	\r
305	**/\r
306	UINT64\r
307	EFIAPI\r
308	GetTimeInNanoSecond (\r
309	IN UINT64 Ticks\r
310	)\r
311	{\r
312	UINT64 Frequency;\r
313	UINT64 NanoSeconds;\r
314	UINT64 Remainder;\r
315	INTN Shift;\r
316	\r
317	Frequency = GetPerformanceCounterProperties (NULL, NULL);\r
318	\r
319	//\r
320	// Ticks\r
321	// Time = --------- x 1,000,000,000\r
322	// Frequency\r
323	//\r
324	NanoSeconds = MultU64x32 (DivU64x64Remainder (Ticks, Frequency, &Remainder), 1000000000u);\r
325	\r
326	//\r
327	// Ensure (Remainder * 1,000,000,000) will not overflow 64-bit.\r
328	// Since 2^29 < 1,000,000,000 = 0x3B9ACA00 < 2^30, Remainder should < 2^(64-30) = 2^34,\r
329	// i.e. highest bit set in Remainder should <= 33.\r
330	//\r
331	Shift = MAX (0, HighBitSet64 (Remainder) - 33);\r
332	Remainder = RShiftU64 (Remainder, (UINTN) Shift);\r
333	Frequency = RShiftU64 (Frequency, (UINTN) Shift);\r
334	NanoSeconds += DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u), Frequency, NULL);\r
335	\r
336	return NanoSeconds;\r
337	}\r
62b8b5be SZ	338	\r
	339	/**\r
	340	Calculate TSC frequency.\r
	341	\r
	342	The TSC counting frequency is determined by comparing how far it counts\r
	343	during a 100us period as determined by the ACPI timer. The ACPI timer is\r
	344	used because it counts at a known frequency.\r
	345	The TSC is sampled, followed by waiting for ACPI_TIMER_FREQUENCY / 10000\r
	346	clocks of the ACPI timer, or 100us. The TSC is then sampled again. The\r
	347	difference multiplied by 10000 is the TSC frequency. There will be a small\r
	348	error because of the overhead of reading the ACPI timer. An attempt is\r
	349	made to determine and compensate for this error.\r
	350	\r
	351	@return The number of TSC counts per second.\r
	352	\r
	353	**/\r
	354	UINT64\r
	355	InternalCalculateTscFrequency (\r
	356	VOID\r
	357	)\r
	358	{\r
	359	UINT64 StartTSC;\r
	360	UINT64 EndTSC;\r
	361	UINT16 TimerAddr;\r
	362	UINT32 Ticks;\r
	363	UINT64 TscFrequency;\r
	364	BOOLEAN InterruptState;\r
	365	\r
	366	InterruptState = SaveAndDisableInterrupts ();\r
	367	\r
	368	TimerAddr = InternalAcpiGetAcpiTimerIoPort ();\r
	369	Ticks = IoRead32 (TimerAddr) + (ACPI_TIMER_FREQUENCY / 10000); // Set Ticks to 100us in the future\r
	370	\r
	371	StartTSC = AsmReadTsc (); // Get base value for the TSC\r
	372	//\r
	373	// Wait until the ACPI timer has counted 100us.\r
	374	// Timer wrap-arounds are handled correctly by this function.\r
	375	// When the current ACPI timer value is greater than 'Ticks', the while loop will exit.\r
	376	//\r
	377	while (((Ticks - IoRead32 (TimerAddr)) & BIT23) == 0) {\r
	378	CpuPause();\r
	379	}\r
	380	EndTSC = AsmReadTsc (); // TSC value 100us later\r
	381	\r
	382	TscFrequency = MultU64x32 (\r
	383	(EndTSC - StartTSC), // Number of TSC counts in 100us\r
	384	10000 // Number of 100us in a second\r
	385	);\r
	386	\r
	387	SetInterruptState (InterruptState);\r
	388	\r
	389	return TscFrequency;\r
	390	}\r
	391	\r