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1 | /** @file\r |
2 | ACPI Timer implements one instance of Timer Library.\r | |
3 | \r | |
4 | Copyright (c) 2013 -2014, Intel Corporation. All rights reserved.<BR>\r | |
5 | This program and the accompanying materials\r | |
6 | are licensed and made available under the terms and conditions of the BSD License\r | |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
13 | **/\r | |
14 | \r | |
15 | #include <Base.h>\r | |
16 | #include <Library/TimerLib.h>\r | |
17 | #include <Library/BaseLib.h>\r | |
18 | #include <Library/PcdLib.h>\r | |
19 | #include <Library/PciLib.h>\r | |
20 | #include <Library/IoLib.h>\r | |
21 | #include <Library/DebugLib.h>\r | |
22 | #include <IndustryStandard/Acpi.h>\r | |
23 | \r | |
24 | /**\r | |
25 | Internal function to retrieves the 64-bit frequency in Hz.\r | |
26 | \r | |
27 | Internal function to retrieves the 64-bit frequency in Hz.\r | |
28 | \r | |
29 | @return The frequency in Hz.\r | |
30 | \r | |
31 | **/\r | |
32 | UINT64\r | |
33 | InternalGetPerformanceCounterFrequency (\r | |
34 | VOID\r | |
35 | );\r | |
36 | \r | |
37 | /**\r | |
38 | The constructor function enables ACPI IO space.\r | |
39 | \r | |
40 | If ACPI I/O space not enabled, this function will enable it.\r | |
41 | It will always return RETURN_SUCCESS.\r | |
42 | \r | |
43 | @retval EFI_SUCCESS The constructor always returns RETURN_SUCCESS.\r | |
44 | \r | |
45 | **/\r | |
46 | RETURN_STATUS\r | |
47 | EFIAPI\r | |
48 | AcpiTimerLibConstructor (\r | |
49 | VOID\r | |
50 | )\r | |
51 | {\r | |
52 | UINTN Bus;\r | |
53 | UINTN Device;\r | |
54 | UINTN Function;\r | |
55 | UINTN EnableRegister;\r | |
56 | UINT8 EnableMask;\r | |
57 | \r | |
58 | //\r | |
59 | // ASSERT for the invalid PCD values. They must be configured to the real value. \r | |
60 | //\r | |
61 | ASSERT (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) != 0xFFFF);\r | |
62 | ASSERT (PcdGet16 (PcdAcpiIoPortBaseAddress) != 0xFFFF);\r | |
63 | \r | |
64 | //\r | |
65 | // If the register offset to the BAR for the ACPI I/O Port Base Address is 0x0000, then \r | |
66 | // no PCI register programming is required to enable access to the the ACPI registers\r | |
67 | // specified by PcdAcpiIoPortBaseAddress\r | |
68 | //\r | |
69 | if (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) == 0x0000) {\r | |
70 | return RETURN_SUCCESS;\r | |
71 | }\r | |
72 | \r | |
73 | //\r | |
74 | // ASSERT for the invalid PCD values. They must be configured to the real value. \r | |
75 | //\r | |
76 | ASSERT (PcdGet8 (PcdAcpiIoPciDeviceNumber) != 0xFF);\r | |
77 | ASSERT (PcdGet8 (PcdAcpiIoPciFunctionNumber) != 0xFF);\r | |
78 | ASSERT (PcdGet16 (PcdAcpiIoPciEnableRegisterOffset) != 0xFFFF);\r | |
79 | \r | |
80 | //\r | |
81 | // Retrieve the PCD values for the PCI configuration space required to program the ACPI I/O Port Base Address\r | |
82 | //\r | |
83 | Bus = PcdGet8 (PcdAcpiIoPciBusNumber);\r | |
84 | Device = PcdGet8 (PcdAcpiIoPciDeviceNumber);\r | |
85 | Function = PcdGet8 (PcdAcpiIoPciFunctionNumber);\r | |
86 | EnableRegister = PcdGet16 (PcdAcpiIoPciEnableRegisterOffset);\r | |
87 | EnableMask = PcdGet8 (PcdAcpiIoBarEnableMask);\r | |
88 | \r | |
89 | //\r | |
90 | // If ACPI I/O space is not enabled yet, program ACPI I/O base address and enable it.\r | |
91 | //\r | |
92 | if ((PciRead8 (PCI_LIB_ADDRESS (Bus, Device, Function, EnableRegister) & EnableMask) != EnableMask)) {\r | |
93 | PciWrite16 (\r | |
94 | PCI_LIB_ADDRESS (Bus, Device, Function, PcdGet16 (PcdAcpiIoPciBarRegisterOffset)),\r | |
95 | PcdGet16 (PcdAcpiIoPortBaseAddress)\r | |
96 | );\r | |
97 | PciOr8 (\r | |
98 | PCI_LIB_ADDRESS (Bus, Device, Function, EnableRegister),\r | |
99 | EnableMask\r | |
100 | );\r | |
101 | }\r | |
102 | \r | |
103 | return RETURN_SUCCESS;\r | |
104 | }\r | |
105 | \r | |
106 | /**\r | |
107 | Internal function to retrieve the ACPI I/O Port Base Address.\r | |
108 | \r | |
109 | Internal function to retrieve the ACPI I/O Port Base Address.\r | |
110 | \r | |
111 | @return The 16-bit ACPI I/O Port Base Address.\r | |
112 | \r | |
113 | **/\r | |
114 | UINT16\r | |
115 | InternalAcpiGetAcpiTimerIoPort (\r | |
116 | VOID\r | |
117 | )\r | |
118 | {\r | |
119 | UINT16 Port;\r | |
120 | \r | |
121 | Port = PcdGet16 (PcdAcpiIoPciBarRegisterOffset);\r | |
122 | \r | |
123 | //\r | |
124 | // If the register offset to the BAR for the ACPI I/O Port Base Address is not 0x0000, then \r | |
125 | // read the PCI register for the APCI BAR value in case the BAR has been programmed to a \r | |
126 | // value other than PcdAcpiIoPortBaseAddress\r | |
127 | //\r | |
128 | if (PcdGet16 (PcdAcpiIoPciBarRegisterOffset) != 0x0000) {\r | |
129 | Port = PciRead16 (PCI_LIB_ADDRESS (\r | |
130 | PcdGet8 (PcdAcpiIoPciBusNumber), \r | |
131 | PcdGet8 (PcdAcpiIoPciDeviceNumber), \r | |
132 | PcdGet8 (PcdAcpiIoPciFunctionNumber), \r | |
133 | PcdGet16 (PcdAcpiIoPciBarRegisterOffset)\r | |
134 | ));\r | |
135 | }\r | |
136 | \r | |
137 | return (Port & ~BIT0) + PcdGet16 (PcdAcpiPm1TmrOffset);\r | |
138 | }\r | |
139 | \r | |
140 | /**\r | |
141 | Stalls the CPU for at least the given number of ticks.\r | |
142 | \r | |
143 | Stalls the CPU for at least the given number of ticks. It's invoked by\r | |
144 | MicroSecondDelay() and NanoSecondDelay().\r | |
145 | \r | |
146 | @param Delay A period of time to delay in ticks.\r | |
147 | \r | |
148 | **/\r | |
149 | VOID\r | |
150 | InternalAcpiDelay (\r | |
151 | IN UINT32 Delay\r | |
152 | )\r | |
153 | {\r | |
154 | UINT16 Port;\r | |
155 | UINT32 Ticks;\r | |
156 | UINT32 Times;\r | |
157 | \r | |
158 | Port = InternalAcpiGetAcpiTimerIoPort ();\r | |
159 | Times = Delay >> 22;\r | |
160 | Delay &= BIT22 - 1;\r | |
161 | do {\r | |
162 | //\r | |
163 | // The target timer count is calculated here\r | |
164 | //\r | |
165 | Ticks = IoRead32 (Port) + Delay;\r | |
166 | Delay = BIT22;\r | |
167 | //\r | |
168 | // Wait until time out\r | |
169 | // Delay >= 2^23 could not be handled by this function\r | |
170 | // Timer wrap-arounds are handled correctly by this function\r | |
171 | //\r | |
172 | while (((Ticks - IoRead32 (Port)) & BIT23) == 0) {\r | |
173 | CpuPause ();\r | |
174 | }\r | |
175 | } while (Times-- > 0);\r | |
176 | }\r | |
177 | \r | |
178 | /**\r | |
179 | Stalls the CPU for at least the given number of microseconds.\r | |
180 | \r | |
181 | Stalls the CPU for the number of microseconds specified by MicroSeconds.\r | |
182 | \r | |
183 | @param MicroSeconds The minimum number of microseconds to delay.\r | |
184 | \r | |
185 | @return MicroSeconds\r | |
186 | \r | |
187 | **/\r | |
188 | UINTN\r | |
189 | EFIAPI\r | |
190 | MicroSecondDelay (\r | |
191 | IN UINTN MicroSeconds\r | |
192 | )\r | |
193 | {\r | |
194 | InternalAcpiDelay (\r | |
195 | (UINT32)DivU64x32 (\r | |
196 | MultU64x32 (\r | |
197 | MicroSeconds,\r | |
198 | ACPI_TIMER_FREQUENCY\r | |
199 | ),\r | |
200 | 1000000u\r | |
201 | )\r | |
202 | );\r | |
203 | return MicroSeconds;\r | |
204 | }\r | |
205 | \r | |
206 | /**\r | |
207 | Stalls the CPU for at least the given number of nanoseconds.\r | |
208 | \r | |
209 | Stalls the CPU for the number of nanoseconds specified by NanoSeconds.\r | |
210 | \r | |
211 | @param NanoSeconds The minimum number of nanoseconds to delay.\r | |
212 | \r | |
213 | @return NanoSeconds\r | |
214 | \r | |
215 | **/\r | |
216 | UINTN\r | |
217 | EFIAPI\r | |
218 | NanoSecondDelay (\r | |
219 | IN UINTN NanoSeconds\r | |
220 | )\r | |
221 | {\r | |
222 | InternalAcpiDelay (\r | |
223 | (UINT32)DivU64x32 (\r | |
224 | MultU64x32 (\r | |
225 | NanoSeconds,\r | |
226 | ACPI_TIMER_FREQUENCY\r | |
227 | ),\r | |
228 | 1000000000u\r | |
229 | )\r | |
230 | );\r | |
231 | return NanoSeconds;\r | |
232 | }\r | |
233 | \r | |
234 | /**\r | |
235 | Retrieves the current value of a 64-bit free running performance counter.\r | |
236 | \r | |
237 | Retrieves the current value of a 64-bit free running performance counter. The\r | |
238 | counter can either count up by 1 or count down by 1. If the physical\r | |
239 | performance counter counts by a larger increment, then the counter values\r | |
240 | must be translated. The properties of the counter can be retrieved from\r | |
241 | GetPerformanceCounterProperties().\r | |
242 | \r | |
243 | @return The current value of the free running performance counter.\r | |
244 | \r | |
245 | **/\r | |
246 | UINT64\r | |
247 | EFIAPI\r | |
248 | GetPerformanceCounter (\r | |
249 | VOID\r | |
250 | )\r | |
251 | {\r | |
252 | return AsmReadTsc ();\r | |
253 | }\r | |
254 | \r | |
255 | /**\r | |
256 | Retrieves the 64-bit frequency in Hz and the range of performance counter\r | |
257 | values.\r | |
258 | \r | |
259 | If StartValue is not NULL, then the value that the performance counter starts\r | |
260 | with immediately after is it rolls over is returned in StartValue. If\r | |
261 | EndValue is not NULL, then the value that the performance counter end with\r | |
262 | immediately before it rolls over is returned in EndValue. The 64-bit\r | |
263 | frequency of the performance counter in Hz is always returned. If StartValue\r | |
264 | is less than EndValue, then the performance counter counts up. If StartValue\r | |
265 | is greater than EndValue, then the performance counter counts down. For\r | |
266 | example, a 64-bit free running counter that counts up would have a StartValue\r | |
267 | of 0 and an EndValue of 0xFFFFFFFFFFFFFFFF. A 24-bit free running counter\r | |
268 | that counts down would have a StartValue of 0xFFFFFF and an EndValue of 0.\r | |
269 | \r | |
270 | @param StartValue The value the performance counter starts with when it\r | |
271 | rolls over.\r | |
272 | @param EndValue The value that the performance counter ends with before\r | |
273 | it rolls over.\r | |
274 | \r | |
275 | @return The frequency in Hz.\r | |
276 | \r | |
277 | **/\r | |
278 | UINT64\r | |
279 | EFIAPI\r | |
280 | GetPerformanceCounterProperties (\r | |
281 | OUT UINT64 *StartValue, OPTIONAL\r | |
282 | OUT UINT64 *EndValue OPTIONAL\r | |
283 | )\r | |
284 | {\r | |
285 | if (StartValue != NULL) {\r | |
286 | *StartValue = 0;\r | |
287 | }\r | |
288 | \r | |
289 | if (EndValue != NULL) {\r | |
290 | *EndValue = 0xffffffffffffffffULL;\r | |
291 | }\r | |
292 | return InternalGetPerformanceCounterFrequency ();\r | |
293 | }\r | |
294 | \r | |
295 | /**\r | |
296 | Converts elapsed ticks of performance counter to time in nanoseconds.\r | |
297 | \r | |
298 | This function converts the elapsed ticks of running performance counter to\r | |
299 | time value in unit of nanoseconds.\r | |
300 | \r | |
301 | @param Ticks The number of elapsed ticks of running performance counter.\r | |
302 | \r | |
303 | @return The elapsed time in nanoseconds.\r | |
304 | \r | |
305 | **/\r | |
306 | UINT64\r | |
307 | EFIAPI\r | |
308 | GetTimeInNanoSecond (\r | |
309 | IN UINT64 Ticks\r | |
310 | )\r | |
311 | {\r | |
312 | UINT64 Frequency;\r | |
313 | UINT64 NanoSeconds;\r | |
314 | UINT64 Remainder;\r | |
315 | INTN Shift;\r | |
316 | \r | |
317 | Frequency = GetPerformanceCounterProperties (NULL, NULL);\r | |
318 | \r | |
319 | //\r | |
320 | // Ticks\r | |
321 | // Time = --------- x 1,000,000,000\r | |
322 | // Frequency\r | |
323 | //\r | |
324 | NanoSeconds = MultU64x32 (DivU64x64Remainder (Ticks, Frequency, &Remainder), 1000000000u);\r | |
325 | \r | |
326 | //\r | |
327 | // Ensure (Remainder * 1,000,000,000) will not overflow 64-bit.\r | |
328 | // Since 2^29 < 1,000,000,000 = 0x3B9ACA00 < 2^30, Remainder should < 2^(64-30) = 2^34,\r | |
329 | // i.e. highest bit set in Remainder should <= 33.\r | |
330 | //\r | |
331 | Shift = MAX (0, HighBitSet64 (Remainder) - 33);\r | |
332 | Remainder = RShiftU64 (Remainder, (UINTN) Shift);\r | |
333 | Frequency = RShiftU64 (Frequency, (UINTN) Shift);\r | |
334 | NanoSeconds += DivU64x64Remainder (MultU64x32 (Remainder, 1000000000u), Frequency, NULL);\r | |
335 | \r | |
336 | return NanoSeconds;\r | |
337 | }\r |