[mirror_edk2.git] / PcAtChipsetPkg / PciHostBridgeDxe / PciHostBridge.c

/** @file\r
  Pci Host Bridge driver: \r
  Provides the basic interfaces to abstract a PCI Host Bridge Resource Allocation\r
\r
  Copyright (c) 2008 - 2009, Intel Corporation<BR> All rights\r
  reserved. This program and the accompanying materials are\r
  licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
  \r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/ \r
\r
#include "PciHostBridge.h"\r
\r
//\r
// Support 64 K IO space\r
//\r
#define RES_IO_BASE   0x1000\r
#define RES_IO_LIMIT  0xFFFF\r
//\r
// Support 4G address space\r
//\r
#define RES_MEM_BASE_1 0xF8000000\r
#define RES_MEM_LIMIT_1 (0xFEC00000 - 1)\r
\r
//\r
// Hard code: Root Bridge Number within the host bridge\r
//            Root Bridge's attribute\r
//            Root Bridge's device path\r
//            Root Bridge's resource appeture\r
//\r
UINTN RootBridgeNumber[1] = { 1 };\r
\r
UINT64 RootBridgeAttribute[1][1] = { EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM };\r
\r
EFI_PCI_ROOT_BRIDGE_DEVICE_PATH mEfiPciRootBridgeDevicePath[1][1] = {\r
  {\r
    ACPI_DEVICE_PATH,\r
    ACPI_DP,\r
    (UINT8) (sizeof(ACPI_HID_DEVICE_PATH)),\r
    (UINT8) ((sizeof(ACPI_HID_DEVICE_PATH)) >> 8),\r
    EISA_PNP_ID(0x0A03),\r
    0,\r
    END_DEVICE_PATH_TYPE,\r
    END_ENTIRE_DEVICE_PATH_SUBTYPE,\r
    END_DEVICE_PATH_LENGTH,\r
    0\r
  }\r
};\r
\r
PCI_ROOT_BRIDGE_RESOURCE_APPETURE  mResAppeture[1][1] = {\r
  {0, 0, 0, 0xffffffff, 0, 1 << 16}\r
};\r
\r
EFI_HANDLE mDriverImageHandle;\r
\r
PCI_HOST_BRIDGE_INSTANCE mPciHostBridgeInstanceTemplate = {\r
  PCI_HOST_BRIDGE_SIGNATURE,  // Signature\r
  NULL,                       // HostBridgeHandle\r
  0,                          // RootBridgeNumber\r
  {NULL, NULL},               // Head\r
  FALSE,                      // ResourceSubiteed\r
  TRUE,                       // CanRestarted\r
  {\r
    NotifyPhase,\r
    GetNextRootBridge,\r
    GetAttributes,\r
    StartBusEnumeration,\r
    SetBusNumbers,\r
    SubmitResources,\r
    GetProposedResources,\r
    PreprocessController\r
  }\r
};\r
\r
//\r
// Implementation\r
//\r
EFI_STATUS\r
EFIAPI\r
InitializePciHostBridge (\r
  IN EFI_HANDLE        ImageHandle,\r
  IN EFI_SYSTEM_TABLE  *SystemTable\r
  )\r
/*++\r
\r
Routine Description:\r
  Entry point of this driver\r
\r
Arguments:\r
\r
    ImageHandle -\r
\r
    SystemTable -\r
    \r
Returns:\r
\r
--*/\r
{\r
  EFI_STATUS                  Status;\r
  UINTN                       Loop1;\r
  UINTN                       Loop2;\r
  PCI_HOST_BRIDGE_INSTANCE    *HostBridge;\r
  PCI_ROOT_BRIDGE_INSTANCE    *PrivateData;\r
  IN EFI_PHYSICAL_ADDRESS     BaseAddress;\r
  IN UINT64                   Length;\r
 \r
  mDriverImageHandle = ImageHandle;\r
  \r
  //\r
  // Create Host Bridge Device Handle\r
  //\r
  for (Loop1 = 0; Loop1 < HOST_BRIDGE_NUMBER; Loop1++) {\r
    HostBridge = AllocateCopyPool (sizeof(PCI_HOST_BRIDGE_INSTANCE), &mPciHostBridgeInstanceTemplate);\r
    if (HostBridge == NULL) {\r
      return EFI_OUT_OF_RESOURCES;\r
    }\r
  \r
    HostBridge->RootBridgeNumber = RootBridgeNumber[Loop1];\r
    InitializeListHead (&HostBridge->Head);\r
\r
    Status = gBS->InstallMultipleProtocolInterfaces (\r
                    &HostBridge->HostBridgeHandle,              \r
                    &gEfiPciHostBridgeResourceAllocationProtocolGuid, &HostBridge->ResAlloc,\r
                    NULL\r
                    );\r
    if (EFI_ERROR (Status)) {\r
      FreePool (HostBridge);\r
      return EFI_DEVICE_ERROR;\r
    }\r
  \r
    //\r
    // Create Root Bridge Device Handle in this Host Bridge\r
    //\r
  \r
    for (Loop2 = 0; Loop2 < HostBridge->RootBridgeNumber; Loop2++) {\r
      PrivateData = AllocateZeroPool (sizeof(PCI_ROOT_BRIDGE_INSTANCE));\r
      if (PrivateData == NULL) {\r
        return EFI_OUT_OF_RESOURCES;\r
      }\r
\r
      PrivateData->Signature = PCI_ROOT_BRIDGE_SIGNATURE;\r
      PrivateData->DevicePath = (EFI_DEVICE_PATH_PROTOCOL *)&mEfiPciRootBridgeDevicePath[Loop1][Loop2];\r
\r
      RootBridgeConstructor (\r
        &PrivateData->Io, \r
        HostBridge->HostBridgeHandle, \r
        RootBridgeAttribute[Loop1][Loop2], \r
        &mResAppeture[Loop1][Loop2]\r
        );\r
    \r
      Status = gBS->InstallMultipleProtocolInterfaces(\r
                      &PrivateData->Handle,              \r
                      &gEfiDevicePathProtocolGuid,      PrivateData->DevicePath,\r
                      &gEfiPciRootBridgeIoProtocolGuid, &PrivateData->Io,\r
                      NULL\r
                      );\r
      if (EFI_ERROR (Status)) {\r
        FreePool(PrivateData);\r
        return EFI_DEVICE_ERROR;\r
      }\r
 \r
      InsertTailList (&HostBridge->Head, &PrivateData->Link);\r
    }\r
  } \r
\r
  Status = gDS->AddIoSpace (\r
                  EfiGcdIoTypeIo, \r
                  RES_IO_BASE, \r
                  RES_IO_LIMIT - RES_IO_BASE + 1\r
                  );\r
  \r
  // PCI memory space from 3.75Gbytes->(4GBytes - BIOSFWH local APIC etc)\r
  Status = gDS->AddMemorySpace (\r
                  EfiGcdMemoryTypeMemoryMappedIo, \r
                  RES_MEM_BASE_1, \r
                  (RES_MEM_LIMIT_1 - RES_MEM_BASE_1 + 1),\r
                  0\r
                  );\r
  \r
  BaseAddress = 0x80000000;\r
  Length      = RES_MEM_BASE_1 - BaseAddress;\r
  Status = gDS->AddMemorySpace (\r
                  EfiGcdMemoryTypeMemoryMappedIo, \r
                  BaseAddress, \r
                  Length,\r
                  0\r
                  );\r
  \r
  return EFI_SUCCESS;\r
}\r
\r
\r
EFI_STATUS\r
EFIAPI\r
NotifyPhase(\r
  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE    Phase\r
  )\r
/*++\r
\r
Routine Description:\r
  Enter a certain phase of the PCI enumeration process\r
\r
Arguments:\r
  This  -- The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance\r
  Phase -- The phase during enumeration\r
    \r
Returns:\r
\r
--*/  \r
{\r
  PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;\r
  PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;\r
  PCI_RESOURCE_TYPE                     Index;\r
  LIST_ENTRY                            *List;\r
  EFI_PHYSICAL_ADDRESS                  BaseAddress;\r
  UINT64                                AddrLen;\r
  UINTN                                 BitsOfAlignment;\r
  EFI_STATUS                            Status;\r
  EFI_STATUS                            ReturnStatus;\r
  \r
  HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r
  \r
  switch (Phase) {\r
\r
  case EfiPciHostBridgeBeginEnumeration:\r
    if (HostBridgeInstance->CanRestarted) {\r
      //\r
      // Reset the Each Root Bridge \r
      //\r
      List = HostBridgeInstance->Head.ForwardLink;\r
  \r
      while (List != &HostBridgeInstance->Head) {\r
        RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
        for (Index = TypeIo; Index < TypeMax; Index++) {\r
          RootBridgeInstance->ResAllocNode[Index].Type      = Index;\r
          RootBridgeInstance->ResAllocNode[Index].Base      = 0;\r
          RootBridgeInstance->ResAllocNode[Index].Length    = 0;\r
          RootBridgeInstance->ResAllocNode[Index].Status    = ResNone;\r
        }\r
          \r
        List = List->ForwardLink;\r
      }\r
        \r
      HostBridgeInstance->ResourceSubmited = FALSE;\r
      HostBridgeInstance->CanRestarted     = TRUE;\r
    } else {\r
      //\r
      // Can not restart\r
      // \r
      return EFI_NOT_READY;\r
    }  \r
    break;\r
\r
  case EfiPciHostBridgeBeginBusAllocation:\r
    //\r
    // No specific action is required here, can perform any chipset specific programing\r
    //\r
    HostBridgeInstance->CanRestarted = FALSE;\r
    return EFI_SUCCESS;\r
    break;\r
\r
  case EfiPciHostBridgeEndBusAllocation:\r
    //\r
    // No specific action is required here, can perform any chipset specific programing\r
    //\r
    //HostBridgeInstance->CanRestarted = FALSE;\r
    return EFI_SUCCESS;\r
    break;\r
\r
  case EfiPciHostBridgeBeginResourceAllocation:\r
    //\r
    // No specific action is required here, can perform any chipset specific programing\r
    //\r
    //HostBridgeInstance->CanRestarted = FALSE;\r
    return EFI_SUCCESS;\r
    break;\r
\r
  case EfiPciHostBridgeAllocateResources:\r
    ReturnStatus = EFI_SUCCESS;\r
    if (HostBridgeInstance->ResourceSubmited) {\r
      //\r
      // Take care of the resource dependencies between the root bridges \r
      //\r
      List = HostBridgeInstance->Head.ForwardLink;\r
\r
      while (List != &HostBridgeInstance->Head) {\r
        RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
        for (Index = TypeIo; Index < TypeBus; Index++) {\r
          if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {\r
                                        \r
            AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;\r
            \r
            //\r
            // Get the number of '1' in Alignment.\r
            //\r
            BitsOfAlignment = HighBitSet64 (RootBridgeInstance->ResAllocNode[Index].Alignment) + 1;\r
                                  \r
            switch (Index) {\r
\r
              case TypeIo:  \r
                //\r
                // It is impossible for this chipset to align 0xFFFF for IO16\r
                // So clear it\r
                //\r
                if (BitsOfAlignment >= 16) {\r
                  BitsOfAlignment = 0;\r
                }\r
                  \r
                Status = gDS->AllocateIoSpace (\r
                                EfiGcdAllocateAnySearchBottomUp, \r
                                EfiGcdIoTypeIo, \r
                                BitsOfAlignment,\r
                                AddrLen,\r
                                &BaseAddress,\r
                                mDriverImageHandle,\r
                                NULL\r
                                );\r
                 \r
                if (!EFI_ERROR (Status)) {\r
                  RootBridgeInstance->ResAllocNode[Index].Base   = (UINTN)BaseAddress;\r
                  RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated; \r
                } else {\r
                  ReturnStatus = Status;  \r
                  if (Status != EFI_OUT_OF_RESOURCES) {\r
                    RootBridgeInstance->ResAllocNode[Index].Length = 0;\r
                  }\r
                }\r
\r
                break;\r
\r
\r
              case TypeMem32:\r
                //\r
                // It is impossible for this chipset to align 0xFFFFFFFF for Mem32\r
                // So clear it \r
                //\r
                  \r
                if (BitsOfAlignment >= 32) {\r
                  BitsOfAlignment = 0;\r
                }\r
                  \r
                Status = gDS->AllocateMemorySpace (\r
                                EfiGcdAllocateAnySearchBottomUp, \r
                                EfiGcdMemoryTypeMemoryMappedIo, \r
                                BitsOfAlignment,\r
                                AddrLen,\r
                                &BaseAddress,\r
                                mDriverImageHandle,\r
                                NULL\r
                                );\r
                  \r
                if (!EFI_ERROR (Status)) {\r
                  // We were able to allocate the PCI memory\r
                  RootBridgeInstance->ResAllocNode[Index].Base   = (UINTN)BaseAddress;\r
                  RootBridgeInstance->ResAllocNode[Index].Status = ResAllocated;\r
                    \r
                } else {\r
                  // Not able to allocate enough PCI memory\r
                  ReturnStatus = Status;  \r
                    \r
                  if (Status != EFI_OUT_OF_RESOURCES) {\r
                    RootBridgeInstance->ResAllocNode[Index].Length = 0;\r
                  } \r
                  ASSERT (FALSE);\r
                }\r
                break;\r
                  \r
              case TypePMem32:                  \r
              case TypeMem64:                  \r
              case TypePMem64:\r
                  ReturnStatus = EFI_ABORTED;\r
                  break;  \r
              default:\r
                ASSERT (FALSE);\r
                break;\r
              }; //end switch\r
          }\r
        }\r
          \r
        List = List->ForwardLink;\r
      }\r
        \r
      return ReturnStatus;\r
\r
    } else {\r
      return EFI_NOT_READY;\r
    }\r
    break;\r
\r
  case EfiPciHostBridgeSetResources:\r
    break;\r
\r
  case EfiPciHostBridgeFreeResources:\r
    ReturnStatus = EFI_SUCCESS;\r
    List = HostBridgeInstance->Head.ForwardLink;\r
    while (List != &HostBridgeInstance->Head) {\r
      RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
      for (Index = TypeIo; Index < TypeBus; Index++) {\r
        if (RootBridgeInstance->ResAllocNode[Index].Status == ResAllocated) {\r
          AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;\r
          BaseAddress = RootBridgeInstance->ResAllocNode[Index].Base;\r
          switch (Index) {\r
\r
          case TypeIo:  \r
            Status = gDS->FreeIoSpace (BaseAddress, AddrLen);                \r
            if (EFI_ERROR (Status)) {\r
              ReturnStatus = Status;\r
            }\r
            break;\r
\r
          case TypeMem32:\r
            Status = gDS->FreeMemorySpace (BaseAddress, AddrLen);\r
            if (EFI_ERROR (Status)) {\r
              ReturnStatus = Status;\r
            }\r
            break;\r
\r
          case TypePMem32:\r
            break;\r
\r
          case TypeMem64:\r
            break;\r
\r
          case TypePMem64:\r
            break; \r
\r
          default:\r
            ASSERT (FALSE);\r
            break;\r
\r
          }; //end switch\r
          RootBridgeInstance->ResAllocNode[Index].Type      = Index;\r
          RootBridgeInstance->ResAllocNode[Index].Base      = 0;\r
          RootBridgeInstance->ResAllocNode[Index].Length    = 0;\r
          RootBridgeInstance->ResAllocNode[Index].Status    = ResNone;\r
        }\r
      }\r
        \r
      List = List->ForwardLink;\r
    }\r
              \r
    HostBridgeInstance->ResourceSubmited = FALSE;\r
    HostBridgeInstance->CanRestarted     = TRUE;      \r
    return ReturnStatus;\r
    break;\r
\r
  case EfiPciHostBridgeEndResourceAllocation:\r
    HostBridgeInstance->CanRestarted = FALSE;\r
    break;\r
\r
  default:\r
    return EFI_INVALID_PARAMETER;\r
  }; // end switch\r
  \r
  return EFI_SUCCESS;  \r
}\r
\r
EFI_STATUS\r
EFIAPI\r
GetNextRootBridge(\r
  IN       EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
  IN OUT   EFI_HANDLE                                       *RootBridgeHandle\r
  )\r
/*++\r
\r
Routine Description:\r
  Return the device handle of the next PCI root bridge that is associated with \r
  this Host Bridge\r
\r
Arguments:\r
  This -- The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r
  RootBridgeHandle -- Returns the device handle of the next PCI Root Bridge. \r
                      On input, it holds the RootBridgeHandle returned by the most \r
                      recent call to GetNextRootBridge().The handle for the first \r
                      PCI Root Bridge is returned if RootBridgeHandle is NULL on input\r
    \r
Returns:\r
\r
--*/  \r
{\r
  BOOLEAN                               NoRootBridge; \r
  LIST_ENTRY                            *List; \r
  PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;\r
  PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;\r
  \r
  NoRootBridge = TRUE;\r
  HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r
  List = HostBridgeInstance->Head.ForwardLink;\r
  \r
  \r
  while (List != &HostBridgeInstance->Head) {\r
    NoRootBridge = FALSE;\r
    RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
    if (*RootBridgeHandle == NULL) {\r
      //\r
      // Return the first Root Bridge Handle of the Host Bridge\r
      //\r
      *RootBridgeHandle = RootBridgeInstance->Handle;\r
      return EFI_SUCCESS;\r
    } else {\r
      if (*RootBridgeHandle == RootBridgeInstance->Handle) {\r
        //\r
        // Get next if have\r
        //\r
        List = List->ForwardLink;\r
        if (List!=&HostBridgeInstance->Head) {\r
          RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
          *RootBridgeHandle = RootBridgeInstance->Handle;\r
          return EFI_SUCCESS;  \r
        } else {\r
          return EFI_NOT_FOUND;\r
        }\r
      }\r
    }\r
      \r
    List = List->ForwardLink;\r
  } //end while\r
  \r
  if (NoRootBridge) {\r
    return EFI_NOT_FOUND;\r
  } else {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
}\r
\r
EFI_STATUS\r
EFIAPI\r
GetAttributes(\r
  IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
  IN  EFI_HANDLE                                       RootBridgeHandle,\r
  OUT UINT64                                           *Attributes\r
  )\r
/*++\r
\r
Routine Description:\r
  Returns the attributes of a PCI Root Bridge.\r
\r
Arguments:\r
  This -- The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r
  RootBridgeHandle -- The device handle of the PCI Root Bridge \r
                      that the caller is interested in\r
  Attribute -- The pointer to attributes of the PCI Root Bridge                    \r
    \r
Returns:\r
\r
--*/    \r
{\r
  LIST_ENTRY                            *List; \r
  PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;\r
  PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;\r
  \r
  if (Attributes == NULL) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
  \r
  HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r
  List = HostBridgeInstance->Head.ForwardLink;\r
  \r
  while (List != &HostBridgeInstance->Head) {\r
    RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
    if (RootBridgeHandle == RootBridgeInstance->Handle) {\r
      *Attributes = RootBridgeInstance->RootBridgeAttrib;\r
      return EFI_SUCCESS;\r
    }\r
    List = List->ForwardLink;\r
  }\r
  \r
  //\r
  // RootBridgeHandle is not an EFI_HANDLE \r
  // that was returned on a previous call to GetNextRootBridge()\r
  //\r
  return EFI_INVALID_PARAMETER;\r
}\r
\r
EFI_STATUS\r
EFIAPI\r
StartBusEnumeration(\r
  IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
  IN  EFI_HANDLE                                       RootBridgeHandle,\r
  OUT VOID                                             **Configuration\r
  )\r
/*++\r
\r
Routine Description:\r
  This is the request from the PCI enumerator to set up \r
  the specified PCI Root Bridge for bus enumeration process. \r
\r
Arguments:\r
  This -- The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r
  RootBridgeHandle -- The PCI Root Bridge to be set up\r
  Configuration -- Pointer to the pointer to the PCI bus resource descriptor\r
    \r
Returns:\r
\r
--*/\r
{\r
  LIST_ENTRY                            *List; \r
  PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;\r
  PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;\r
  VOID                                  *Buffer;\r
  UINT8                                 *Temp;\r
  UINT64                                BusStart;\r
  UINT64                                BusEnd;\r
  \r
  HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r
  List = HostBridgeInstance->Head.ForwardLink;\r
  \r
  while (List != &HostBridgeInstance->Head) {\r
    RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
    if (RootBridgeHandle == RootBridgeInstance->Handle) {\r
      //\r
      // Set up the Root Bridge for Bus Enumeration\r
      //\r
      BusStart = RootBridgeInstance->BusBase;\r
      BusEnd   = RootBridgeInstance->BusLimit;\r
      //\r
      // Program the Hardware(if needed) if error return EFI_DEVICE_ERROR\r
      //\r
      \r
      Buffer = AllocatePool (sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof(EFI_ACPI_END_TAG_DESCRIPTOR));\r
      if (Buffer == NULL) {\r
        return EFI_OUT_OF_RESOURCES;\r
      }\r
      \r
      Temp = (UINT8 *)Buffer;\r
      \r
      ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Desc = 0x8A;\r
      ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->Len  = 0x2B;\r
      ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->ResType = 2;\r
      ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->GenFlag = 0; \r
      ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->SpecificFlag = 0;\r
      ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrSpaceGranularity = 0;\r
      ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMin = BusStart;\r
      ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrRangeMax = 0;\r
      ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrTranslationOffset = 0;       \r
      ((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Temp)->AddrLen = BusEnd - BusStart + 1;\r
      \r
      Temp = Temp + sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);\r
      ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;      \r
      ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;\r
      \r
      *Configuration = Buffer;      \r
      return EFI_SUCCESS;\r
    }\r
    List = List->ForwardLink;\r
  }\r
  \r
  return EFI_INVALID_PARAMETER;\r
}\r
\r
EFI_STATUS\r
EFIAPI\r
SetBusNumbers(\r
  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
  IN EFI_HANDLE                                       RootBridgeHandle,\r
  IN VOID                                             *Configuration\r
  )\r
/*++\r
\r
Routine Description:\r
  This function programs the PCI Root Bridge hardware so that \r
  it decodes the specified PCI bus range\r
\r
Arguments:\r
  This -- The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r
  RootBridgeHandle -- The PCI Root Bridge whose bus range is to be programmed\r
  Configuration -- The pointer to the PCI bus resource descriptor\r
    \r
Returns:\r
\r
--*/    \r
{\r
  LIST_ENTRY                            *List; \r
  PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;\r
  PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;\r
  UINT8                                 *Ptr;\r
  UINTN                                 BusStart;\r
  UINTN                                 BusEnd;\r
  UINTN                                 BusLen;\r
  \r
  if (Configuration == NULL) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
    \r
  Ptr = Configuration;\r
  \r
  //\r
  // Check the Configuration is valid\r
  //\r
  if(*Ptr != ACPI_ADDRESS_SPACE_DESCRIPTOR) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
  \r
  if (((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->ResType != 2) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  Ptr += sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);\r
  if (*Ptr != ACPI_END_TAG_DESCRIPTOR) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
   \r
  HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r
  List = HostBridgeInstance->Head.ForwardLink;\r
  \r
  Ptr = Configuration;\r
  \r
  while (List != &HostBridgeInstance->Head) {\r
    RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
    if (RootBridgeHandle == RootBridgeInstance->Handle) {\r
      BusStart = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrRangeMin;\r
      BusLen = (UINTN)((EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *)Ptr)->AddrLen;\r
      BusEnd = BusStart + BusLen - 1;\r
      \r
      if (BusStart > BusEnd) {\r
        return EFI_INVALID_PARAMETER;\r
      }\r
      \r
      if ((BusStart < RootBridgeInstance->BusBase) || (BusEnd > RootBridgeInstance->BusLimit)) {\r
        return EFI_INVALID_PARAMETER;\r
      }\r
      \r
      //\r
      // Update the Bus Range\r
      //\r
      RootBridgeInstance->ResAllocNode[TypeBus].Base   = BusStart;\r
      RootBridgeInstance->ResAllocNode[TypeBus].Length = BusLen;\r
      RootBridgeInstance->ResAllocNode[TypeBus].Status = ResAllocated;\r
      \r
      //\r
      // Program the Root Bridge Hardware\r
      //\r
       \r
      return EFI_SUCCESS;\r
    }\r
    \r
    List = List->ForwardLink;\r
  }\r
  \r
  return EFI_INVALID_PARAMETER;\r
}\r
\r
\r
EFI_STATUS\r
EFIAPI\r
SubmitResources(\r
  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
  IN EFI_HANDLE                                       RootBridgeHandle,\r
  IN VOID                                             *Configuration\r
  )\r
/*++\r
\r
Routine Description:\r
  Submits the I/O and memory resource requirements for the specified PCI Root Bridge\r
  \r
Arguments:\r
  This -- The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r
  RootBridgeHandle -- The PCI Root Bridge whose I/O and memory resource requirements \r
                      are being submitted\r
  Configuration -- The pointer to the PCI I/O and PCI memory resource descriptor                    \r
Returns:\r
\r
--*/    \r
{\r
  LIST_ENTRY                            *List; \r
  PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;\r
  PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;\r
  UINT8                                 *Temp;\r
  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR     *ptr;\r
  UINT64                                AddrLen;\r
  UINT64                                Alignment;\r
  \r
  //\r
  // Check the input parameter: Configuration\r
  //\r
  if (Configuration == NULL) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
  \r
  HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r
  List = HostBridgeInstance->Head.ForwardLink;\r
  \r
  Temp = (UINT8 *)Configuration;\r
  while ( *Temp == 0x8A) { \r
    Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;\r
  }\r
  if (*Temp != 0x79) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
  \r
  Temp = (UINT8 *)Configuration;\r
  while (List != &HostBridgeInstance->Head) {\r
    RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
    if (RootBridgeHandle == RootBridgeInstance->Handle) {\r
      while ( *Temp == 0x8A) {\r
        ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;\r
\r
        //\r
        // Check Address Length\r
        //\r
        if (ptr->AddrLen > 0xffffffff) {\r
          return EFI_INVALID_PARAMETER;\r
        }\r
\r
        //\r
        // Check address range alignment\r
        //\r
        if (ptr->AddrRangeMax >= 0xffffffff || ptr->AddrRangeMax != (GetPowerOfTwo64 (ptr->AddrRangeMax + 1) - 1)) {\r
          return EFI_INVALID_PARAMETER;\r
        }\r
        \r
        switch (ptr->ResType) {\r
\r
        case 0:\r
            \r
          //\r
          // Check invalid Address Sapce Granularity\r
          //\r
          if (ptr->AddrSpaceGranularity != 32) {\r
            return EFI_INVALID_PARAMETER;\r
          }\r
            \r
          //\r
          // check the memory resource request is supported by PCI root bridge\r
          //\r
          if (RootBridgeInstance->RootBridgeAttrib == EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM &&\r
               ptr->SpecificFlag == 0x06) {\r
            return EFI_INVALID_PARAMETER;\r
          }\r
            \r
          AddrLen = ptr->AddrLen;\r
          Alignment = ptr->AddrRangeMax;\r
          if (ptr->AddrSpaceGranularity == 32) {\r
            if (ptr->SpecificFlag == 0x06) {\r
              //\r
              // Apply from GCD\r
              //\r
              RootBridgeInstance->ResAllocNode[TypePMem32].Status = ResSubmitted;\r
            } else {\r
              RootBridgeInstance->ResAllocNode[TypeMem32].Length = AddrLen;\r
              RootBridgeInstance->ResAllocNode[TypeMem32].Alignment = Alignment;\r
              RootBridgeInstance->ResAllocNode[TypeMem32].Status = ResRequested; \r
              HostBridgeInstance->ResourceSubmited = TRUE;\r
            }\r
          }\r
\r
          if (ptr->AddrSpaceGranularity == 64) {\r
            if (ptr->SpecificFlag == 0x06) {\r
              RootBridgeInstance->ResAllocNode[TypePMem64].Status = ResSubmitted;\r
            } else {\r
              RootBridgeInstance->ResAllocNode[TypeMem64].Status = ResSubmitted;\r
            }\r
          }\r
          break;\r
\r
        case 1:\r
          AddrLen = (UINTN)ptr->AddrLen;\r
          Alignment = (UINTN)ptr->AddrRangeMax;\r
          RootBridgeInstance->ResAllocNode[TypeIo].Length  = AddrLen;\r
          RootBridgeInstance->ResAllocNode[TypeIo].Alignment = Alignment;\r
          RootBridgeInstance->ResAllocNode[TypeIo].Status  = ResRequested;\r
          HostBridgeInstance->ResourceSubmited = TRUE; \r
          break;\r
\r
        default:\r
            break;\r
        };\r
    \r
        Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) ;\r
      } \r
      \r
      return EFI_SUCCESS;\r
    }\r
    \r
    List = List->ForwardLink;\r
  }\r
  \r
  return EFI_INVALID_PARAMETER;\r
}\r
\r
EFI_STATUS\r
EFIAPI\r
GetProposedResources(\r
  IN  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
  IN  EFI_HANDLE                                       RootBridgeHandle,\r
  OUT VOID                                             **Configuration\r
  )\r
/*++\r
\r
Routine Description:\r
  This function returns the proposed resource settings for the specified \r
  PCI Root Bridge\r
\r
Arguments:\r
  This -- The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r
  RootBridgeHandle -- The PCI Root Bridge handle\r
  Configuration -- The pointer to the pointer to the PCI I/O \r
                   and memory resource descriptor\r
    \r
Returns:\r
\r
--*/    \r
{\r
  LIST_ENTRY                            *List; \r
  PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;\r
  PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;\r
  UINTN                                 Index;\r
  UINTN                                 Number; \r
  VOID                                  *Buffer; \r
  UINT8                                 *Temp;\r
  EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR     *ptr;\r
  UINT64                                ResStatus;\r
    \r
  Buffer = NULL;\r
  Number = 0;\r
  //\r
  // Get the Host Bridge Instance from the resource allocation protocol\r
  //\r
  HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r
  List = HostBridgeInstance->Head.ForwardLink;\r
  \r
  //\r
  // Enumerate the root bridges in this host bridge\r
  //\r
  while (List != &HostBridgeInstance->Head) {\r
    RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
    if (RootBridgeHandle == RootBridgeInstance->Handle) {\r
      for (Index = 0; Index < TypeBus; Index ++) {\r
        if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {\r
          Number ++;\r
        }  \r
      }\r
      \r
      if (Number ==  0) {\r
        return EFI_INVALID_PARAMETER;\r
      }\r
\r
      Buffer = AllocateZeroPool (Number * sizeof(EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR) + sizeof(EFI_ACPI_END_TAG_DESCRIPTOR));\r
      if (Buffer == NULL) {\r
        return EFI_OUT_OF_RESOURCES;\r
      }\r
      \r
      Temp = Buffer;\r
      for (Index = 0; Index < TypeBus; Index ++) {\r
        if (RootBridgeInstance->ResAllocNode[Index].Status != ResNone) {\r
          ptr = (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR *) Temp ;\r
          ResStatus = RootBridgeInstance->ResAllocNode[Index].Status;\r
          \r
          switch (Index) {\r
\r
          case TypeIo:\r
            //\r
            // Io\r
            //\r
            ptr->Desc = 0x8A;\r
            ptr->Len  = 0x2B;\r
            ptr->ResType = 1;\r
            ptr->GenFlag = 0; \r
            ptr->SpecificFlag = 0;\r
            ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;\r
            ptr->AddrRangeMax = 0;\r
            ptr->AddrTranslationOffset = \\r
                 (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;\r
            ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;\r
            break;\r
\r
          case TypeMem32:\r
            //\r
            // Memory 32\r
            // \r
            ptr->Desc = 0x8A;\r
            ptr->Len  = 0x2B;\r
            ptr->ResType = 0;\r
            ptr->GenFlag = 0; \r
            ptr->SpecificFlag = 0;\r
            ptr->AddrSpaceGranularity = 32;\r
            ptr->AddrRangeMin = RootBridgeInstance->ResAllocNode[Index].Base;\r
            ptr->AddrRangeMax = 0;\r
            ptr->AddrTranslationOffset = \\r
                 (ResStatus == ResAllocated) ? EFI_RESOURCE_SATISFIED : EFI_RESOURCE_LESS;              \r
            ptr->AddrLen = RootBridgeInstance->ResAllocNode[Index].Length;\r
            break;\r
\r
          case TypePMem32:\r
            //\r
            // Prefetch memory 32\r
            //\r
            ptr->Desc = 0x8A;\r
            ptr->Len  = 0x2B;\r
            ptr->ResType = 0;\r
            ptr->GenFlag = 0; \r
            ptr->SpecificFlag = 6;\r
            ptr->AddrSpaceGranularity = 32;\r
            ptr->AddrRangeMin = 0;\r
            ptr->AddrRangeMax = 0;\r
            ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;       \r
            ptr->AddrLen = 0;\r
            break;\r
\r
          case TypeMem64:\r
            //\r
            // Memory 64\r
            //\r
            ptr->Desc = 0x8A;\r
            ptr->Len  = 0x2B;\r
            ptr->ResType = 0;\r
            ptr->GenFlag = 0; \r
            ptr->SpecificFlag = 0;\r
            ptr->AddrSpaceGranularity = 64;\r
            ptr->AddrRangeMin = 0;\r
            ptr->AddrRangeMax = 0;\r
            ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;       \r
            ptr->AddrLen = 0;\r
            break;\r
\r
          case TypePMem64:\r
            //\r
            // Prefetch memory 64\r
            //\r
            ptr->Desc = 0x8A;\r
            ptr->Len  = 0x2B;\r
            ptr->ResType = 0;\r
            ptr->GenFlag = 0; \r
            ptr->SpecificFlag = 6;\r
            ptr->AddrSpaceGranularity = 64;\r
            ptr->AddrRangeMin = 0;\r
            ptr->AddrRangeMax = 0;\r
            ptr->AddrTranslationOffset = EFI_RESOURCE_NONEXISTENT;       \r
            ptr->AddrLen = 0;\r
            break;\r
          };\r
          \r
          Temp += sizeof (EFI_ACPI_ADDRESS_SPACE_DESCRIPTOR);\r
        }  \r
      }\r
      \r
      ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Desc = 0x79;      \r
      ((EFI_ACPI_END_TAG_DESCRIPTOR *)Temp)->Checksum = 0x0;\r
      \r
      *Configuration = Buffer;      \r
       \r
      return EFI_SUCCESS;\r
    }\r
    \r
    List = List->ForwardLink;\r
  }\r
  \r
  return EFI_INVALID_PARAMETER;\r
}\r
\r
STATIC\r
VOID\r
UpdateRootBridgeAttributes (\r
  IN  PCI_ROOT_BRIDGE_INSTANCE                     *RootBridge,\r
  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS  PciAddress\r
  )\r
{\r
  EFI_STATUS                 Status;\r
  PCI_TYPE01                 PciConfigurationHeader;\r
  UINT64                     Attributes;\r
\r
  //\r
  // Read the PCI Configuration Header for the device\r
  //\r
  Status = RootBridge->Io.Pci.Read (\r
    &RootBridge->Io,\r
    EfiPciWidthUint16,\r
    EFI_PCI_ADDRESS(\r
      PciAddress.Bus,\r
      PciAddress.Device,\r
      PciAddress.Function,\r
      0\r
      ),\r
    sizeof (PciConfigurationHeader) / sizeof (UINT16),\r
    &PciConfigurationHeader\r
    );\r
  if (EFI_ERROR (Status)) {\r
    return;\r
  }\r
\r
  Attributes = RootBridge->Attributes;\r
\r
  //\r
  // Look for devices with the VGA Palette Snoop enabled in the COMMAND register of the PCI Config Header\r
  //\r
  if (PciConfigurationHeader.Hdr.Command & 0x20) {\r
    Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;\r
  }\r
\r
  //\r
  // If the device is a PCI-PCI Bridge, then look at the Subordinate Bus Number\r
  //\r
  if (IS_PCI_BRIDGE(&PciConfigurationHeader)) {\r
    //\r
    // Look at the PPB Configuration for legacy decoding attributes\r
    //\r
    if (PciConfigurationHeader.Bridge.BridgeControl & 0x04) {\r
      Attributes |= EFI_PCI_ATTRIBUTE_ISA_IO;\r
      Attributes |= EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO;\r
    }\r
    if (PciConfigurationHeader.Bridge.BridgeControl & 0x08) {\r
      Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;\r
      Attributes |= EFI_PCI_ATTRIBUTE_VGA_MEMORY;\r
      Attributes |= EFI_PCI_ATTRIBUTE_VGA_IO;\r
    }\r
  } else {\r
    //\r
    // See if the PCI device is an IDE controller\r
    //\r
    if (PciConfigurationHeader.Hdr.ClassCode[2] == 0x01 &&\r
        PciConfigurationHeader.Hdr.ClassCode[1] == 0x01    ) {\r
      if (PciConfigurationHeader.Hdr.ClassCode[0] & 0x80) {\r
        Attributes |= EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO;\r
        Attributes |= EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO;\r
      }\r
      if (PciConfigurationHeader.Hdr.ClassCode[0] & 0x01) {\r
        Attributes |= EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO;\r
      }\r
      if (PciConfigurationHeader.Hdr.ClassCode[0] & 0x04) {\r
        Attributes |= EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO;\r
      }\r
    }\r
\r
    //\r
    // See if the PCI device is a legacy VGA controller\r
    //\r
    if (PciConfigurationHeader.Hdr.ClassCode[2] == 0x00 &&\r
        PciConfigurationHeader.Hdr.ClassCode[1] == 0x01    ) {\r
      Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;\r
      Attributes |= EFI_PCI_ATTRIBUTE_VGA_MEMORY;\r
      Attributes |= EFI_PCI_ATTRIBUTE_VGA_IO;\r
    }\r
\r
    //\r
    // See if the PCI device is a standard VGA controller\r
    //\r
    if (PciConfigurationHeader.Hdr.ClassCode[2] == 0x03 &&\r
        PciConfigurationHeader.Hdr.ClassCode[1] == 0x00    ) {\r
      Attributes |= EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO;\r
      Attributes |= EFI_PCI_ATTRIBUTE_VGA_MEMORY;\r
      Attributes |= EFI_PCI_ATTRIBUTE_VGA_IO;\r
    }\r
  }\r
\r
  RootBridge->Attributes = Attributes;\r
  RootBridge->Supports = Attributes;\r
}\r
\r
EFI_STATUS\r
EFIAPI\r
PreprocessController (\r
  IN  struct _EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  *This,\r
  IN  EFI_HANDLE                                                RootBridgeHandle,\r
  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS               PciAddress,\r
  IN  EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE              Phase\r
  )\r
/*++\r
\r
Routine Description:\r
  This function is called for all the PCI controllers that the PCI \r
  bus driver finds. Can be used to Preprogram the controller.\r
\r
Arguments:\r
  This -- The EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ PROTOCOL instance\r
  RootBridgeHandle -- The PCI Root Bridge handle\r
  PciBusAddress -- Address of the controller on the PCI bus\r
  Phase         -- The Phase during resource allocation\r
    \r
Returns:\r
  EFI_SUCCESS\r
--*/    \r
{\r
  PCI_HOST_BRIDGE_INSTANCE              *HostBridgeInstance;\r
  PCI_ROOT_BRIDGE_INSTANCE              *RootBridgeInstance;\r
  LIST_ENTRY                            *List; \r
\r
  HostBridgeInstance = INSTANCE_FROM_RESOURCE_ALLOCATION_THIS (This);\r
  List = HostBridgeInstance->Head.ForwardLink;\r
\r
  //\r
  // Enumerate the root bridges in this host bridge\r
  //\r
  while (List != &HostBridgeInstance->Head) {\r
    RootBridgeInstance = DRIVER_INSTANCE_FROM_LIST_ENTRY (List);\r
    if (RootBridgeHandle == RootBridgeInstance->Handle) {\r
      UpdateRootBridgeAttributes (\r
        RootBridgeInstance,\r
        PciAddress\r
        );\r
      return EFI_SUCCESS;\r
    }\r
    List = List->ForwardLink;\r
  }\r
\r
  return EFI_INVALID_PARAMETER;\r
}\r