Update the copyright notice format
[mirror_edk2.git] / PcAtChipsetPkg / PciHostBridgeDxe / PciHostBridge.h
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21b404d1 1/** @file\r
2 The Header file of the Pci Host Bridge Driver \r
3\r
95d48e82
HT
4 Copyright (c) 2008 - 2009, Intel Corporation. All rights reserved.<BR>\r
5 This program and the accompanying materials are\r
21b404d1 6 licensed and made available under the terms and conditions of the BSD License\r
7 which accompanies this distribution. The full text of the license may be found at\r
8 http://opensource.org/licenses/bsd-license.php\r
9 \r
10 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
11 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
12\r
13**/ \r
14\r
15#ifndef _PCI_HOST_BRIDGE_H_\r
16#define _PCI_HOST_BRIDGE_H_\r
17\r
18#include <PiDxe.h>\r
19\r
20#include <IndustryStandard/Pci.h>\r
21#include <IndustryStandard/Acpi.h>\r
22\r
23#include <Protocol/PciHostBridgeResourceAllocation.h>\r
24#include <Protocol/PciRootBridgeIo.h>\r
8e9778c9 25#include <Protocol/CpuIo2.h>\r
21b404d1 26#include <Protocol/Metronome.h>\r
27#include <Protocol/DevicePath.h>\r
28\r
29\r
30#include <Library/BaseLib.h>\r
31#include <Library/DebugLib.h>\r
32#include <Library/BaseMemoryLib.h>\r
33#include <Library/MemoryAllocationLib.h>\r
34#include <Library/UefiLib.h>\r
35#include <Library/UefiBootServicesTableLib.h>\r
36#include <Library/DxeServicesTableLib.h>\r
37#include <Library/DevicePathLib.h>\r
38\r
39//\r
40// Hard code the host bridge number in the platform.\r
41// In this chipset, there is only one host bridge.\r
42//\r
43#define HOST_BRIDGE_NUMBER 1\r
44\r
45#define PCI_HOST_BRIDGE_SIGNATURE SIGNATURE_32('e', 'h', 's', 't')\r
46typedef struct {\r
47 UINTN Signature;\r
48 EFI_HANDLE HostBridgeHandle;\r
49 UINTN RootBridgeNumber;\r
50 LIST_ENTRY Head;\r
51 BOOLEAN ResourceSubmited; \r
52 BOOLEAN CanRestarted; \r
53 EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL ResAlloc;\r
54} PCI_HOST_BRIDGE_INSTANCE;\r
55\r
56#define INSTANCE_FROM_RESOURCE_ALLOCATION_THIS(a) \\r
57 CR(a, PCI_HOST_BRIDGE_INSTANCE, ResAlloc, PCI_HOST_BRIDGE_SIGNATURE)\r
58\r
59//\r
60// Driver Entry Point\r
61//\r
62EFI_STATUS\r
63EFIAPI\r
64EfiMain (\r
65 IN EFI_HANDLE ImageHandle,\r
66 IN EFI_SYSTEM_TABLE *SystemTable\r
67 );\r
68 \r
69//\r
70// HostBridge Resource Allocation interface\r
71//\r
72EFI_STATUS\r
73EFIAPI\r
74NotifyPhase(\r
75 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
76 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase\r
77 );\r
78\r
79EFI_STATUS\r
80EFIAPI\r
81GetNextRootBridge(\r
82 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
83 IN OUT EFI_HANDLE *RootBridgeHandle\r
84 );\r
85 \r
86EFI_STATUS\r
87EFIAPI\r
88GetAttributes(\r
89 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
90 IN EFI_HANDLE RootBridgeHandle,\r
91 OUT UINT64 *Attributes\r
92 );\r
93 \r
94EFI_STATUS\r
95EFIAPI\r
96StartBusEnumeration(\r
97 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
98 IN EFI_HANDLE RootBridgeHandle,\r
99 OUT VOID **Configuration\r
100 );\r
101 \r
102EFI_STATUS\r
103EFIAPI\r
104SetBusNumbers(\r
105 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
106 IN EFI_HANDLE RootBridgeHandle,\r
107 IN VOID *Configuration\r
108 );\r
109 \r
110EFI_STATUS\r
111EFIAPI\r
112SubmitResources(\r
113 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
114 IN EFI_HANDLE RootBridgeHandle,\r
115 IN VOID *Configuration\r
116 );\r
117 \r
118EFI_STATUS\r
119EFIAPI\r
120GetProposedResources(\r
121 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
122 IN EFI_HANDLE RootBridgeHandle,\r
123 OUT VOID **Configuration\r
124 );\r
125\r
126EFI_STATUS\r
127EFIAPI\r
128PreprocessController (\r
129 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
130 IN EFI_HANDLE RootBridgeHandle,\r
131 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,\r
132 IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase\r
133 );\r
134\r
135\r
136//\r
137// Define resource status constant \r
138//\r
139#define EFI_RESOURCE_NONEXISTENT 0xFFFFFFFFFFFFFFFFULL\r
140#define EFI_RESOURCE_LESS 0xFFFFFFFFFFFFFFFEULL\r
141\r
142\r
143//\r
144// Driver Instance Data Prototypes\r
145//\r
146\r
147typedef struct {\r
148 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation;\r
149 UINTN NumberOfBytes;\r
150 UINTN NumberOfPages;\r
151 EFI_PHYSICAL_ADDRESS HostAddress;\r
152 EFI_PHYSICAL_ADDRESS MappedHostAddress;\r
153} MAP_INFO;\r
154\r
155typedef struct {\r
156 ACPI_HID_DEVICE_PATH AcpiDevicePath;\r
157 EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
158} EFI_PCI_ROOT_BRIDGE_DEVICE_PATH;\r
159\r
160typedef struct {\r
161 UINT64 BusBase;\r
162 UINT64 BusLimit; \r
163 \r
164 UINT64 MemBase; \r
165 UINT64 MemLimit; \r
166 \r
167 UINT64 IoBase; \r
168 UINT64 IoLimit; \r
169} PCI_ROOT_BRIDGE_RESOURCE_APPETURE;\r
170\r
171typedef enum {\r
172 TypeIo = 0,\r
173 TypeMem32,\r
174 TypePMem32,\r
175 TypeMem64,\r
176 TypePMem64,\r
177 TypeBus,\r
178 TypeMax\r
179} PCI_RESOURCE_TYPE;\r
180\r
181typedef enum {\r
182 ResNone = 0,\r
183 ResSubmitted,\r
184 ResRequested,\r
185 ResAllocated,\r
186 ResStatusMax\r
187} RES_STATUS;\r
188\r
189typedef struct {\r
190 PCI_RESOURCE_TYPE Type;\r
191 UINT64 Base;\r
192 UINT64 Length;\r
193 UINT64 Alignment;\r
194 RES_STATUS Status;\r
195} PCI_RES_NODE;\r
196\r
197#define PCI_ROOT_BRIDGE_SIGNATURE SIGNATURE_32('e', '2', 'p', 'b')\r
198\r
199typedef struct {\r
200 UINT32 Signature;\r
201 LIST_ENTRY Link;\r
202 EFI_HANDLE Handle;\r
203 UINT64 RootBridgeAttrib;\r
204 UINT64 Attributes;\r
205 UINT64 Supports;\r
206 \r
207 //\r
208 // Specific for this memory controller: Bus, I/O, Mem\r
209 //\r
210 PCI_RES_NODE ResAllocNode[6];\r
211 \r
212 //\r
213 // Addressing for Memory and I/O and Bus arrange\r
214 //\r
215 UINT64 BusBase;\r
216 UINT64 MemBase; \r
217 UINT64 IoBase; \r
218 UINT64 BusLimit; \r
219 UINT64 MemLimit; \r
220 UINT64 IoLimit; \r
221\r
222 EFI_LOCK PciLock;\r
223 UINTN PciAddress;\r
224 UINTN PciData;\r
225 \r
226 EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
227 EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL Io;\r
228\r
229} PCI_ROOT_BRIDGE_INSTANCE;\r
230\r
231\r
232//\r
233// Driver Instance Data Macros\r
234//\r
235#define DRIVER_INSTANCE_FROM_PCI_ROOT_BRIDGE_IO_THIS(a) \\r
236 CR(a, PCI_ROOT_BRIDGE_INSTANCE, Io, PCI_ROOT_BRIDGE_SIGNATURE)\r
237\r
238\r
239#define DRIVER_INSTANCE_FROM_LIST_ENTRY(a) \\r
240 CR(a, PCI_ROOT_BRIDGE_INSTANCE, Link, PCI_ROOT_BRIDGE_SIGNATURE)\r
241\r
242\r
243EFI_STATUS\r
244RootBridgeConstructor (\r
245 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *Protocol,\r
246 IN EFI_HANDLE HostBridgeHandle,\r
247 IN UINT64 Attri,\r
248 IN PCI_ROOT_BRIDGE_RESOURCE_APPETURE *ResAppeture\r
249 );\r
250\r
251#endif\r