projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 1fd376d9 | 1 | ;------------------------------------------------------------------------------\r |
| 2 | ;\r | |
| 3 | ; Copyright (c) 2006 - 2012, Intel Corporation. All rights reserved.<BR>\r | |
| 078153d6 LE |
4 | ;\r |
| 5 | ; This program and the accompanying materials are licensed and made available\r | |
| 6 | ; under the terms and conditions of the BSD License which accompanies this\r | |
| 7 | ; distribution. The full text of the license may be found at\r | |
| 1fd376d9 | 8 | ; http://opensource.org/licenses/bsd-license.php.\r |
| 9 | ;\r | |
| 10 | ; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
| 11 | ; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
| 12 | ;\r | |
| 13 | ;------------------------------------------------------------------------------\r | |
| 14 | \r | |
| 15 | .code\r | |
| 16 | \r | |
| 17 | ;------------------------------------------------------------------------------\r | |
| 18 | ; VOID\r | |
| 19 | ; EFIAPI\r | |
| 20 | ; IoReadFifo8 (\r | |
| 21 | ; IN UINTN Port, // rcx\r | |
| 22 | ; IN UINTN Size, // rdx\r | |
| 23 | ; IN VOID *Buffer // r8\r | |
| 24 | ; );\r | |
| 25 | ;------------------------------------------------------------------------------\r | |
| 26 | IoReadFifo8 PROC\r | |
| 27 | cld\r | |
| 28 | xchg rcx, rdx\r | |
| 29 | xchg rdi, r8 ; rdi: buffer address; r8: save rdi\r | |
| 30 | rep insb\r | |
| 31 | mov rdi, r8 ; restore rdi\r | |
| 32 | ret\r | |
| 33 | IoReadFifo8 ENDP\r | |
| 34 | \r | |
| 35 | ;------------------------------------------------------------------------------\r | |
| 36 | ; VOID\r | |
| 37 | ; EFIAPI\r | |
| 38 | ; IoReadFifo16 (\r | |
| 39 | ; IN UINTN Port, // rcx\r | |
| 40 | ; IN UINTN Size, // rdx\r | |
| 41 | ; IN VOID *Buffer // r8\r | |
| 42 | ; );\r | |
| 43 | ;------------------------------------------------------------------------------\r | |
| 44 | IoReadFifo16 PROC\r | |
| 45 | cld\r | |
| 46 | xchg rcx, rdx\r | |
| 47 | xchg rdi, r8 ; rdi: buffer address; r8: save rdi\r | |
| 48 | rep insw\r | |
| 49 | mov rdi, r8 ; restore rdi\r | |
| 50 | ret\r | |
| 51 | IoReadFifo16 ENDP\r | |
| 52 | \r | |
| 53 | ;------------------------------------------------------------------------------\r | |
| 54 | ; VOID\r | |
| 55 | ; EFIAPI\r | |
| 56 | ; IoReadFifo32 (\r | |
| 57 | ; IN UINTN Port, // rcx\r | |
| 58 | ; IN UINTN Size, // rdx\r | |
| 59 | ; IN VOID *Buffer // r8\r | |
| 60 | ; );\r | |
| 61 | ;------------------------------------------------------------------------------\r | |
| 62 | IoReadFifo32 PROC\r | |
| 63 | cld\r | |
| 64 | xchg rcx, rdx\r | |
| 65 | xchg rdi, r8 ; rdi: buffer address; r8: save rdi\r | |
| 66 | rep insd\r | |
| 67 | mov rdi, r8 ; restore rdi\r | |
| 68 | ret\r | |
| 69 | IoReadFifo32 ENDP\r | |
| 70 | \r | |
| 71 | ;------------------------------------------------------------------------------\r | |
| 72 | ; VOID\r | |
| 73 | ; EFIAPI\r | |
| 74 | ; IoWriteFifo8 (\r | |
| 75 | ; IN UINTN Port, // rcx\r | |
| 76 | ; IN UINTN Size, // rdx\r | |
| 77 | ; IN VOID *Buffer // r8\r | |
| 78 | ; );\r | |
| 79 | ;------------------------------------------------------------------------------\r | |
| 80 | IoWriteFifo8 PROC\r | |
| 81 | cld\r | |
| 82 | xchg rcx, rdx\r | |
| 83 | xchg rsi, r8 ; rsi: buffer address; r8: save rsi\r | |
| 84 | rep outsb\r | |
| 85 | mov rsi, r8 ; restore rsi\r | |
| 86 | ret\r | |
| 87 | IoWriteFifo8 ENDP\r | |
| 88 | \r | |
| 89 | ;------------------------------------------------------------------------------\r | |
| 90 | ; VOID\r | |
| 91 | ; EFIAPI\r | |
| 92 | ; IoWriteFifo16 (\r | |
| 93 | ; IN UINTN Port, // rcx\r | |
| 94 | ; IN UINTN Size, // rdx\r | |
| 95 | ; IN VOID *Buffer // r8\r | |
| 96 | ; );\r | |
| 97 | ;------------------------------------------------------------------------------\r | |
| 98 | IoWriteFifo16 PROC\r | |
| 99 | cld\r | |
| 100 | xchg rcx, rdx\r | |
| 101 | xchg rsi, r8 ; rsi: buffer address; r8: save rsi\r | |
| 102 | rep outsw\r | |
| 103 | mov rsi, r8 ; restore rsi\r | |
| 104 | ret\r | |
| 105 | IoWriteFifo16 ENDP\r | |
| 106 | \r | |
| 107 | ;------------------------------------------------------------------------------\r | |
| 108 | ; VOID\r | |
| 109 | ; EFIAPI\r | |
| 110 | ; IoWriteFifo32 (\r | |
| 111 | ; IN UINTN Port, // rcx\r | |
| 112 | ; IN UINTN Size, // rdx\r | |
| 113 | ; IN VOID *Buffer // r8\r | |
| 114 | ; );\r | |
| 115 | ;------------------------------------------------------------------------------\r | |
| 116 | IoWriteFifo32 PROC\r | |
| 117 | cld\r | |
| 118 | xchg rcx, rdx\r | |
| 119 | xchg rsi, r8 ; rsi: buffer address; r8: save rsi\r | |
| 120 | rep outsd\r | |
| 121 | mov rsi, r8 ; restore rsi\r | |
| 122 | ret\r | |
| 123 | IoWriteFifo32 ENDP\r | |
| 124 | \r | |
| 125 | END\r | |
| 126 | \r |