QuarkPlatformPkg: Add modules required for TCG MOR feature
[mirror_edk2.git] / QuarkPlatformPkg / Quark.fdf
CommitLineData
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1## @file\r
2# FDF file of Clanton Peak CRB platform with 32-bit DXE\r
3#\r
4# This package provides QuarkNcSocId platform specific modules.\r
6ceeb1e2 5# Copyright (c) 2013 - 2016 Intel Corporation.\r
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6#\r
7# This program and the accompanying materials\r
8# are licensed and made available under the terms and conditions of the BSD License\r
9# which accompanies this distribution. The full text of the license may be found at\r
10# http://opensource.org/licenses/bsd-license.php\r
11#\r
12# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
13# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
14#\r
15##\r
16\r
17################################################################################\r
18#\r
19# Defines Section - statements that will be processed to create a Makefile.\r
20#\r
21################################################################################\r
22[Defines]\r
23# Address 0x100000000 (4 GB reset address)\r
24# Base Size\r
25# +---------------------------+\r
26# FLASH_BASE | FD.Quark: | 0x800000 (8 MB)\r
27# 0xFF800000 | BaseAddress |\r
28# +---------------------------+\r
29#\r
30# Flash offsets are 0 based, but are relative to FD.Quark BaseAddress, e.g. Payload Base is at 0x400000, Flash Base is at 0xFF800000 for 8 MB SPI part.\r
31# 0xFF800000 + 0x400000 = 0xFFC00000.\r
32#\r
33# Address 0x0 (0xFF800000 for 8 MB SPI part)\r
34# +---------------------------+\r
35# FLASH_FV_PAYLOAD_BASE | Payload Image | FLASH_FV_PAYLOAD_SIZE\r
36# 0x00400000 | | 0x00100000\r
37# +---------------------------+\r
38# FLASH_FV_MAIN_BASE | FvMain Image (Compressed) | FLASH_FV_MAIN_SIZE\r
39# 0x00500000 | | 0x001E0000\r
40# +---------------------------+\r
41# NVRAM_AREA_BASE | NVRAM Area= | NVRAM_AREA_SIZE\r
42# 0x006E0000 | Variable + FTW Working + |\r
43# | FTW Spare |\r
44# +---+-------------------+---+\r
45# NVRAM_AREA_VARIABLE_BASE | | NVRAM_AREA_VARIABLE_SIZE\r
46# | |\r
47# +-------------------+\r
48# FTW_WORKING_BASE | | FTW_WORKING_SIZE\r
49# | |\r
50# +-------------------+\r
51# FTW_SPARE_BASE | | FTW_SPARE_SIZE\r
52# | |\r
53# +---+-------------------+---+\r
54# RMU_BINARY_BASE | RMU Binary | RMU_BINARY_SIZE\r
55# 0x00700000 | | 0x00008000\r
56# +---------------------------+\r
57# PLATFORM_DATA_BASE | PlatformData Binary | PLATFORM_DATA_SIZE\r
58# 0x00710000 | | 0x00001000\r
59# +---------------------------+\r
60# FVRECOVERY_IMAGE_BASE | FVRECOVERY Image | FVRECOVERY_IMAGE_SIZE\r
61# 0x720000 | | 0x000E0000\r
62# +---------------------------+\r
63\r
64 #\r
65 # Define value used to compute FLASH regions below reset vector location just below 4GB\r
66 #\r
67 DEFINE RESET_ADDRESS = 0x100000000 # 4 GB\r
68\r
69 #\r
70 # Set size of FLASH to 8MB\r
71 #\r
72 DEFINE FLASH_SIZE = 0x800000\r
73 DEFINE FLASH_BASE = $(RESET_ADDRESS) - $(FLASH_SIZE) # The base address of the Flash Device\r
74\r
75 #\r
76 # Set FLASH block size to 4KB\r
77 #\r
78 DEFINE FLASH_BLOCKSIZE = 0x1000 # 4 KB\r
79\r
80 #\r
81 # Misc settings\r
82 #\r
83 DEFINE FLASH_BLOCKSIZE_DATA = 0x00, 0x10, 0x00, 0x00 # equivalent for DATA blocks\r
84\r
85 #\r
86 # Start PAYLOAD at 4MB into 8MB FLASH\r
87 #\r
88 DEFINE FLASH_FV_PAYLOAD_BASE = 0x00400000\r
89 DEFINE FLASH_FV_PAYLOAD_SIZE = 0x00100000\r
90\r
91 #\r
92 # Put FVMAIN between PAYLOAD and RMU Binary\r
93 #\r
94 DEFINE FLASH_FV_MAIN_BASE = 0x00500000\r
95 DEFINE FLASH_FV_MAIN_SIZE = 0x001E0000\r
96\r
97 #\r
98 # Place NV Storage just above Platform Data Base\r
99 #\r
100 DEFINE NVRAM_AREA_VARIABLE_BASE = 0x006E0000\r
101 DEFINE NVRAM_AREA_SIZE = 0x00020000\r
102\r
103 DEFINE NVRAM_AREA_VARIABLE_SIZE = 0x0000E000\r
104 DEFINE FTW_WORKING_BASE = $(NVRAM_AREA_VARIABLE_BASE) + $(NVRAM_AREA_VARIABLE_SIZE)\r
105 DEFINE FTW_WORKING_SIZE = 0x00002000\r
106 DEFINE FTW_SPARE_BASE = $(FTW_WORKING_BASE) + $(FTW_WORKING_SIZE)\r
107 DEFINE FTW_SPARE_SIZE = $(NVRAM_AREA_SIZE) - $(NVRAM_AREA_VARIABLE_SIZE) - $(FTW_WORKING_SIZE)\r
108\r
109 #\r
110 # RMU Binary must be at fixed address 1MB below 4GB (0xFFF00000)\r
111 #\r
112 DEFINE RMU_BINARY_BASE = 0x00700000 # HW fixed address\r
113 DEFINE RMU_BINARY_SIZE = 0x00008000 # HW fixed address, so fixed size\r
114\r
115 #\r
116 # Platform Data Base must be 64KB above RMU\r
117 #\r
118 DEFINE VPD_BASE = 0x00708000\r
119 DEFINE VPD_SIZE = 0x00001000\r
120\r
121 #\r
122 # Place FV Recovery above NV Storage\r
123 #\r
124 DEFINE FVRECOVERY_IMAGE_SIZE = 0x000F0000\r
125 DEFINE FVRECOVERY_IMAGE_BASE = $(FLASH_SIZE) - $(FVRECOVERY_IMAGE_SIZE)\r
126\r
127################################################################################\r
128#\r
129# FD Section\r
130# The [FD] Section is made up of the definition statements and a\r
131# description of what goes into the Flash Device Image. Each FD section\r
132# defines one flash "device" image. A flash device image may be one of\r
133# the following: Removable media bootable image (like a boot floppy\r
134# image,) an Option ROM image (that would be "flashed" into an add-in\r
135# card,) a System "Flash" image (that would be burned into a system's\r
136# flash) or an Update ("Capsule") image that will be used to update and\r
137# existing system flash.\r
138#\r
139################################################################################\r
140[FD.Quark]\r
141BaseAddress = 0xFF800000 #The base address of the Flash Device; set to same value as FLASH_BASE.\r
142Size = 0x800000 #The size in bytes of the Flash Device; set to same value as FLASH_SIZE.\r
143ErasePolarity = 1\r
144BlockSize = $(FLASH_BLOCKSIZE)\r
145NumBlocks = 0x800 #The number of blocks for the Flash Device.\r
146\r
147SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaBaseAddress = $(FLASH_BASE)\r
148SET gQuarkPlatformTokenSpaceGuid.PcdFlashAreaSize = $(FLASH_SIZE)\r
149\r
150################################################################################\r
151#\r
152# Following are lists of FD Region layout which correspond to the locations of different\r
153# images within the flash device.\r
154#\r
155# Regions must be defined in ascending order and may not overlap.\r
156#\r
157# A Layout Region start with a eight digit hex offset (leading "0x" required) followed by\r
158# the pipe "|" character, followed by the size of the region, also in hex with the leading\r
159# "0x" characters. Like:\r
160# Offset|Size\r
161# PcdOffsetCName|PcdSizeCName\r
162# RegionType <FV, DATA, or FILE>\r
163#\r
164################################################################################\r
165\r
166########################################################\r
167# Quark Payload Image\r
168########################################################\r
169$(FLASH_FV_PAYLOAD_BASE)|$(FLASH_FV_PAYLOAD_SIZE)\r
170gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvPayloadSize\r
171FV = PAYLOAD\r
172\r
173########################################################\r
174# Quark FVMAIN Image (Compressed)\r
175########################################################\r
176$(FLASH_FV_MAIN_BASE)|$(FLASH_FV_MAIN_SIZE)\r
177gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvMainSize\r
178FV = FVMAIN_COMPACT\r
179\r
180#############################################################################\r
181# Quark NVRAM Area\r
182# Quark NVRAM Area contains: Variable + FTW Working + FTW Spare\r
183#############################################################################\r
184$(NVRAM_AREA_VARIABLE_BASE)|$(NVRAM_AREA_VARIABLE_SIZE)\r
185gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize\r
186#NV_VARIABLE_STORE\r
187DATA = {\r
188 ## This is the EFI_FIRMWARE_VOLUME_HEADER\r
189 # ZeroVector []\r
190 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
191 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
192 # FileSystemGuid: gEfiSystemNvDataFvGuid =\r
193 # { 0xFFF12B8D, 0x7696, 0x4C8B, { 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50 }}\r
194 0x8D, 0x2B, 0xF1, 0xFF, 0x96, 0x76, 0x8B, 0x4C,\r
195 0xA9, 0x85, 0x27, 0x47, 0x07, 0x5B, 0x4F, 0x50,\r
196 # FvLength: 0x20000\r
197 0x00, 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x00,\r
198 #Signature "_FVH" #Attributes\r
199 0x5f, 0x46, 0x56, 0x48, 0xff, 0xfe, 0x04, 0x00,\r
200 #HeaderLength #CheckSum #ExtHeaderOffset #Reserved #Revision\r
201 0x48, 0x00, 0x19, 0xF9, 0x00, 0x00, 0x00, 0x02,\r
202 #Blockmap[0]: 32 Blocks * 0x1000 Bytes / Block\r
203 0x20, 0x00, 0x00, 0x00, $(FLASH_BLOCKSIZE_DATA),\r
204 #Blockmap[1]: End\r
205 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
206 ## This is the VARIABLE_STORE_HEADER\r
207 !if $(SECURE_BOOT_ENABLE)\r
208 # Signature: gEfiAuthenticatedVariableGuid = { 0xaaf32c78, 0x947b, 0x439a, { 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92 } }\r
209 0x78, 0x2c, 0xf3, 0xaa, 0x7b, 0x94, 0x9a, 0x43,\r
210 0xa1, 0x80, 0x2e, 0x14, 0x4e, 0xc3, 0x77, 0x92,\r
211 !else\r
212 # Signature: gEfiVariableGuid = { 0xddcf3616, 0x3275, 0x4164, { 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d }}\r
213 0x16, 0x36, 0xcf, 0xdd, 0x75, 0x32, 0x64, 0x41,\r
214 0x98, 0xb6, 0xfe, 0x85, 0x70, 0x7f, 0xfe, 0x7d,\r
215 !endif\r
216 #Size: 0x0E000 (gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageVariableSize) - 0x48 (size of EFI_FIRMWARE_VOLUME_HEADER) = 0x0DFB8\r
217 # This can speed up the Variable Dispatch a bit.\r
218 0xB8, 0xDF, 0x00, 0x00,\r
219 #FORMATTED: 0x5A #HEALTHY: 0xFE #Reserved: UINT16 #Reserved1: UINT32\r
220 0x5A, 0xFE, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00\r
221}\r
222\r
223$(FTW_WORKING_BASE)|$(FTW_WORKING_SIZE)\r
224gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwWorkingSize\r
225#NV_FTW_WORKING\r
226DATA = {\r
227 # EFI_FAULT_TOLERANT_WORKING_BLOCK_HEADER->Signature = gEdkiiWorkingBlockSignatureGuid =\r
228 # { 0x9e58292b, 0x7c68, 0x497d, { 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95 }}\r
229 0x2b, 0x29, 0x58, 0x9e, 0x68, 0x7c, 0x7d, 0x49,\r
230 0xa0, 0xce, 0x65, 0x0, 0xfd, 0x9f, 0x1b, 0x95,\r
231 # Crc:UINT32 #WorkingBlockValid:1, WorkingBlockInvalid:1, Reserved\r
232 0xE2, 0x33, 0xF2, 0x03, 0xFE, 0xFF, 0xFF, 0xFF,\r
233 # WriteQueueSize: UINT64 #Size: 0x2000 - 0x20 (FTW_WORKING_HEADER) = 0x1FE0\r
234 0xE0, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00\r
235}\r
236\r
237$(FTW_SPARE_BASE)|$(FTW_SPARE_SIZE)\r
238gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareBase|gEfiMdeModulePkgTokenSpaceGuid.PcdFlashNvStorageFtwSpareSize\r
239#NV_FTW_SPARE\r
240\r
241#########################################################\r
242# Quark Remote Management Unit Binary\r
243#########################################################\r
244$(RMU_BINARY_BASE)|$(RMU_BINARY_SIZE)\r
245INF QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/QuarkMicrocode.inf\r
246\r
247#########################################################\r
248# PlatformData Binary, default for standalone is none built-in so user selects.\r
249#########################################################\r
250$(VPD_BASE)|$(VPD_SIZE)\r
251gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress\r
252FILE = $(OUTPUT_DIRECTORY)/$(TARGET)_$(TOOL_CHAIN_TAG)/FV/8C3D856A-9BE6-468E-850A-24F7A8D38E08.bin\r
253\r
254#######################\r
255# Quark FVRECOVERY Image\r
256#######################\r
257$(FVRECOVERY_IMAGE_BASE)|$(FVRECOVERY_IMAGE_SIZE)\r
258gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoveryBase|gQuarkPlatformTokenSpaceGuid.PcdFlashFvRecoverySize\r
259FV = FVRECOVERY\r
260\r
261################################################################################\r
262#\r
263# FV Section\r
264#\r
265# [FV] section is used to define what components or modules are placed within a flash\r
266# device file. This section also defines order the components and modules are positioned\r
267# within the image. The [FV] section consists of define statements, set statements and\r
268# module statements.\r
269#\r
270################################################################################\r
271[FV.FVRECOVERY]\r
272BlockSize = $(FLASH_BLOCKSIZE)\r
273FvAlignment = 16 #FV alignment and FV attributes setting.\r
274ERASE_POLARITY = 1\r
275MEMORY_MAPPED = TRUE\r
276STICKY_WRITE = TRUE\r
277LOCK_CAP = TRUE\r
278LOCK_STATUS = TRUE\r
279WRITE_DISABLED_CAP = TRUE\r
280WRITE_ENABLED_CAP = TRUE\r
281WRITE_STATUS = TRUE\r
282WRITE_LOCK_CAP = TRUE\r
283WRITE_LOCK_STATUS = TRUE\r
284READ_DISABLED_CAP = TRUE\r
285READ_ENABLED_CAP = TRUE\r
286READ_STATUS = TRUE\r
287READ_LOCK_CAP = TRUE\r
288READ_LOCK_STATUS = TRUE\r
289FvNameGuid = 18D6D9F4-2EEF-4913-AEE6-BE61C6DA6CC8\r
290\r
291################################################################################\r
292#\r
293# The INF statements point to EDK component and EDK II module INF files, which will be placed into this FV image.\r
294# Parsing tools will scan the INF file to determine the type of component or module.\r
295# The component or module type is used to reference the standard rules\r
296# defined elsewhere in the FDF file.\r
297#\r
298# The format for INF statements is:\r
299# INF $(PathAndInfFileName)\r
300#\r
301################################################################################\r
302\r
303##\r
304# PEI Apriori file example, more PEIM module added later.\r
305##\r
306APRIORI PEI {\r
307 INF MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
308 # PlatformConfigPei should be immediately after Pcd driver.\r
309 INF QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf\r
310 INF MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf\r
311 INF MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf\r
312 INF MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf\r
313}\r
314\r
315##\r
316# SEC Phase modules\r
317##\r
318INF UefiCpuPkg/SecCore/SecCore.inf\r
319\r
320INF MdeModulePkg/Core/Pei/PeiMain.inf\r
321\r
322##\r
323# PEI Phase RAW Data files.\r
324##\r
325FILE FREEFORM = PCD(gEfiQuarkNcSocIdTokenSpaceGuid.PcdQuarkMicrocodeFile) {\r
326 SECTION RAW = QuarkSocBinPkg/QuarkNorthCluster/Binary/QuarkMicrocode/RMU.bin\r
327}\r
328\r
329INF RuleOverride = NORELOC MdeModulePkg/Universal/PCD/Pei/Pcd.inf\r
330INF QuarkPlatformPkg/Platform/Pei/PlatformConfig/PlatformConfigPei.inf\r
331INF RuleOverride = NORELOC MdeModulePkg/Universal/ReportStatusCodeRouter/Pei/ReportStatusCodeRouterPei.inf\r
332INF RuleOverride = NORELOC MdeModulePkg/Universal/StatusCodeHandler/Pei/StatusCodeHandlerPei.inf\r
333INF RuleOverride = NORELOC MdeModulePkg/Universal/FaultTolerantWritePei/FaultTolerantWritePei.inf\r
334INF RuleOverride = NORELOC MdeModulePkg/Universal/Variable/Pei/VariablePei.inf\r
335INF RuleOverride = NORELOC UefiCpuPkg/CpuMpPei/CpuMpPei.inf\r
336INF RuleOverride = NORELOC MdeModulePkg/Universal/CapsulePei/CapsulePei.inf\r
337INF RuleOverride = NORELOC QuarkSocPkg/QuarkNorthCluster/MemoryInit/Pei/MemoryInitPei.inf\r
338INF RuleOverride = NORELOC QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmAccessPei/SmmAccessPei.inf\r
339INF RuleOverride = NORELOC QuarkSocPkg/QuarkNorthCluster/Smm/Pei/SmmControlPei/SmmControlPei.inf\r
340INF QuarkPlatformPkg/Platform/Pei/PlatformInit/PlatformEarlyInit.inf\r
341INF MdeModulePkg/Universal/PcatSingleSegmentPciCfg2Pei/PcatSingleSegmentPciCfg2Pei.inf\r
342INF MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf\r
343INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationPei.inf\r
344INF UefiCpuPkg/Universal/Acpi/S3Resume2Pei/S3Resume2Pei.inf\r
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345!if $(MEASURED_BOOT_ENABLE)\r
346INF SecurityPkg/Tcg/TrEEConfig/TrEEConfigPei.inf\r
347INF SecurityPkg/Tcg/TcgPei/TcgPei.inf\r
348!endif\r
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349\r
350FILE FV_IMAGE = 1E9D7604-EF45-46a0-BD8A-71AC78C17AC1 {\r
351 SECTION PEI_DEPEX_EXP = {gEfiPeiMemoryDiscoveredPpiGuid AND gEfiPeiBootInRecoveryModePpiGuid}\r
352 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 { # TIANO COMPRESS GUID\r
353 SECTION FV_IMAGE = FVRECOVERY_COMPONENTS\r
354 }\r
355}\r
356\r
357################################################################################\r
358#\r
359# FV Section\r
360#\r
361# [FV] section is used to define what components or modules are placed within a flash\r
362# device file. This section also defines order the components and modules are positioned\r
363# within the image. The [FV] section consists of define statements, set statements and\r
364# module statements.\r
365#\r
366################################################################################\r
367[FV.FVRECOVERY_COMPONENTS]\r
368BlockSize = $(FLASH_BLOCKSIZE)\r
369FvAlignment = 16 #FV alignment and FV attributes setting.\r
370ERASE_POLARITY = 1\r
371MEMORY_MAPPED = TRUE\r
372STICKY_WRITE = TRUE\r
373LOCK_CAP = TRUE\r
374LOCK_STATUS = TRUE\r
375WRITE_DISABLED_CAP = TRUE\r
376WRITE_ENABLED_CAP = TRUE\r
377WRITE_STATUS = TRUE\r
378WRITE_LOCK_CAP = TRUE\r
379WRITE_LOCK_STATUS = TRUE\r
380READ_DISABLED_CAP = TRUE\r
381READ_ENABLED_CAP = TRUE\r
382READ_STATUS = TRUE\r
383READ_LOCK_CAP = TRUE\r
384READ_LOCK_STATUS = TRUE\r
385\r
386INF QuarkSocPkg/QuarkSouthCluster/Usb/Common/Pei/UsbPei.inf\r
387INF MdeModulePkg/Bus/Pci/EhciPei/EhciPei.inf\r
388INF QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Pei/OhciPei.inf\r
389INF MdeModulePkg/Bus/Usb/UsbBusPei/UsbBusPei.inf\r
390INF MdeModulePkg/Bus/Usb/UsbBotPei/UsbBotPei.inf\r
391INF FatPkg/FatPei/FatPei.inf\r
392INF MdeModulePkg/Universal/Disk/CdExpressPei/CdExpressPei.inf\r
393\r
394################################################################################\r
395#\r
396# FV Section\r
397#\r
398# [FV] section is used to define what components or modules are placed within a flash\r
399# device file. This section also defines order the components and modules are positioned\r
400# within the image. The [FV] section consists of define statements, set statements and\r
401# module statements.\r
402#\r
403################################################################################\r
404[FV.FVMAIN]\r
405BlockSize = $(FLASH_BLOCKSIZE)\r
406FvAlignment = 16\r
407ERASE_POLARITY = 1\r
408MEMORY_MAPPED = TRUE\r
409STICKY_WRITE = TRUE\r
410LOCK_CAP = TRUE\r
411LOCK_STATUS = TRUE\r
412WRITE_DISABLED_CAP = TRUE\r
413WRITE_ENABLED_CAP = TRUE\r
414WRITE_STATUS = TRUE\r
415WRITE_LOCK_CAP = TRUE\r
416WRITE_LOCK_STATUS = TRUE\r
417READ_DISABLED_CAP = TRUE\r
418READ_ENABLED_CAP = TRUE\r
419READ_STATUS = TRUE\r
420READ_LOCK_CAP = TRUE\r
421READ_LOCK_STATUS = TRUE\r
422FvNameGuid = 30D9ED01-38D2-418a-90D5-C561750BF80F\r
423\r
424##\r
425# DXE Phase modules\r
426##\r
427INF MdeModulePkg/Core/Dxe/DxeMain.inf\r
428INF MdeModulePkg/Universal/PCD/Dxe/Pcd.inf\r
429\r
430!if $(SOURCE_DEBUG_ENABLE)\r
431 INF SourceLevelDebugPkg/DebugAgentDxe/DebugAgentDxe.inf\r
432!endif\r
433\r
434#\r
435# Early SoC / Platform modules\r
436#\r
437INF QuarkPlatformPkg/Platform/Dxe/PlatformInit/PlatformInitDxe.inf\r
438\r
439##\r
440# EDK Core modules\r
441##\r
442INF UefiCpuPkg/CpuIo2Dxe/CpuIo2Dxe.inf\r
443INF MdeModulePkg/Universal/ReportStatusCodeRouter/RuntimeDxe/ReportStatusCodeRouterRuntimeDxe.inf\r
444INF MdeModulePkg/Universal/StatusCodeHandler/RuntimeDxe/StatusCodeHandlerRuntimeDxe.inf\r
445INF MdeModulePkg/Universal/ReportStatusCodeRouter/Smm/ReportStatusCodeRouterSmm.inf\r
446INF MdeModulePkg/Universal/StatusCodeHandler/Smm/StatusCodeHandlerSmm.inf\r
447INF MdeModulePkg/Universal/SectionExtractionDxe/SectionExtractionDxe.inf\r
448\r
449INF MdeModulePkg/Universal/SecurityStubDxe/SecurityStubDxe.inf\r
450INF UefiCpuPkg/CpuDxe/CpuDxe.inf\r
451INF MdeModulePkg/Universal/Metronome/Metronome.inf\r
452INF MdeModulePkg/Universal/WatchdogTimerDxe/WatchdogTimer.inf\r
453INF MdeModulePkg/Core/RuntimeDxe/RuntimeDxe.inf\r
454INF MdeModulePkg/Universal/FaultTolerantWriteDxe/FaultTolerantWriteSmm.inf\r
455!if $(SECURE_BOOT_ENABLE)\r
456 INF SecurityPkg/VariableAuthenticated/SecureBootConfigDxe/SecureBootConfigDxe.inf\r
457!endif\r
458INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmmRuntimeDxe.inf\r
459INF MdeModulePkg/Universal/Variable/RuntimeDxe/VariableSmm.inf\r
460INF MdeModulePkg/Universal/CapsuleRuntimeDxe/CapsuleRuntimeDxe.inf\r
461INF MdeModulePkg/Universal/MonotonicCounterRuntimeDxe/MonotonicCounterRuntimeDxe.inf\r
462INF MdeModulePkg/Universal/ResetSystemRuntimeDxe/ResetSystemRuntimeDxe.inf\r
463INF PcAtChipsetPkg/PcatRealTimeClockRuntimeDxe/PcatRealTimeClockRuntimeDxe.inf\r
464INF MdeModulePkg/Universal/DevicePathDxe/DevicePathDxe.inf\r
465INF MdeModulePkg/Universal/MemoryTest/NullMemoryTestDxe/NullMemoryTestDxe.inf\r
466\r
467#\r
468# Platform\r
469#\r
470INF MdeModulePkg/Universal/BdsDxe/BdsDxe.inf\r
471INF MdeModulePkg/Application/UiApp/UiApp.inf\r
472\r
473INF QuarkPlatformPkg/Pci/Dxe/PciHostBridge/PciHostBridge.inf\r
474INF QuarkPlatformPkg/Platform/SpiFvbServices/PlatformSpi.inf\r
475INF QuarkPlatformPkg/Platform/SpiFvbServices/PlatformSmmSpi.inf\r
476INF QuarkSocPkg/QuarkNorthCluster/QNCInit/Dxe/QNCInitDxe.inf\r
477INF PcAtChipsetPkg/HpetTimerDxe/HpetTimerDxe.inf\r
478INF QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmAccessDxe/SmmAccess.inf\r
479INF QuarkSocPkg/QuarkNorthCluster/S3Support/Dxe/QncS3Support.inf\r
480INF QuarkSocPkg/QuarkNorthCluster/Spi/PchSpiRuntime.inf\r
481INF QuarkSocPkg/QuarkNorthCluster/Spi/PchSpiSmm.inf\r
482INF QuarkPlatformPkg/Platform/Dxe/Setup/DxePlatform.inf\r
483\r
484#\r
485# ACPI\r
486#\r
487INF QuarkPlatformPkg/Platform/Dxe/SaveMemoryConfig/SaveMemoryConfig.inf\r
488INF MdeModulePkg/Universal/Acpi/S3SaveStateDxe/S3SaveStateDxe.inf\r
489#INF MdeModulePkg/Universal/Acpi/BootScriptExecutorDxe/BootScriptExecutorDxe.inf\r
490INF QuarkPlatformPkg/Acpi/Dxe/BootScriptExecutorDxe/BootScriptExecutorDxe.inf\r
491INF MdeModulePkg/Universal/Acpi/AcpiTableDxe/AcpiTableDxe.inf\r
492INF IntelFrameworkModulePkg/Universal/Acpi/AcpiS3SaveDxe/AcpiS3SaveDxe.inf\r
493INF QuarkPlatformPkg/Acpi/Dxe/AcpiPlatform/AcpiPlatform.inf\r
494INF RuleOverride = ACPITABLE QuarkPlatformPkg/Acpi/AcpiTables/AcpiTables.inf\r
495\r
496#\r
497# SMM\r
498#\r
499INF MdeModulePkg/Core/PiSmmCore/PiSmmIpl.inf\r
500INF MdeModulePkg/Core/PiSmmCore/PiSmmCore.inf\r
501INF UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf\r
502INF UefiCpuPkg/CpuIo2Smm/CpuIo2Smm.inf\r
503INF QuarkSocPkg/QuarkNorthCluster/Smm/Dxe/SmmControlDxe/SmmControlDxe.inf\r
504INF QuarkSocPkg/QuarkNorthCluster/Smm/DxeSmm/QncSmmDispatcher/QNCSmmDispatcher.inf\r
505INF QuarkPlatformPkg/Acpi/DxeSmm/AcpiSmm/AcpiSmmPlatform.inf\r
506INF QuarkPlatformPkg/Acpi/DxeSmm/SmmPowerManagement/SmmPowerManagement.inf\r
507INF MdeModulePkg/Universal/LockBox/SmmLockBox/SmmLockBox.inf\r
508INF UefiCpuPkg/PiSmmCommunication/PiSmmCommunicationSmm.inf\r
509\r
510#\r
511# SMBIOS\r
512#\r
513INF MdeModulePkg/Universal/SmbiosDxe/SmbiosDxe.inf\r
514INF QuarkPlatformPkg/Platform/Dxe/SmbiosMiscDxe/SmbiosMiscDxe.inf\r
515INF QuarkPlatformPkg/Platform/Dxe/MemorySubClass/MemorySubClass.inf\r
516\r
517#\r
518# PCI\r
519#\r
520INF QuarkPlatformPkg/Pci/Dxe/PciPlatform/PciPlatform.inf\r
521INF MdeModulePkg/Bus/Pci/PciBusDxe/PciBusDxe.inf\r
522INF QuarkSocPkg/QuarkSouthCluster/IohInit/Dxe/IohInitDxe.inf\r
523!if $(SOURCE_DEBUG_ENABLE)\r
524!else\r
525INF MdeModulePkg/Bus/Pci/PciSioSerialDxe/PciSioSerialDxe.inf\r
526!endif\r
527\r
528#\r
529# USB\r
530#\r
531!if $(PERFORMANCE_ENABLE)\r
532!else\r
533INF MdeModulePkg/Bus/Pci/EhciDxe/EhciDxe.inf\r
534INF QuarkSocPkg/QuarkSouthCluster/Usb/Ohci/Dxe/OhciDxe.inf\r
535INF MdeModulePkg/Bus/Usb/UsbBusDxe/UsbBusDxe.inf\r
536INF MdeModulePkg/Bus/Usb/UsbKbDxe/UsbKbDxe.inf\r
537INF MdeModulePkg/Bus/Usb/UsbMouseDxe/UsbMouseDxe.inf\r
538INF MdeModulePkg/Bus/Usb/UsbMassStorageDxe/UsbMassStorageDxe.inf\r
539!endif\r
540\r
541#\r
542# SDIO\r
543#\r
544!if $(PERFORMANCE_ENABLE)\r
545!else\r
546INF QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDControllerDxe/SDControllerDxe.inf\r
547INF QuarkSocPkg/QuarkSouthCluster/Sdio/Dxe/SDMediaDeviceDxe/SDMediaDeviceDxe.inf\r
548!endif\r
549\r
550#\r
551# Console\r
552#\r
553INF MdeModulePkg/Universal/Console/ConPlatformDxe/ConPlatformDxe.inf\r
554INF MdeModulePkg/Universal/Console/ConSplitterDxe/ConSplitterDxe.inf\r
555INF MdeModulePkg/Universal/Console/TerminalDxe/TerminalDxe.inf\r
556\r
557INF MdeModulePkg/Universal/HiiDatabaseDxe/HiiDatabaseDxe.inf\r
558INF MdeModulePkg/Universal/DisplayEngineDxe/DisplayEngineDxe.inf\r
559INF MdeModulePkg/Universal/SetupBrowserDxe/SetupBrowserDxe.inf\r
560INF MdeModulePkg/Universal/Disk/UnicodeCollation/EnglishDxe/EnglishDxe.inf\r
561\r
562#\r
563# File System Modules\r
564#\r
565!if $(PERFORMANCE_ENABLE)\r
566INF MdeModulePkg/Universal/FvSimpleFileSystemDxe/FvSimpleFileSystemDxe.inf\r
567!else\r
568INF MdeModulePkg/Universal/Disk/DiskIoDxe/DiskIoDxe.inf\r
569INF MdeModulePkg/Universal/Disk/PartitionDxe/PartitionDxe.inf\r
570INF FatPkg/EnhancedFatDxe/Fat.inf\r
571!endif\r
572\r
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573#\r
574# Trusted Platform Module\r
575#\r
576!if $(MEASURED_BOOT_ENABLE)\r
62c9131a 577INF SecurityPkg/Tcg/MemoryOverwriteControl/TcgMor.inf\r
6ceeb1e2 578INF SecurityPkg/Tcg/TcgDxe/TcgDxe.inf\r
62c9131a 579INF RuleOverride = DRIVER_ACPITABLE SecurityPkg/Tcg/TcgSmm/TcgSmm.inf\r
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580!endif\r
581\r
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582################################################################################\r
583#\r
584# FV Section\r
585#\r
586# [FV] section is used to define what components or modules are placed within a flash\r
587# device file. This section also defines order the components and modules are positioned\r
588# within the image. The [FV] section consists of define statements, set statements and\r
589# module statements.\r
590#\r
591################################################################################\r
592[FV.FVMAIN_COMPACT]\r
593FvAlignment = 16\r
594ERASE_POLARITY = 1\r
595MEMORY_MAPPED = TRUE\r
596STICKY_WRITE = TRUE\r
597LOCK_CAP = TRUE\r
598LOCK_STATUS = TRUE\r
599WRITE_DISABLED_CAP = TRUE\r
600WRITE_ENABLED_CAP = TRUE\r
601WRITE_STATUS = TRUE\r
602WRITE_LOCK_CAP = TRUE\r
603WRITE_LOCK_STATUS = TRUE\r
604READ_DISABLED_CAP = TRUE\r
605READ_ENABLED_CAP = TRUE\r
606READ_STATUS = TRUE\r
607READ_LOCK_CAP = TRUE\r
608READ_LOCK_STATUS = TRUE\r
609\r
610FILE FV_IMAGE = 9E21FD93-9C72-4c15-8C4B-E77F1DB2D792 {\r
611 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 { # TIANO COMPRESS GUID\r
612 SECTION FV_IMAGE = FVMAIN\r
613 }\r
614}\r
615\r
616################################################################################\r
617#\r
618# FV Section\r
619#\r
620# [FV] section is used to define what components or modules are placed within a flash\r
621# device file. This section also defines order the components and modules are positioned\r
622# within the image. The [FV] section consists of define statements, set statements and\r
623# module statements.\r
624#\r
625################################################################################\r
626[FV.PAYLOAD]\r
627BlockSize = $(FLASH_BLOCKSIZE)\r
628FvAlignment = 16 #FV alignment and FV attributes setting.\r
629ERASE_POLARITY = 1\r
630MEMORY_MAPPED = TRUE\r
631STICKY_WRITE = TRUE\r
632LOCK_CAP = TRUE\r
633LOCK_STATUS = TRUE\r
634WRITE_DISABLED_CAP = TRUE\r
635WRITE_ENABLED_CAP = TRUE\r
636WRITE_STATUS = TRUE\r
637WRITE_LOCK_CAP = TRUE\r
638WRITE_LOCK_STATUS = TRUE\r
639READ_DISABLED_CAP = TRUE\r
640READ_ENABLED_CAP = TRUE\r
641READ_STATUS = TRUE\r
642READ_LOCK_CAP = TRUE\r
643READ_LOCK_STATUS = TRUE\r
644\r
645#\r
646# Shell and Applications\r
647#\r
648INF RuleOverride = TIANOCOMPRESSED ShellPkg/Application/Shell/Shell.inf\r
649!if $(PERFORMANCE_ENABLE)\r
650INF RuleOverride = TIANOCOMPRESSED PerformancePkg/Dp_App/Dp.inf\r
651!endif\r
652\r
653################################################################################\r
654#\r
655# Rules are use with the [FV] section's module INF type to define\r
656# how an FFS file is created for a given INF file. The following Rule are the default\r
657# rules for the different module type. User can add the customized rules to define the\r
658# content of the FFS file.\r
659#\r
660################################################################################\r
661[Rule.Common.SEC]\r
662 FILE SEC = $(NAMED_GUID) RELOCS_STRIPPED {\r
663 TE TE Align = 8 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
664 RAW BIN Align = 16 |.com\r
665 }\r
666\r
667[Rule.Common.PEI_CORE]\r
668 FILE PEI_CORE = $(NAMED_GUID) {\r
669 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r
670 UI STRING="$(MODULE_NAME)" Optional\r
671 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
672 }\r
673\r
674[Rule.Common.PEIM.NORELOC]\r
675 FILE PEIM = $(NAMED_GUID) RELOCS_STRIPPED {\r
676 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
677 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r
678 UI STRING="$(MODULE_NAME)" Optional\r
679 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
680 }\r
681\r
682[Rule.Common.PEIM]\r
683 FILE PEIM = $(NAMED_GUID) {\r
684 PEI_DEPEX PEI_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
685 TE TE $(INF_OUTPUT)/$(MODULE_NAME).efi\r
686 UI STRING="$(MODULE_NAME)" Optional\r
687 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
688 }\r
689\r
690[Rule.Common.DXE_CORE]\r
691 FILE DXE_CORE = $(NAMED_GUID) {\r
692 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
693 UI STRING="$(MODULE_NAME)" Optional\r
694 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
695 }\r
696\r
697[Rule.Common.UEFI_DRIVER]\r
698 FILE DRIVER = $(NAMED_GUID) {\r
699 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
700 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
701 UI STRING="$(MODULE_NAME)" Optional\r
702 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
703 }\r
704\r
705[Rule.Common.DXE_DRIVER]\r
706 FILE DRIVER = $(NAMED_GUID) {\r
707 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
708 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
709 UI STRING="$(MODULE_NAME)" Optional\r
710 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
711 }\r
712\r
713[Rule.Common.DXE_RUNTIME_DRIVER]\r
714 FILE DRIVER = $(NAMED_GUID) {\r
715 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
716 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
717 UI STRING="$(MODULE_NAME)" Optional\r
718 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
719 }\r
720\r
721[Rule.Common.DXE_SMM_DRIVER]\r
722 FILE SMM = $(NAMED_GUID) {\r
723 SMM_DEPEX SMM_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
724 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
725 UI STRING="$(MODULE_NAME)" Optional\r
726 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
727 }\r
728\r
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729[Rule.Common.DXE_SMM_DRIVER.DRIVER_ACPITABLE]\r
730 FILE SMM = $(NAMED_GUID) {\r
731 DXE_DEPEX DXE_DEPEX Optional $(INF_OUTPUT)/$(MODULE_NAME).depex\r
732 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
733 RAW ACPI Optional |.acpi\r
734 RAW ASL Optional |.aml\r
735 UI STRING="$(MODULE_NAME)" Optional\r
736 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
737 }\r
738\r
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739[Rule.Common.SMM_CORE]\r
740 FILE SMM_CORE = $(NAMED_GUID) {\r
741 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
742 UI STRING="$(MODULE_NAME)" Optional\r
743 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
744 }\r
745\r
746[Rule.Common.UEFI_APPLICATION]\r
747 FILE APPLICATION = $(NAMED_GUID) {\r
748 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
749 UI STRING="$(MODULE_NAME)" Optional\r
750 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
751 }\r
752\r
753[Rule.Common.UEFI_APPLICATION.TIANOCOMPRESSED]\r
754 FILE APPLICATION = $(NAMED_GUID) {\r
755 UI STRING="$(MODULE_NAME)" Optional\r
756 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
757 SECTION GUIDED A31280AD-481E-41B6-95E8-127F4C984779 PROCESSING_REQUIRED = TRUE { # TIANO COMPRESS GUID\r
758 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
759 }\r
760 }\r
761\r
762[Rule.Common.UEFI_APPLICATION.UI]\r
763 FILE APPLICATION = $(NAMED_GUID) {\r
764 PE32 PE32 $(INF_OUTPUT)/$(MODULE_NAME).efi\r
765 UI STRING="Enter Setup"\r
766 VERSION STRING="$(INF_VERSION)" Optional BUILD_NUM=$(BUILD_NUMBER)\r
767 }\r
768\r
769[Rule.Common.USER_DEFINED.ACPITABLE]\r
770 FILE FREEFORM = $(NAMED_GUID) {\r
771 RAW ACPI |.acpi\r
772 RAW ASL |.aml\r
773 }\r